8171974: Fix for R10 Register clobbering with usage of ExternalAddress
Reviewed-by: kvn, rbackman

8165381: Update for x86 SHA512 using AVX2
Summary: Add intrinsics for x86 AVX2 architecture with no SHA instructions.
Reviewed-by: kvn
Contributed-by: smita.kamath@intel.com

8078122: YMM registers upper 128 bits may get clobbered by a JNI call on windows
Summary: Convert all XMM registers to be Save-on-Call on Win64.
Reviewed-by: kvn
Contributed-by: kishor.kharbas@intel.com

8154495: SHA256 AVX2 intrinsic (when no supports_sha() available)
Reviewed-by: kvn

8150767: Enables SHA Extensions on x86
Summary: Add x86 intrinsics for SHA-1 and SHA-256.
Reviewed-by: kvn, twisti
Contributed-by: vivek.r.deshpande@intel.com, shravya.rukmannagari@intel.com