remove unneeded includes; ok miod@

Make ifq and ifiq interface MP safe.

Rename ifq_set_maxlen() to ifq_init_maxlen(). This function neither
uses WRITE_ONCE() nor a mutex and is called before the ifq mutex
is initialized. The new name expresses that it should be used only
during interface attach when there is no concurrency.

Protect ifq_len(), ifq_empty(), ifiq_len(), and ifiq_empty() with
READ_ONCE(). They can be used without lock as they only read a
single integer.

OK dlg@

Constify struct cfattach.

spelling
feedback and ok tb@ jmc@ ok ratchov@

Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.

ok dlg@ tobhe@

consistently uppercase pci product defines

ok mpi@

A pile of sizes to free(9). In test for a few days in snapshots.
Errors will result in nice clean panic messages so we know what's wrong.
Reviewed by dhill visa natano jsg.

move counting if_opackets next to counting if_obytes in if_enqueue.

this means packets are consistently counted in one place, unlike the
many and various ways that drivers thought they should do it.

ok mpi@ deraadt@

G/C IFQ_SET_READY().

Replace mountroothook_establish(9) by config_mountroot(9) a narrower API
similar to config_defer(9).

ok mikeb@, deraadt@

replace IFF_OACTIVE manipulation with mpsafe operations.

there are two things shared between the network stack and drivers
in the send path: the send queue and the IFF_OACTIVE flag. the send
queue is now protected by a mutex. this diff makes the oactive
functionality mpsafe too.

IFF_OACTIVE is part of if_flags. there are two problems with that.
firstly, if_flags is a short and we dont have any MI atomic operations
to manipulate a short. secondly, while we could make the IFF_OACTIVE
operates mpsafe, all changes to other flags would have to be made
safe at the same time, otherwise a read-modify-write cycle on their
updates could clobber the oactive change.

instead, this moves the oactive mark into struct ifqueue and provides
an API for changing it. there's ifq_set_oactive, ifq_clr_oactive,
and ifq_is_oactive. these are modelled on ifsq_set_oactive,
ifsq_clr_oactive, and ifsq_is_oactive in dragonflybsd.

this diff includes changes to all the drivers manipulating IFF_OACTIVE
to now use the ifsq_{set,clr_is}_oactive API too.

ok kettenis@ mpi@ jmatthew@ deraadt@

The only network driver needing <net/if_types.h> is upl(4) for IFT_OTHER.

shuffle struct ifqueue so in flight mbufs are protected by a mutex.

the code is refactored so the IFQ macros call newly implemented ifq
functions. the ifq code is split so each discipline (priq and hfsc
in our case) is an opaque set of operations that the common ifq
code can call. the common code does the locking, accounting (ifq_len
manipulation), and freeing of the mbuf if the disciplines enqueue
function rejects it. theyre kind of like bufqs in the block layer
with their fifo and nscan disciplines.

the new api also supports atomic switching of disciplines at runtime.
the hfsc setup in pf_ioctl.c has been tweaked to build a complete
hfsc_if structure which it attaches to the send queue in a single
operation, rather than attaching to the interface up front and
building up a list of queues.

the send queue is now mutexed, which raises the expectation that
packets can be enqueued or purged on one cpu while another cpu is
dequeueing them in a driver for transmission. a lot of drivers use
IFQ_POLL to peek at an mbuf and attempt to fit it on the ring before
committing to it with a later IFQ_DEQUEUE operation. if the mbuf
gets freed in between the POLL and DEQUEUE operations, fireworks
will ensue.

to avoid this, the ifq api introduces ifq_deq_begin, ifq_deq_rollback,
and ifq_deq_commit. ifq_deq_begin allows a driver to take the ifq
mutex and get a reference to the mbuf they wish to try and tx. if
there's space, they can ifq_deq_commit it to remove the mbuf and
release the mutex. if there's no space, ifq_deq_rollback simply
releases the mutex. this api was developed to make updating the
drivers using IFQ_POLL easy, instead of having to do significant
semantic changes to avoid POLL that we cannot test on all the
hardware.

the common code has been tested pretty hard, and all the driver
modifications are straightforward except for de(4). if that breaks
it can be dealt with later.

ok mpi@ jmatthew@

arp_ifinit() is no longer needed.

unifdef INET

Some reallocarray() use; review Jean-Philippe Ouellet, patrick keshishian
ok tedu

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

missing pass DEVNAME(sc), fix format string; OK guenther@

Set the IFF_ALLMULTI flag as appropriate.

ok dlg@

Copy pasto in comment. Fix by brad@ OK dlg@

BUS_DMA_ZERO instead of alloc, map, bzero.

ok krw@

replace custom macro sizeofa() with nitems()

Eliminate the redundant bits of code for MTU and multicast handling
from the individual drivers now that ether_ioctl() handles this.

Shrinks the i386 kernels by..
RAMDISK - 2176 bytes
RAMDISKB - 1504 bytes
RAMDISKC - 736 bytes

Tested by naddy@/okan@/sthen@/brad@/todd@/jmc@ and lots of users.
Build tested on almost all archs by todd@/brad@

ok naddy@

sizeofa -> nitems

dlg says "well, that is embarassing"

First step towards cleaning up the Ethernet driver ioctl handling.
Move calling ether_ioctl() from the top of the ioctl function, which
at the moment does absolutely nothing, to the default switch case.
Thus allowing drivers to define their own ioctl handlers and then
falling back on ether_ioctl(). The only functional change this results
in at the moment is having all Ethernet drivers returning the proper
errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown
ioctl's.

Shrinks the i386 kernels by..
RAMDISK - 1024 bytes
RAMDISKB - 1120 bytes
RAMDISKC - 832 bytes

Tested by martin@/jsing@/todd@/brad@
Build tested on almost all archs by todd@/brad@

ok jsing@

Convert timeout_add() calls using multiples of hz to timeout_add_sec()

Really just the low-hanging fruit of (hopefully) forthcoming timeout
conversions.

ok art@, krw@

Correct defines for NXE_DB_PEGID_RX|TX. OK dlg@

enable ADDMULTI and DELMULTI in the ioctl handler now that the tht
it is plugged into can deal with ipv6. i dont have to be careful
about what i put on the wire anymore.

More easy bzero() -> M_ZERO. Use 'p = malloc(sizeof(*p) ...' where
obvious.

start implementing the rx code. this puts pkts and descriptors onto the
rx ring.

enable interrupts when the interface comes up.

i seem to be crashing the rx unit though which is responsible for
generating the interrupts. i havent got any yet.

this is what the interrupt handler will look like. there'll be some added
lines in here later that call the tx and rx completions.

the chip has three rx rings, one for normal packets, one for jumbos, and
one for lro. the manual says that they all have to have descriptors in them
for correct operation. i dont care about jumbos and lro at this point so im
going to point the descriptors in those rings at a dummy 64k buffer. this
diff adds the allocation of that buffer.

the ring sizes are reprresented by 32 bit fields in the context descirptor,
so use htole32 to get a value for them, not htole64.

implement the completion half of the tx path. the driver keeps track of
mbufs we've put on the hardware with the nxe_pkt struct. this struct
contains a unique id for each pkt which is used the hardwares tx descriptor
so we could identify which pkts its finished transmitting. turns out the
hardware doesnt return ids though, it tells us which slots in the tx ring
its up to. so now i stash the slot a pkt went into in the pkt_id field.

configure the NIU to rx packets that will fit into the mbufs we will
allocate for it, rather than the default of 1600.

wrap writes to the doorbell register.

the first read or write in the crb space after you switch the windows
tends to be junk, except in the pci regs for some reason. read the
crb window register back after setting it to force the junk to go
away. this fixes some really weird issues i had.

program the niu with the mac address in the right order.

tweak the register macros a bit. add macros for the NIUs port registers
which are useful to see whats happening on the wire.

oops, forgot the print the intr string on attach

hook the interrupt up

implement nxe_start. this is enough to put packets on the wire. the sgl
layout of this chip is extremely weird. there's only 4 sg entries in each
tx descriptor, but theyre out of order. you can use multiple tx descriptors
to tx more than 4 segments, but instead of letting you use all 64bytes that
a tx descriptor uses you just use the same 4 sg entries, and up to 8 descs.

program the mac control thing according the the multicast or promisc
settings that we ask for. set these flags when the interface is brought up.

program the lladdr when the chip is brought up.

sync all the bits for use by the hardware, and then point the chip at them.
the firmware is now ready to send and recv packets.

when the interface is brought up allocate all the things that are needed
for the chip to work with, eg, the context region, the cmd consumer, the
cmd/tx ring, the status ring, and the 3 rx rings.
free it all when we bring the chip down.

allocate pkt lists when the interface is brought up.

make nxe_up return void and report its failure by not setting the RUNNING
flag like every other nic ive read.

here are the tx, rx, and status (rx completion) descriptors used in the io
paths.

move the firmware to the right state before we start allocating everything
for it.

lock accesses to the ioctl handler.

this code definitely uses queue.h

tell the ioctl handler to call nxe_up/down/iff at the right times. they
are just stubs at the moment though.

code to allocate, free, sync, and iterate over rings. this is based loosely
on the fifos used in tht. very loosely. tht fifos were set up to take small
writes of varying length and read or write them into the dmaable memory.
nxe has fixed sized descriptors in each ring, so this ring handling is set
up to just give pointers to the memory to be filled in directly. the
iterator just pushes this pointer around the ring.

steal pkt handling from tht. this lets us keep track of mbufs when theyre
on the hardware. it stashes ids and dma bits.

implement link state monitoring. you have to poll the firmware to see the
state of the link. since im doing this already for the temp sensor i merged
the polling for both and do them at the same time. i poll every 5 seconds
now instead of every 60.

i can now tell if the cable between the nxe and tht has fallen out.

white space fixes while im here.

hook up the ether and ifmedia layers. you can see nxe in ifconfig output
now. just the lladdr though, i havent filled in enough of the ioctl handler
for more yet.

hook a kernel sensor up to the temp register on the chip. poll out of a
timeout since reading registers doesnt need a process context.

start the init of the firmware. it can take a long time, so we start it in
attach and make sure its finished at mountroot time.

pull my wrapper around single segment dma allocations in. its got to be at
least half a dozen drivers now that use this.

white space fixes

define the rest of the registers i know about: the interrupt registers,
init, xg config, ring and context addresses, temp sensor, firmware states.

fetch the user info off the board. the lladdr and firmware version are
stored on it.
display the fw and lladdr in attach.

we're a nic, so we need the arpcom and ifmedia structs in our softc

read the board information off the flash. check it, and stash what type of
board they say we are.

provide a map of the board type the flash memory will tell us we are to the
type of interface it provides. drivers need to deal with 10Gb (XGB) and
gigabit (GBE) differently.

code to unmap the register windows if something in attach goes horribly
wrong.

list where different things lie in the flash.
define what the board info and user info regions in the flash look like as
structs.

we're going to spend most of our time in crb window 1, so move the chip
into that window in attach.

move the mapping of the registers out of attach and into their own function

code to read stuff out of the flash chip on the netxen.

code to wait on registers in the main and crb spaces.

add DPRINTF and DASSERT debug macros.

there is flash on the netxens that contains things like the firmware, the
firmware boot loader, and various structs with information about how the
chip is configured. these registers are used to access that flash.

stash the pci function this port is on in the softc.
create a bus_space subregion for the CRB register window.
provide a way to set which crb window you want, and a way to read and write
in it.

start defining the register layout.

the netxen nics are a bit strange. their main register window is HUGE at a
big 128MB size. apparently this isnt enough though, so they used the top
32 meg of the main register space as a window into a 64meg region. which
half of this space (the CRB window) is available is determined by setting
a register INSIDE this window. that register just happens to be available
in both windows. kinda crazy.

read and write routines for the big register window

dont match on nxe boards that dont claim to be network devices.

stash the dma tag.
map the register windows.
put a stub in place for the interrupt handler

enter nxe, a driver for the netxen 10Gb cards.

i have most of this already written but this is just the attach glue. i'll
be adding code in smallish chunks so i can decruft it as i go.

Make ifq and ifiq interface MP safe.

Rename ifq_set_maxlen() to ifq_init_maxlen(). This function neither
uses WRITE_ONCE() nor a mutex and is called before the ifq mutex
is initialized. The new name expresses that it should be used only
during interface attach when there is no concurrency.

Protect ifq_len(), ifq_empty(), ifiq_len(), and ifiq_empty() with
READ_ONCE(). They can be used without lock as they only read a
single integer.

OK dlg@

Constify struct cfattach.

spelling
feedback and ok tb@ jmc@ ok ratchov@

Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.

ok dlg@ tobhe@

consistently uppercase pci product defines

ok mpi@

A pile of sizes to free(9). In test for a few days in snapshots.
Errors will result in nice clean panic messages so we know what's wrong.
Reviewed by dhill visa natano jsg.

move counting if_opackets next to counting if_obytes in if_enqueue.

this means packets are consistently counted in one place, unlike the
many and various ways that drivers thought they should do it.

ok mpi@ deraadt@

G/C IFQ_SET_READY().

Replace mountroothook_establish(9) by config_mountroot(9) a narrower API
similar to config_defer(9).

ok mikeb@, deraadt@

replace IFF_OACTIVE manipulation with mpsafe operations.

there are two things shared between the network stack and drivers
in the send path: the send queue and the IFF_OACTIVE flag. the send
queue is now protected by a mutex. this diff makes the oactive
functionality mpsafe too.

IFF_OACTIVE is part of if_flags. there are two problems with that.
firstly, if_flags is a short and we dont have any MI atomic operations
to manipulate a short. secondly, while we could make the IFF_OACTIVE
operates mpsafe, all changes to other flags would have to be made
safe at the same time, otherwise a read-modify-write cycle on their
updates could clobber the oactive change.

instead, this moves the oactive mark into struct ifqueue and provides
an API for changing it. there's ifq_set_oactive, ifq_clr_oactive,
and ifq_is_oactive. these are modelled on ifsq_set_oactive,
ifsq_clr_oactive, and ifsq_is_oactive in dragonflybsd.

this diff includes changes to all the drivers manipulating IFF_OACTIVE
to now use the ifsq_{set,clr_is}_oactive API too.

ok kettenis@ mpi@ jmatthew@ deraadt@

The only network driver needing <net/if_types.h> is upl(4) for IFT_OTHER.

shuffle struct ifqueue so in flight mbufs are protected by a mutex.

the code is refactored so the IFQ macros call newly implemented ifq
functions. the ifq code is split so each discipline (priq and hfsc
in our case) is an opaque set of operations that the common ifq
code can call. the common code does the locking, accounting (ifq_len
manipulation), and freeing of the mbuf if the disciplines enqueue
function rejects it. theyre kind of like bufqs in the block layer
with their fifo and nscan disciplines.

the new api also supports atomic switching of disciplines at runtime.
the hfsc setup in pf_ioctl.c has been tweaked to build a complete
hfsc_if structure which it attaches to the send queue in a single
operation, rather than attaching to the interface up front and
building up a list of queues.

the send queue is now mutexed, which raises the expectation that
packets can be enqueued or purged on one cpu while another cpu is
dequeueing them in a driver for transmission. a lot of drivers use
IFQ_POLL to peek at an mbuf and attempt to fit it on the ring before
committing to it with a later IFQ_DEQUEUE operation. if the mbuf
gets freed in between the POLL and DEQUEUE operations, fireworks
will ensue.

to avoid this, the ifq api introduces ifq_deq_begin, ifq_deq_rollback,
and ifq_deq_commit. ifq_deq_begin allows a driver to take the ifq
mutex and get a reference to the mbuf they wish to try and tx. if
there's space, they can ifq_deq_commit it to remove the mbuf and
release the mutex. if there's no space, ifq_deq_rollback simply
releases the mutex. this api was developed to make updating the
drivers using IFQ_POLL easy, instead of having to do significant
semantic changes to avoid POLL that we cannot test on all the
hardware.

the common code has been tested pretty hard, and all the driver
modifications are straightforward except for de(4). if that breaks
it can be dealt with later.

ok mpi@ jmatthew@

arp_ifinit() is no longer needed.

unifdef INET

Some reallocarray() use; review Jean-Philippe Ouellet, patrick keshishian
ok tedu

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

missing pass DEVNAME(sc), fix format string; OK guenther@

Set the IFF_ALLMULTI flag as appropriate.

ok dlg@

Copy pasto in comment. Fix by brad@ OK dlg@

BUS_DMA_ZERO instead of alloc, map, bzero.

ok krw@

replace custom macro sizeofa() with nitems()

Eliminate the redundant bits of code for MTU and multicast handling
from the individual drivers now that ether_ioctl() handles this.

Shrinks the i386 kernels by..
RAMDISK - 2176 bytes
RAMDISKB - 1504 bytes
RAMDISKC - 736 bytes

Tested by naddy@/okan@/sthen@/brad@/todd@/jmc@ and lots of users.
Build tested on almost all archs by todd@/brad@

ok naddy@

sizeofa -> nitems

dlg says "well, that is embarassing"

First step towards cleaning up the Ethernet driver ioctl handling.
Move calling ether_ioctl() from the top of the ioctl function, which
at the moment does absolutely nothing, to the default switch case.
Thus allowing drivers to define their own ioctl handlers and then
falling back on ether_ioctl(). The only functional change this results
in at the moment is having all Ethernet drivers returning the proper
errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown
ioctl's.

Shrinks the i386 kernels by..
RAMDISK - 1024 bytes
RAMDISKB - 1120 bytes
RAMDISKC - 832 bytes

Tested by martin@/jsing@/todd@/brad@
Build tested on almost all archs by todd@/brad@

ok jsing@

Convert timeout_add() calls using multiples of hz to timeout_add_sec()

Really just the low-hanging fruit of (hopefully) forthcoming timeout
conversions.

ok art@, krw@

Correct defines for NXE_DB_PEGID_RX|TX. OK dlg@

enable ADDMULTI and DELMULTI in the ioctl handler now that the tht
it is plugged into can deal with ipv6. i dont have to be careful
about what i put on the wire anymore.

More easy bzero() -> M_ZERO. Use 'p = malloc(sizeof(*p) ...' where
obvious.

start implementing the rx code. this puts pkts and descriptors onto the
rx ring.

enable interrupts when the interface comes up.

i seem to be crashing the rx unit though which is responsible for
generating the interrupts. i havent got any yet.

this is what the interrupt handler will look like. there'll be some added
lines in here later that call the tx and rx completions.

the chip has three rx rings, one for normal packets, one for jumbos, and
one for lro. the manual says that they all have to have descriptors in them
for correct operation. i dont care about jumbos and lro at this point so im
going to point the descriptors in those rings at a dummy 64k buffer. this
diff adds the allocation of that buffer.

the ring sizes are reprresented by 32 bit fields in the context descirptor,
so use htole32 to get a value for them, not htole64.

implement the completion half of the tx path. the driver keeps track of
mbufs we've put on the hardware with the nxe_pkt struct. this struct
contains a unique id for each pkt which is used the hardwares tx descriptor
so we could identify which pkts its finished transmitting. turns out the
hardware doesnt return ids though, it tells us which slots in the tx ring
its up to. so now i stash the slot a pkt went into in the pkt_id field.

configure the NIU to rx packets that will fit into the mbufs we will
allocate for it, rather than the default of 1600.

wrap writes to the doorbell register.

the first read or write in the crb space after you switch the windows
tends to be junk, except in the pci regs for some reason. read the
crb window register back after setting it to force the junk to go
away. this fixes some really weird issues i had.

program the niu with the mac address in the right order.

tweak the register macros a bit. add macros for the NIUs port registers
which are useful to see whats happening on the wire.

oops, forgot the print the intr string on attach

hook the interrupt up

implement nxe_start. this is enough to put packets on the wire. the sgl
layout of this chip is extremely weird. there's only 4 sg entries in each
tx descriptor, but theyre out of order. you can use multiple tx descriptors
to tx more than 4 segments, but instead of letting you use all 64bytes that
a tx descriptor uses you just use the same 4 sg entries, and up to 8 descs.

program the mac control thing according the the multicast or promisc
settings that we ask for. set these flags when the interface is brought up.

program the lladdr when the chip is brought up.

sync all the bits for use by the hardware, and then point the chip at them.
the firmware is now ready to send and recv packets.

when the interface is brought up allocate all the things that are needed
for the chip to work with, eg, the context region, the cmd consumer, the
cmd/tx ring, the status ring, and the 3 rx rings.
free it all when we bring the chip down.

allocate pkt lists when the interface is brought up.

make nxe_up return void and report its failure by not setting the RUNNING
flag like every other nic ive read.

here are the tx, rx, and status (rx completion) descriptors used in the io
paths.

move the firmware to the right state before we start allocating everything
for it.

lock accesses to the ioctl handler.

this code definitely uses queue.h

tell the ioctl handler to call nxe_up/down/iff at the right times. they
are just stubs at the moment though.

code to allocate, free, sync, and iterate over rings. this is based loosely
on the fifos used in tht. very loosely. tht fifos were set up to take small
writes of varying length and read or write them into the dmaable memory.
nxe has fixed sized descriptors in each ring, so this ring handling is set
up to just give pointers to the memory to be filled in directly. the
iterator just pushes this pointer around the ring.

steal pkt handling from tht. this lets us keep track of mbufs when theyre
on the hardware. it stashes ids and dma bits.

implement link state monitoring. you have to poll the firmware to see the
state of the link. since im doing this already for the temp sensor i merged
the polling for both and do them at the same time. i poll every 5 seconds
now instead of every 60.

i can now tell if the cable between the nxe and tht has fallen out.

white space fixes while im here.

hook up the ether and ifmedia layers. you can see nxe in ifconfig output
now. just the lladdr though, i havent filled in enough of the ioctl handler
for more yet.

hook a kernel sensor up to the temp register on the chip. poll out of a
timeout since reading registers doesnt need a process context.

start the init of the firmware. it can take a long time, so we start it in
attach and make sure its finished at mountroot time.

pull my wrapper around single segment dma allocations in. its got to be at
least half a dozen drivers now that use this.

white space fixes

define the rest of the registers i know about: the interrupt registers,
init, xg config, ring and context addresses, temp sensor, firmware states.

fetch the user info off the board. the lladdr and firmware version are
stored on it.
display the fw and lladdr in attach.

we're a nic, so we need the arpcom and ifmedia structs in our softc

read the board information off the flash. check it, and stash what type of
board they say we are.

provide a map of the board type the flash memory will tell us we are to the
type of interface it provides. drivers need to deal with 10Gb (XGB) and
gigabit (GBE) differently.

code to unmap the register windows if something in attach goes horribly
wrong.

list where different things lie in the flash.
define what the board info and user info regions in the flash look like as
structs.

we're going to spend most of our time in crb window 1, so move the chip
into that window in attach.

move the mapping of the registers out of attach and into their own function

code to read stuff out of the flash chip on the netxen.

code to wait on registers in the main and crb spaces.

add DPRINTF and DASSERT debug macros.

there is flash on the netxens that contains things like the firmware, the
firmware boot loader, and various structs with information about how the
chip is configured. these registers are used to access that flash.

stash the pci function this port is on in the softc.
create a bus_space subregion for the CRB register window.
provide a way to set which crb window you want, and a way to read and write
in it.

start defining the register layout.

the netxen nics are a bit strange. their main register window is HUGE at a
big 128MB size. apparently this isnt enough though, so they used the top
32 meg of the main register space as a window into a 64meg region. which
half of this space (the CRB window) is available is determined by setting
a register INSIDE this window. that register just happens to be available
in both windows. kinda crazy.

read and write routines for the big register window

dont match on nxe boards that dont claim to be network devices.

stash the dma tag.
map the register windows.
put a stub in place for the interrupt handler

enter nxe, a driver for the netxen 10Gb cards.

i have most of this already written but this is just the attach glue. i'll
be adding code in smallish chunks so i can decruft it as i go.

Constify struct cfattach.

spelling
feedback and ok tb@ jmc@ ok ratchov@

Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.

ok dlg@ tobhe@

consistently uppercase pci product defines

ok mpi@

A pile of sizes to free(9). In test for a few days in snapshots.
Errors will result in nice clean panic messages so we know what's wrong.
Reviewed by dhill visa natano jsg.

move counting if_opackets next to counting if_obytes in if_enqueue.

this means packets are consistently counted in one place, unlike the
many and various ways that drivers thought they should do it.

ok mpi@ deraadt@

G/C IFQ_SET_READY().

Replace mountroothook_establish(9) by config_mountroot(9) a narrower API
similar to config_defer(9).

ok mikeb@, deraadt@

replace IFF_OACTIVE manipulation with mpsafe operations.

there are two things shared between the network stack and drivers
in the send path: the send queue and the IFF_OACTIVE flag. the send
queue is now protected by a mutex. this diff makes the oactive
functionality mpsafe too.

IFF_OACTIVE is part of if_flags. there are two problems with that.
firstly, if_flags is a short and we dont have any MI atomic operations
to manipulate a short. secondly, while we could make the IFF_OACTIVE
operates mpsafe, all changes to other flags would have to be made
safe at the same time, otherwise a read-modify-write cycle on their
updates could clobber the oactive change.

instead, this moves the oactive mark into struct ifqueue and provides
an API for changing it. there's ifq_set_oactive, ifq_clr_oactive,
and ifq_is_oactive. these are modelled on ifsq_set_oactive,
ifsq_clr_oactive, and ifsq_is_oactive in dragonflybsd.

this diff includes changes to all the drivers manipulating IFF_OACTIVE
to now use the ifsq_{set,clr_is}_oactive API too.

ok kettenis@ mpi@ jmatthew@ deraadt@

The only network driver needing <net/if_types.h> is upl(4) for IFT_OTHER.

shuffle struct ifqueue so in flight mbufs are protected by a mutex.

the code is refactored so the IFQ macros call newly implemented ifq
functions. the ifq code is split so each discipline (priq and hfsc
in our case) is an opaque set of operations that the common ifq
code can call. the common code does the locking, accounting (ifq_len
manipulation), and freeing of the mbuf if the disciplines enqueue
function rejects it. theyre kind of like bufqs in the block layer
with their fifo and nscan disciplines.

the new api also supports atomic switching of disciplines at runtime.
the hfsc setup in pf_ioctl.c has been tweaked to build a complete
hfsc_if structure which it attaches to the send queue in a single
operation, rather than attaching to the interface up front and
building up a list of queues.

the send queue is now mutexed, which raises the expectation that
packets can be enqueued or purged on one cpu while another cpu is
dequeueing them in a driver for transmission. a lot of drivers use
IFQ_POLL to peek at an mbuf and attempt to fit it on the ring before
committing to it with a later IFQ_DEQUEUE operation. if the mbuf
gets freed in between the POLL and DEQUEUE operations, fireworks
will ensue.

to avoid this, the ifq api introduces ifq_deq_begin, ifq_deq_rollback,
and ifq_deq_commit. ifq_deq_begin allows a driver to take the ifq
mutex and get a reference to the mbuf they wish to try and tx. if
there's space, they can ifq_deq_commit it to remove the mbuf and
release the mutex. if there's no space, ifq_deq_rollback simply
releases the mutex. this api was developed to make updating the
drivers using IFQ_POLL easy, instead of having to do significant
semantic changes to avoid POLL that we cannot test on all the
hardware.

the common code has been tested pretty hard, and all the driver
modifications are straightforward except for de(4). if that breaks
it can be dealt with later.

ok mpi@ jmatthew@

arp_ifinit() is no longer needed.

unifdef INET

Some reallocarray() use; review Jean-Philippe Ouellet, patrick keshishian
ok tedu

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

missing pass DEVNAME(sc), fix format string; OK guenther@

Set the IFF_ALLMULTI flag as appropriate.

ok dlg@

Copy pasto in comment. Fix by brad@ OK dlg@

BUS_DMA_ZERO instead of alloc, map, bzero.

ok krw@

replace custom macro sizeofa() with nitems()

Eliminate the redundant bits of code for MTU and multicast handling
from the individual drivers now that ether_ioctl() handles this.

Shrinks the i386 kernels by..
RAMDISK - 2176 bytes
RAMDISKB - 1504 bytes
RAMDISKC - 736 bytes

Tested by naddy@/okan@/sthen@/brad@/todd@/jmc@ and lots of users.
Build tested on almost all archs by todd@/brad@

ok naddy@

sizeofa -> nitems

dlg says "well, that is embarassing"

First step towards cleaning up the Ethernet driver ioctl handling.
Move calling ether_ioctl() from the top of the ioctl function, which
at the moment does absolutely nothing, to the default switch case.
Thus allowing drivers to define their own ioctl handlers and then
falling back on ether_ioctl(). The only functional change this results
in at the moment is having all Ethernet drivers returning the proper
errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown
ioctl's.

Shrinks the i386 kernels by..
RAMDISK - 1024 bytes
RAMDISKB - 1120 bytes
RAMDISKC - 832 bytes

Tested by martin@/jsing@/todd@/brad@
Build tested on almost all archs by todd@/brad@

ok jsing@

Convert timeout_add() calls using multiples of hz to timeout_add_sec()

Really just the low-hanging fruit of (hopefully) forthcoming timeout
conversions.

ok art@, krw@

Correct defines for NXE_DB_PEGID_RX|TX. OK dlg@

enable ADDMULTI and DELMULTI in the ioctl handler now that the tht
it is plugged into can deal with ipv6. i dont have to be careful
about what i put on the wire anymore.

More easy bzero() -> M_ZERO. Use 'p = malloc(sizeof(*p) ...' where
obvious.

start implementing the rx code. this puts pkts and descriptors onto the
rx ring.

enable interrupts when the interface comes up.

i seem to be crashing the rx unit though which is responsible for
generating the interrupts. i havent got any yet.

this is what the interrupt handler will look like. there'll be some added
lines in here later that call the tx and rx completions.

the chip has three rx rings, one for normal packets, one for jumbos, and
one for lro. the manual says that they all have to have descriptors in them
for correct operation. i dont care about jumbos and lro at this point so im
going to point the descriptors in those rings at a dummy 64k buffer. this
diff adds the allocation of that buffer.

the ring sizes are reprresented by 32 bit fields in the context descirptor,
so use htole32 to get a value for them, not htole64.

implement the completion half of the tx path. the driver keeps track of
mbufs we've put on the hardware with the nxe_pkt struct. this struct
contains a unique id for each pkt which is used the hardwares tx descriptor
so we could identify which pkts its finished transmitting. turns out the
hardware doesnt return ids though, it tells us which slots in the tx ring
its up to. so now i stash the slot a pkt went into in the pkt_id field.

configure the NIU to rx packets that will fit into the mbufs we will
allocate for it, rather than the default of 1600.

wrap writes to the doorbell register.

the first read or write in the crb space after you switch the windows
tends to be junk, except in the pci regs for some reason. read the
crb window register back after setting it to force the junk to go
away. this fixes some really weird issues i had.

program the niu with the mac address in the right order.

tweak the register macros a bit. add macros for the NIUs port registers
which are useful to see whats happening on the wire.

oops, forgot the print the intr string on attach

hook the interrupt up

implement nxe_start. this is enough to put packets on the wire. the sgl
layout of this chip is extremely weird. there's only 4 sg entries in each
tx descriptor, but theyre out of order. you can use multiple tx descriptors
to tx more than 4 segments, but instead of letting you use all 64bytes that
a tx descriptor uses you just use the same 4 sg entries, and up to 8 descs.

program the mac control thing according the the multicast or promisc
settings that we ask for. set these flags when the interface is brought up.

program the lladdr when the chip is brought up.

sync all the bits for use by the hardware, and then point the chip at them.
the firmware is now ready to send and recv packets.

when the interface is brought up allocate all the things that are needed
for the chip to work with, eg, the context region, the cmd consumer, the
cmd/tx ring, the status ring, and the 3 rx rings.
free it all when we bring the chip down.

allocate pkt lists when the interface is brought up.

make nxe_up return void and report its failure by not setting the RUNNING
flag like every other nic ive read.

here are the tx, rx, and status (rx completion) descriptors used in the io
paths.

move the firmware to the right state before we start allocating everything
for it.

lock accesses to the ioctl handler.

this code definitely uses queue.h

tell the ioctl handler to call nxe_up/down/iff at the right times. they
are just stubs at the moment though.

code to allocate, free, sync, and iterate over rings. this is based loosely
on the fifos used in tht. very loosely. tht fifos were set up to take small
writes of varying length and read or write them into the dmaable memory.
nxe has fixed sized descriptors in each ring, so this ring handling is set
up to just give pointers to the memory to be filled in directly. the
iterator just pushes this pointer around the ring.

steal pkt handling from tht. this lets us keep track of mbufs when theyre
on the hardware. it stashes ids and dma bits.

implement link state monitoring. you have to poll the firmware to see the
state of the link. since im doing this already for the temp sensor i merged
the polling for both and do them at the same time. i poll every 5 seconds
now instead of every 60.

i can now tell if the cable between the nxe and tht has fallen out.

white space fixes while im here.

hook up the ether and ifmedia layers. you can see nxe in ifconfig output
now. just the lladdr though, i havent filled in enough of the ioctl handler
for more yet.

hook a kernel sensor up to the temp register on the chip. poll out of a
timeout since reading registers doesnt need a process context.

start the init of the firmware. it can take a long time, so we start it in
attach and make sure its finished at mountroot time.

pull my wrapper around single segment dma allocations in. its got to be at
least half a dozen drivers now that use this.

white space fixes

define the rest of the registers i know about: the interrupt registers,
init, xg config, ring and context addresses, temp sensor, firmware states.

fetch the user info off the board. the lladdr and firmware version are
stored on it.
display the fw and lladdr in attach.

we're a nic, so we need the arpcom and ifmedia structs in our softc

read the board information off the flash. check it, and stash what type of
board they say we are.

provide a map of the board type the flash memory will tell us we are to the
type of interface it provides. drivers need to deal with 10Gb (XGB) and
gigabit (GBE) differently.

code to unmap the register windows if something in attach goes horribly
wrong.

list where different things lie in the flash.
define what the board info and user info regions in the flash look like as
structs.

we're going to spend most of our time in crb window 1, so move the chip
into that window in attach.

move the mapping of the registers out of attach and into their own function

code to read stuff out of the flash chip on the netxen.

code to wait on registers in the main and crb spaces.

add DPRINTF and DASSERT debug macros.

there is flash on the netxens that contains things like the firmware, the
firmware boot loader, and various structs with information about how the
chip is configured. these registers are used to access that flash.

stash the pci function this port is on in the softc.
create a bus_space subregion for the CRB register window.
provide a way to set which crb window you want, and a way to read and write
in it.

start defining the register layout.

the netxen nics are a bit strange. their main register window is HUGE at a
big 128MB size. apparently this isnt enough though, so they used the top
32 meg of the main register space as a window into a 64meg region. which
half of this space (the CRB window) is available is determined by setting
a register INSIDE this window. that register just happens to be available
in both windows. kinda crazy.

read and write routines for the big register window

dont match on nxe boards that dont claim to be network devices.

stash the dma tag.
map the register windows.
put a stub in place for the interrupt handler

enter nxe, a driver for the netxen 10Gb cards.

i have most of this already written but this is just the attach glue. i'll
be adding code in smallish chunks so i can decruft it as i go.

spelling
feedback and ok tb@ jmc@ ok ratchov@

Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.

ok dlg@ tobhe@

consistently uppercase pci product defines

ok mpi@

A pile of sizes to free(9). In test for a few days in snapshots.
Errors will result in nice clean panic messages so we know what's wrong.
Reviewed by dhill visa natano jsg.

move counting if_opackets next to counting if_obytes in if_enqueue.

this means packets are consistently counted in one place, unlike the
many and various ways that drivers thought they should do it.

ok mpi@ deraadt@

G/C IFQ_SET_READY().

Replace mountroothook_establish(9) by config_mountroot(9) a narrower API
similar to config_defer(9).

ok mikeb@, deraadt@

replace IFF_OACTIVE manipulation with mpsafe operations.

there are two things shared between the network stack and drivers
in the send path: the send queue and the IFF_OACTIVE flag. the send
queue is now protected by a mutex. this diff makes the oactive
functionality mpsafe too.

IFF_OACTIVE is part of if_flags. there are two problems with that.
firstly, if_flags is a short and we dont have any MI atomic operations
to manipulate a short. secondly, while we could make the IFF_OACTIVE
operates mpsafe, all changes to other flags would have to be made
safe at the same time, otherwise a read-modify-write cycle on their
updates could clobber the oactive change.

instead, this moves the oactive mark into struct ifqueue and provides
an API for changing it. there's ifq_set_oactive, ifq_clr_oactive,
and ifq_is_oactive. these are modelled on ifsq_set_oactive,
ifsq_clr_oactive, and ifsq_is_oactive in dragonflybsd.

this diff includes changes to all the drivers manipulating IFF_OACTIVE
to now use the ifsq_{set,clr_is}_oactive API too.

ok kettenis@ mpi@ jmatthew@ deraadt@

The only network driver needing <net/if_types.h> is upl(4) for IFT_OTHER.

shuffle struct ifqueue so in flight mbufs are protected by a mutex.

the code is refactored so the IFQ macros call newly implemented ifq
functions. the ifq code is split so each discipline (priq and hfsc
in our case) is an opaque set of operations that the common ifq
code can call. the common code does the locking, accounting (ifq_len
manipulation), and freeing of the mbuf if the disciplines enqueue
function rejects it. theyre kind of like bufqs in the block layer
with their fifo and nscan disciplines.

the new api also supports atomic switching of disciplines at runtime.
the hfsc setup in pf_ioctl.c has been tweaked to build a complete
hfsc_if structure which it attaches to the send queue in a single
operation, rather than attaching to the interface up front and
building up a list of queues.

the send queue is now mutexed, which raises the expectation that
packets can be enqueued or purged on one cpu while another cpu is
dequeueing them in a driver for transmission. a lot of drivers use
IFQ_POLL to peek at an mbuf and attempt to fit it on the ring before
committing to it with a later IFQ_DEQUEUE operation. if the mbuf
gets freed in between the POLL and DEQUEUE operations, fireworks
will ensue.

to avoid this, the ifq api introduces ifq_deq_begin, ifq_deq_rollback,
and ifq_deq_commit. ifq_deq_begin allows a driver to take the ifq
mutex and get a reference to the mbuf they wish to try and tx. if
there's space, they can ifq_deq_commit it to remove the mbuf and
release the mutex. if there's no space, ifq_deq_rollback simply
releases the mutex. this api was developed to make updating the
drivers using IFQ_POLL easy, instead of having to do significant
semantic changes to avoid POLL that we cannot test on all the
hardware.

the common code has been tested pretty hard, and all the driver
modifications are straightforward except for de(4). if that breaks
it can be dealt with later.

ok mpi@ jmatthew@

arp_ifinit() is no longer needed.

unifdef INET

Some reallocarray() use; review Jean-Philippe Ouellet, patrick keshishian
ok tedu

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

missing pass DEVNAME(sc), fix format string; OK guenther@

Set the IFF_ALLMULTI flag as appropriate.

ok dlg@

Copy pasto in comment. Fix by brad@ OK dlg@

BUS_DMA_ZERO instead of alloc, map, bzero.

ok krw@

replace custom macro sizeofa() with nitems()

Eliminate the redundant bits of code for MTU and multicast handling
from the individual drivers now that ether_ioctl() handles this.

Shrinks the i386 kernels by..
RAMDISK - 2176 bytes
RAMDISKB - 1504 bytes
RAMDISKC - 736 bytes

Tested by naddy@/okan@/sthen@/brad@/todd@/jmc@ and lots of users.
Build tested on almost all archs by todd@/brad@

ok naddy@

sizeofa -> nitems

dlg says "well, that is embarassing"

First step towards cleaning up the Ethernet driver ioctl handling.
Move calling ether_ioctl() from the top of the ioctl function, which
at the moment does absolutely nothing, to the default switch case.
Thus allowing drivers to define their own ioctl handlers and then
falling back on ether_ioctl(). The only functional change this results
in at the moment is having all Ethernet drivers returning the proper
errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown
ioctl's.

Shrinks the i386 kernels by..
RAMDISK - 1024 bytes
RAMDISKB - 1120 bytes
RAMDISKC - 832 bytes

Tested by martin@/jsing@/todd@/brad@
Build tested on almost all archs by todd@/brad@

ok jsing@

Convert timeout_add() calls using multiples of hz to timeout_add_sec()

Really just the low-hanging fruit of (hopefully) forthcoming timeout
conversions.

ok art@, krw@

Correct defines for NXE_DB_PEGID_RX|TX. OK dlg@

enable ADDMULTI and DELMULTI in the ioctl handler now that the tht
it is plugged into can deal with ipv6. i dont have to be careful
about what i put on the wire anymore.

More easy bzero() -> M_ZERO. Use 'p = malloc(sizeof(*p) ...' where
obvious.

start implementing the rx code. this puts pkts and descriptors onto the
rx ring.

enable interrupts when the interface comes up.

i seem to be crashing the rx unit though which is responsible for
generating the interrupts. i havent got any yet.

this is what the interrupt handler will look like. there'll be some added
lines in here later that call the tx and rx completions.

the chip has three rx rings, one for normal packets, one for jumbos, and
one for lro. the manual says that they all have to have descriptors in them
for correct operation. i dont care about jumbos and lro at this point so im
going to point the descriptors in those rings at a dummy 64k buffer. this
diff adds the allocation of that buffer.

the ring sizes are reprresented by 32 bit fields in the context descirptor,
so use htole32 to get a value for them, not htole64.

implement the completion half of the tx path. the driver keeps track of
mbufs we've put on the hardware with the nxe_pkt struct. this struct
contains a unique id for each pkt which is used the hardwares tx descriptor
so we could identify which pkts its finished transmitting. turns out the
hardware doesnt return ids though, it tells us which slots in the tx ring
its up to. so now i stash the slot a pkt went into in the pkt_id field.

configure the NIU to rx packets that will fit into the mbufs we will
allocate for it, rather than the default of 1600.

wrap writes to the doorbell register.

the first read or write in the crb space after you switch the windows
tends to be junk, except in the pci regs for some reason. read the
crb window register back after setting it to force the junk to go
away. this fixes some really weird issues i had.

program the niu with the mac address in the right order.

tweak the register macros a bit. add macros for the NIUs port registers
which are useful to see whats happening on the wire.

oops, forgot the print the intr string on attach

hook the interrupt up

implement nxe_start. this is enough to put packets on the wire. the sgl
layout of this chip is extremely weird. there's only 4 sg entries in each
tx descriptor, but theyre out of order. you can use multiple tx descriptors
to tx more than 4 segments, but instead of letting you use all 64bytes that
a tx descriptor uses you just use the same 4 sg entries, and up to 8 descs.

program the mac control thing according the the multicast or promisc
settings that we ask for. set these flags when the interface is brought up.

program the lladdr when the chip is brought up.

sync all the bits for use by the hardware, and then point the chip at them.
the firmware is now ready to send and recv packets.

when the interface is brought up allocate all the things that are needed
for the chip to work with, eg, the context region, the cmd consumer, the
cmd/tx ring, the status ring, and the 3 rx rings.
free it all when we bring the chip down.

allocate pkt lists when the interface is brought up.

make nxe_up return void and report its failure by not setting the RUNNING
flag like every other nic ive read.

here are the tx, rx, and status (rx completion) descriptors used in the io
paths.

move the firmware to the right state before we start allocating everything
for it.

lock accesses to the ioctl handler.

this code definitely uses queue.h

tell the ioctl handler to call nxe_up/down/iff at the right times. they
are just stubs at the moment though.

code to allocate, free, sync, and iterate over rings. this is based loosely
on the fifos used in tht. very loosely. tht fifos were set up to take small
writes of varying length and read or write them into the dmaable memory.
nxe has fixed sized descriptors in each ring, so this ring handling is set
up to just give pointers to the memory to be filled in directly. the
iterator just pushes this pointer around the ring.

steal pkt handling from tht. this lets us keep track of mbufs when theyre
on the hardware. it stashes ids and dma bits.

implement link state monitoring. you have to poll the firmware to see the
state of the link. since im doing this already for the temp sensor i merged
the polling for both and do them at the same time. i poll every 5 seconds
now instead of every 60.

i can now tell if the cable between the nxe and tht has fallen out.

white space fixes while im here.

hook up the ether and ifmedia layers. you can see nxe in ifconfig output
now. just the lladdr though, i havent filled in enough of the ioctl handler
for more yet.

hook a kernel sensor up to the temp register on the chip. poll out of a
timeout since reading registers doesnt need a process context.

start the init of the firmware. it can take a long time, so we start it in
attach and make sure its finished at mountroot time.

pull my wrapper around single segment dma allocations in. its got to be at
least half a dozen drivers now that use this.

white space fixes

define the rest of the registers i know about: the interrupt registers,
init, xg config, ring and context addresses, temp sensor, firmware states.

fetch the user info off the board. the lladdr and firmware version are
stored on it.
display the fw and lladdr in attach.

we're a nic, so we need the arpcom and ifmedia structs in our softc

read the board information off the flash. check it, and stash what type of
board they say we are.

provide a map of the board type the flash memory will tell us we are to the
type of interface it provides. drivers need to deal with 10Gb (XGB) and
gigabit (GBE) differently.

code to unmap the register windows if something in attach goes horribly
wrong.

list where different things lie in the flash.
define what the board info and user info regions in the flash look like as
structs.

we're going to spend most of our time in crb window 1, so move the chip
into that window in attach.

move the mapping of the registers out of attach and into their own function

code to read stuff out of the flash chip on the netxen.

code to wait on registers in the main and crb spaces.

add DPRINTF and DASSERT debug macros.

there is flash on the netxens that contains things like the firmware, the
firmware boot loader, and various structs with information about how the
chip is configured. these registers are used to access that flash.

stash the pci function this port is on in the softc.
create a bus_space subregion for the CRB register window.
provide a way to set which crb window you want, and a way to read and write
in it.

start defining the register layout.

the netxen nics are a bit strange. their main register window is HUGE at a
big 128MB size. apparently this isnt enough though, so they used the top
32 meg of the main register space as a window into a 64meg region. which
half of this space (the CRB window) is available is determined by setting
a register INSIDE this window. that register just happens to be available
in both windows. kinda crazy.

read and write routines for the big register window

dont match on nxe boards that dont claim to be network devices.

stash the dma tag.
map the register windows.
put a stub in place for the interrupt handler

enter nxe, a driver for the netxen 10Gb cards.

i have most of this already written but this is just the attach glue. i'll
be adding code in smallish chunks so i can decruft it as i go.

Change users of IFQ_SET_MAXLEN() and IFQ_IS_EMPTY() to use the "new" API.

ok dlg@ tobhe@

consistently uppercase pci product defines

ok mpi@

A pile of sizes to free(9). In test for a few days in snapshots.
Errors will result in nice clean panic messages so we know what's wrong.
Reviewed by dhill visa natano jsg.

move counting if_opackets next to counting if_obytes in if_enqueue.

this means packets are consistently counted in one place, unlike the
many and various ways that drivers thought they should do it.

ok mpi@ deraadt@

G/C IFQ_SET_READY().

Replace mountroothook_establish(9) by config_mountroot(9) a narrower API
similar to config_defer(9).

ok mikeb@, deraadt@

replace IFF_OACTIVE manipulation with mpsafe operations.

there are two things shared between the network stack and drivers
in the send path: the send queue and the IFF_OACTIVE flag. the send
queue is now protected by a mutex. this diff makes the oactive
functionality mpsafe too.

IFF_OACTIVE is part of if_flags. there are two problems with that.
firstly, if_flags is a short and we dont have any MI atomic operations
to manipulate a short. secondly, while we could make the IFF_OACTIVE
operates mpsafe, all changes to other flags would have to be made
safe at the same time, otherwise a read-modify-write cycle on their
updates could clobber the oactive change.

instead, this moves the oactive mark into struct ifqueue and provides
an API for changing it. there's ifq_set_oactive, ifq_clr_oactive,
and ifq_is_oactive. these are modelled on ifsq_set_oactive,
ifsq_clr_oactive, and ifsq_is_oactive in dragonflybsd.

this diff includes changes to all the drivers manipulating IFF_OACTIVE
to now use the ifsq_{set,clr_is}_oactive API too.

ok kettenis@ mpi@ jmatthew@ deraadt@

The only network driver needing <net/if_types.h> is upl(4) for IFT_OTHER.

shuffle struct ifqueue so in flight mbufs are protected by a mutex.

the code is refactored so the IFQ macros call newly implemented ifq
functions. the ifq code is split so each discipline (priq and hfsc
in our case) is an opaque set of operations that the common ifq
code can call. the common code does the locking, accounting (ifq_len
manipulation), and freeing of the mbuf if the disciplines enqueue
function rejects it. theyre kind of like bufqs in the block layer
with their fifo and nscan disciplines.

the new api also supports atomic switching of disciplines at runtime.
the hfsc setup in pf_ioctl.c has been tweaked to build a complete
hfsc_if structure which it attaches to the send queue in a single
operation, rather than attaching to the interface up front and
building up a list of queues.

the send queue is now mutexed, which raises the expectation that
packets can be enqueued or purged on one cpu while another cpu is
dequeueing them in a driver for transmission. a lot of drivers use
IFQ_POLL to peek at an mbuf and attempt to fit it on the ring before
committing to it with a later IFQ_DEQUEUE operation. if the mbuf
gets freed in between the POLL and DEQUEUE operations, fireworks
will ensue.

to avoid this, the ifq api introduces ifq_deq_begin, ifq_deq_rollback,
and ifq_deq_commit. ifq_deq_begin allows a driver to take the ifq
mutex and get a reference to the mbuf they wish to try and tx. if
there's space, they can ifq_deq_commit it to remove the mbuf and
release the mutex. if there's no space, ifq_deq_rollback simply
releases the mutex. this api was developed to make updating the
drivers using IFQ_POLL easy, instead of having to do significant
semantic changes to avoid POLL that we cannot test on all the
hardware.

the common code has been tested pretty hard, and all the driver
modifications are straightforward except for de(4). if that breaks
it can be dealt with later.

ok mpi@ jmatthew@

arp_ifinit() is no longer needed.

unifdef INET

Some reallocarray() use; review Jean-Philippe Ouellet, patrick keshishian
ok tedu

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

missing pass DEVNAME(sc), fix format string; OK guenther@

Set the IFF_ALLMULTI flag as appropriate.

ok dlg@

Copy pasto in comment. Fix by brad@ OK dlg@

BUS_DMA_ZERO instead of alloc, map, bzero.

ok krw@

replace custom macro sizeofa() with nitems()

Eliminate the redundant bits of code for MTU and multicast handling
from the individual drivers now that ether_ioctl() handles this.

Shrinks the i386 kernels by..
RAMDISK - 2176 bytes
RAMDISKB - 1504 bytes
RAMDISKC - 736 bytes

Tested by naddy@/okan@/sthen@/brad@/todd@/jmc@ and lots of users.
Build tested on almost all archs by todd@/brad@

ok naddy@

sizeofa -> nitems

dlg says "well, that is embarassing"

First step towards cleaning up the Ethernet driver ioctl handling.
Move calling ether_ioctl() from the top of the ioctl function, which
at the moment does absolutely nothing, to the default switch case.
Thus allowing drivers to define their own ioctl handlers and then
falling back on ether_ioctl(). The only functional change this results
in at the moment is having all Ethernet drivers returning the proper
errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown
ioctl's.

Shrinks the i386 kernels by..
RAMDISK - 1024 bytes
RAMDISKB - 1120 bytes
RAMDISKC - 832 bytes

Tested by martin@/jsing@/todd@/brad@
Build tested on almost all archs by todd@/brad@

ok jsing@

Convert timeout_add() calls using multiples of hz to timeout_add_sec()

Really just the low-hanging fruit of (hopefully) forthcoming timeout
conversions.

ok art@, krw@

Correct defines for NXE_DB_PEGID_RX|TX. OK dlg@

enable ADDMULTI and DELMULTI in the ioctl handler now that the tht
it is plugged into can deal with ipv6. i dont have to be careful
about what i put on the wire anymore.

More easy bzero() -> M_ZERO. Use 'p = malloc(sizeof(*p) ...' where
obvious.

start implementing the rx code. this puts pkts and descriptors onto the
rx ring.

enable interrupts when the interface comes up.

i seem to be crashing the rx unit though which is responsible for
generating the interrupts. i havent got any yet.

this is what the interrupt handler will look like. there'll be some added
lines in here later that call the tx and rx completions.

the chip has three rx rings, one for normal packets, one for jumbos, and
one for lro. the manual says that they all have to have descriptors in them
for correct operation. i dont care about jumbos and lro at this point so im
going to point the descriptors in those rings at a dummy 64k buffer. this
diff adds the allocation of that buffer.

the ring sizes are reprresented by 32 bit fields in the context descirptor,
so use htole32 to get a value for them, not htole64.

implement the completion half of the tx path. the driver keeps track of
mbufs we've put on the hardware with the nxe_pkt struct. this struct
contains a unique id for each pkt which is used the hardwares tx descriptor
so we could identify which pkts its finished transmitting. turns out the
hardware doesnt return ids though, it tells us which slots in the tx ring
its up to. so now i stash the slot a pkt went into in the pkt_id field.

configure the NIU to rx packets that will fit into the mbufs we will
allocate for it, rather than the default of 1600.

wrap writes to the doorbell register.

the first read or write in the crb space after you switch the windows
tends to be junk, except in the pci regs for some reason. read the
crb window register back after setting it to force the junk to go
away. this fixes some really weird issues i had.

program the niu with the mac address in the right order.

tweak the register macros a bit. add macros for the NIUs port registers
which are useful to see whats happening on the wire.

oops, forgot the print the intr string on attach

hook the interrupt up

implement nxe_start. this is enough to put packets on the wire. the sgl
layout of this chip is extremely weird. there's only 4 sg entries in each
tx descriptor, but theyre out of order. you can use multiple tx descriptors
to tx more than 4 segments, but instead of letting you use all 64bytes that
a tx descriptor uses you just use the same 4 sg entries, and up to 8 descs.

program the mac control thing according the the multicast or promisc
settings that we ask for. set these flags when the interface is brought up.

program the lladdr when the chip is brought up.

sync all the bits for use by the hardware, and then point the chip at them.
the firmware is now ready to send and recv packets.

when the interface is brought up allocate all the things that are needed
for the chip to work with, eg, the context region, the cmd consumer, the
cmd/tx ring, the status ring, and the 3 rx rings.
free it all when we bring the chip down.

allocate pkt lists when the interface is brought up.

make nxe_up return void and report its failure by not setting the RUNNING
flag like every other nic ive read.

here are the tx, rx, and status (rx completion) descriptors used in the io
paths.

move the firmware to the right state before we start allocating everything
for it.

lock accesses to the ioctl handler.

this code definitely uses queue.h

tell the ioctl handler to call nxe_up/down/iff at the right times. they
are just stubs at the moment though.

code to allocate, free, sync, and iterate over rings. this is based loosely
on the fifos used in tht. very loosely. tht fifos were set up to take small
writes of varying length and read or write them into the dmaable memory.
nxe has fixed sized descriptors in each ring, so this ring handling is set
up to just give pointers to the memory to be filled in directly. the
iterator just pushes this pointer around the ring.

steal pkt handling from tht. this lets us keep track of mbufs when theyre
on the hardware. it stashes ids and dma bits.

implement link state monitoring. you have to poll the firmware to see the
state of the link. since im doing this already for the temp sensor i merged
the polling for both and do them at the same time. i poll every 5 seconds
now instead of every 60.

i can now tell if the cable between the nxe and tht has fallen out.

white space fixes while im here.

hook up the ether and ifmedia layers. you can see nxe in ifconfig output
now. just the lladdr though, i havent filled in enough of the ioctl handler
for more yet.

hook a kernel sensor up to the temp register on the chip. poll out of a
timeout since reading registers doesnt need a process context.

start the init of the firmware. it can take a long time, so we start it in
attach and make sure its finished at mountroot time.

pull my wrapper around single segment dma allocations in. its got to be at
least half a dozen drivers now that use this.

white space fixes

define the rest of the registers i know about: the interrupt registers,
init, xg config, ring and context addresses, temp sensor, firmware states.

fetch the user info off the board. the lladdr and firmware version are
stored on it.
display the fw and lladdr in attach.

we're a nic, so we need the arpcom and ifmedia structs in our softc

read the board information off the flash. check it, and stash what type of
board they say we are.

provide a map of the board type the flash memory will tell us we are to the
type of interface it provides. drivers need to deal with 10Gb (XGB) and
gigabit (GBE) differently.

code to unmap the register windows if something in attach goes horribly
wrong.

list where different things lie in the flash.
define what the board info and user info regions in the flash look like as
structs.

we're going to spend most of our time in crb window 1, so move the chip
into that window in attach.

move the mapping of the registers out of attach and into their own function

code to read stuff out of the flash chip on the netxen.

code to wait on registers in the main and crb spaces.

add DPRINTF and DASSERT debug macros.

there is flash on the netxens that contains things like the firmware, the
firmware boot loader, and various structs with information about how the
chip is configured. these registers are used to access that flash.

stash the pci function this port is on in the softc.
create a bus_space subregion for the CRB register window.
provide a way to set which crb window you want, and a way to read and write
in it.

start defining the register layout.

the netxen nics are a bit strange. their main register window is HUGE at a
big 128MB size. apparently this isnt enough though, so they used the top
32 meg of the main register space as a window into a 64meg region. which
half of this space (the CRB window) is available is determined by setting
a register INSIDE this window. that register just happens to be available
in both windows. kinda crazy.

read and write routines for the big register window

dont match on nxe boards that dont claim to be network devices.

stash the dma tag.
map the register windows.
put a stub in place for the interrupt handler

enter nxe, a driver for the netxen 10Gb cards.

i have most of this already written but this is just the attach glue. i'll
be adding code in smallish chunks so i can decruft it as i go.

consistently uppercase pci product defines

ok mpi@

A pile of sizes to free(9). In test for a few days in snapshots.
Errors will result in nice clean panic messages so we know what's wrong.
Reviewed by dhill visa natano jsg.

move counting if_opackets next to counting if_obytes in if_enqueue.

this means packets are consistently counted in one place, unlike the
many and various ways that drivers thought they should do it.

ok mpi@ deraadt@

G/C IFQ_SET_READY().

Replace mountroothook_establish(9) by config_mountroot(9) a narrower API
similar to config_defer(9).

ok mikeb@, deraadt@

replace IFF_OACTIVE manipulation with mpsafe operations.

there are two things shared between the network stack and drivers
in the send path: the send queue and the IFF_OACTIVE flag. the send
queue is now protected by a mutex. this diff makes the oactive
functionality mpsafe too.

IFF_OACTIVE is part of if_flags. there are two problems with that.
firstly, if_flags is a short and we dont have any MI atomic operations
to manipulate a short. secondly, while we could make the IFF_OACTIVE
operates mpsafe, all changes to other flags would have to be made
safe at the same time, otherwise a read-modify-write cycle on their
updates could clobber the oactive change.

instead, this moves the oactive mark into struct ifqueue and provides
an API for changing it. there's ifq_set_oactive, ifq_clr_oactive,
and ifq_is_oactive. these are modelled on ifsq_set_oactive,
ifsq_clr_oactive, and ifsq_is_oactive in dragonflybsd.

this diff includes changes to all the drivers manipulating IFF_OACTIVE
to now use the ifsq_{set,clr_is}_oactive API too.

ok kettenis@ mpi@ jmatthew@ deraadt@

The only network driver needing <net/if_types.h> is upl(4) for IFT_OTHER.

shuffle struct ifqueue so in flight mbufs are protected by a mutex.

the code is refactored so the IFQ macros call newly implemented ifq
functions. the ifq code is split so each discipline (priq and hfsc
in our case) is an opaque set of operations that the common ifq
code can call. the common code does the locking, accounting (ifq_len
manipulation), and freeing of the mbuf if the disciplines enqueue
function rejects it. theyre kind of like bufqs in the block layer
with their fifo and nscan disciplines.

the new api also supports atomic switching of disciplines at runtime.
the hfsc setup in pf_ioctl.c has been tweaked to build a complete
hfsc_if structure which it attaches to the send queue in a single
operation, rather than attaching to the interface up front and
building up a list of queues.

the send queue is now mutexed, which raises the expectation that
packets can be enqueued or purged on one cpu while another cpu is
dequeueing them in a driver for transmission. a lot of drivers use
IFQ_POLL to peek at an mbuf and attempt to fit it on the ring before
committing to it with a later IFQ_DEQUEUE operation. if the mbuf
gets freed in between the POLL and DEQUEUE operations, fireworks
will ensue.

to avoid this, the ifq api introduces ifq_deq_begin, ifq_deq_rollback,
and ifq_deq_commit. ifq_deq_begin allows a driver to take the ifq
mutex and get a reference to the mbuf they wish to try and tx. if
there's space, they can ifq_deq_commit it to remove the mbuf and
release the mutex. if there's no space, ifq_deq_rollback simply
releases the mutex. this api was developed to make updating the
drivers using IFQ_POLL easy, instead of having to do significant
semantic changes to avoid POLL that we cannot test on all the
hardware.

the common code has been tested pretty hard, and all the driver
modifications are straightforward except for de(4). if that breaks
it can be dealt with later.

ok mpi@ jmatthew@

arp_ifinit() is no longer needed.

unifdef INET

Some reallocarray() use; review Jean-Philippe Ouellet, patrick keshishian
ok tedu

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

missing pass DEVNAME(sc), fix format string; OK guenther@

Set the IFF_ALLMULTI flag as appropriate.

ok dlg@

Copy pasto in comment. Fix by brad@ OK dlg@

BUS_DMA_ZERO instead of alloc, map, bzero.

ok krw@

replace custom macro sizeofa() with nitems()

Eliminate the redundant bits of code for MTU and multicast handling
from the individual drivers now that ether_ioctl() handles this.

Shrinks the i386 kernels by..
RAMDISK - 2176 bytes
RAMDISKB - 1504 bytes
RAMDISKC - 736 bytes

Tested by naddy@/okan@/sthen@/brad@/todd@/jmc@ and lots of users.
Build tested on almost all archs by todd@/brad@

ok naddy@

sizeofa -> nitems

dlg says "well, that is embarassing"

First step towards cleaning up the Ethernet driver ioctl handling.
Move calling ether_ioctl() from the top of the ioctl function, which
at the moment does absolutely nothing, to the default switch case.
Thus allowing drivers to define their own ioctl handlers and then
falling back on ether_ioctl(). The only functional change this results
in at the moment is having all Ethernet drivers returning the proper
errno of ENOTTY instead of EINVAL/ENXIO when encountering unknown
ioctl's.

Shrinks the i386 kernels by..
RAMDISK - 1024 bytes
RAMDISKB - 1120 bytes
RAMDISKC - 832 bytes

Tested by martin@/jsing@/todd@/brad@
Build tested on almost all archs by todd@/brad@

ok jsing@

Convert timeout_add() calls using multiples of hz to timeout_add_sec()

Really just the low-hanging fruit of (hopefully) forthcoming timeout
conversions.

ok art@, krw@

Correct defines for NXE_DB_PEGID_RX|TX. OK dlg@

enable ADDMULTI and DELMULTI in the ioctl handler now that the tht
it is plugged into can deal with ipv6. i dont have to be careful
about what i put on the wire anymore.

More easy bzero() -> M_ZERO. Use 'p = malloc(sizeof(*p) ...' where
obvious.

start implementing the rx code. this puts pkts and descriptors onto the
rx ring.

enable interrupts when the interface comes up.

i seem to be crashing the rx unit though which is responsible for
generating the interrupts. i havent got any yet.

this is what the interrupt handler will look like. there'll be some added
lines in here later that call the tx and rx completions.

the chip has three rx rings, one for normal packets, one for jumbos, and
one for lro. the manual says that they all have to have descriptors in them
for correct operation. i dont care about jumbos and lro at this point so im
going to point the descriptors in those rings at a dummy 64k buffer. this
diff adds the allocation of that buffer.

the ring sizes are reprresented by 32 bit fields in the context descirptor,
so use htole32 to get a value for them, not htole64.

implement the completion half of the tx path. the driver keeps track of
mbufs we've put on the hardware with the nxe_pkt struct. this struct
contains a unique id for each pkt which is used the hardwares tx descriptor
so we could identify which pkts its finished transmitting. turns out the
hardware doesnt return ids though, it tells us which slots in the tx ring
its up to. so now i stash the slot a pkt went into in the pkt_id field.

configure the NIU to rx packets that will fit into the mbufs we will
allocate for it, rather than the default of 1600.