remove unneeded includes; ok miod@

remove prototypes with no matching function
ok mpi@

Constify struct cfattach.

Update shared drm code, inteldrm(4) and radeondrm(4) from linux 4.4 to
linux 4.19.34.

Adds support for more Intel hardware:
Broxton/Apollo Lake (was is_preliminary in 4.4)
Amber Lake (another Kaby Lake refresh)
Gemini Lake
Coffee Lake
Whiskey Lake
Cannon Lake (though no hardware with Intel graphics ever shipped)
Ice Lake (alpha support, hardware not released)

This does not add support for new radeon hardware on the AMD side as
newer radeons have a different kernel driver (amdgpu).

Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for
helping and a bunch of other developers for testing.

Remove code that has been unused ever since we removed the agp ioctl interface.

ok mpi@

Make inteldrm(4) attach to pci(4) instead of vga(4) just like radeondrm(4).
This is needed for machines where Intel graphics isn't the primary graphics
device and on systems with UEFI firmware that put the device in non-VGA mode.

ok jsg@

Remove evil hack. I've never seen the printf fire, and xenocara no longer
contains any code that can manipulate the affected register directly.

ok jsg@

sizes for free(); ok semarie

Add the required includes for the conditional parts of
struct vga_pci_softc in vga_pcivar.h

Original diff from guenther@ changed to incorporate feedback
from kettenis@ and myself.

Match q33 devices. Previously only inteldrm matched on q33,
which would lead to a panic.
Problem reported by karlis.mikelsons at lf.lv.

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

Move GTT management for Sandy Bridge and up into inteldrm(4). This makes
it possible to use the non-mappable part of the GTT, prepares the way for
using the PPGTT and reduces the diffs with Linux.

ok jsg@

No need to include <sys/lock.h> when only <sys/rwlock.h> is needed,
so remove the former and include the latter instead of pulling it
in <dev/pci/agpvar.h>. This header already requires various other
types anyway. While here remove unneeded headers.

The AGP ioctl interface is gone; remove the header file as well.

ok matthieu@

Don't bitch about binding into stolen memory on older hardware either.

Remove some code that has no effect.

We're never going to detach the host bridge on our machines.

spotted by deraadt@ during n2k14

Remove MD intagp(4) code that is unused now that inteldrm(4) manages the GTT
all by itself.

Move the GTT management into the inteldrm driver. It is really obvious now
that this is necessary as on some hardware we need guard pages between
regions that have different cache attributes. Even if this appears to cause
regressions on some hardware, this change is a necessary (but not sufficient)
step to fix the cache coherency problems on the affected hardware.

ok jsg@

Add the remaining support code for 4th gen Intel Core/Haswell graphics
and match the same pci devices Linux does. Untested for lack of
hardware but should work. Note that 3D/OpenGL won't work until
we update to a newer version of Mesa, which can't happen until
the Radeon KMS work is ready.

ok deraadt@

sync the list of pre haswell intel video devices with linux
ok kettenis@

Add support for Intel E7221 integrated graphics.

ok jsg@

Even though Sandy Bridge and Ivy Bridge have stolen memory, substracting it
from the GTT aperture doesn't make a lot of sense. On some machines the
amount of stolen memory is the same size of even larger than the aperture!
So pretend that there is no stolen memory on these systems for now.

ok jsg@

Indirectly pass the cache level down to agp by abusing spare bus_dma bits.
Currently only used on gen6+, everything else keeps the old semantics.

gen6+ can do 40 bit addressing

stash the number of stolen entries in the agp struct
will be used in a future commit

Add minimal support for gen7/ivy bridge in inteldrm.
Like gen6/sandy bridge this is enough to manage memory but
does not attempt to setup the rings.
ok kettenis@

Initial kernel support for sandybridge intel chipsets in intagp and inteldrm.

Far from perfect. Extra (almost essential) features like the extra
ringbuffers are not yet supported (I have half a diff), but this and the
appropriate ddx patches allow modesetting and basic shadow acceleration.

Initial work by jcs@, a few cleanups and bugfixes by me.

Tested by many on all appropriate chipsets. ok kettenis@

Rev 1.67 of intagp (agp_i810.c) was added to deal with the problem
where stuff was bound for a software fallback while we were vt switched,
so we couldn't assume that the aperture was clear.

Turns out that the 855 at least does not like this (the !stolen bits of
the bar at least are write-only), and this caused a gpu lockup on any
suspend that used that activate handler.

So this diff fixes it in a more complete way:

Firstly revert 1.67 of agp_i810.c, secondly add a DVACT_QUIESCE handler
to inteldrm, and in it we do three things:

1) set a flag that causes any ioctl or pagefault to sleep until the flag
is cleared so that we don't end up with something doing the following
(for example:)
- bind object
- do another blocking operation in the same ioctl/fault
< suspend happens here, followed by resume>
- wake up assuming that the object is still bound and continue along our
merry way

2) Wait for all current entrypoints to finish (so that 1) is actually
effective we need to first quiesce our callers before we continue).

3) unbind everything that is in the gtt

On resume we clear the quiet flag, and everything can continue as
expected.

Behaves as expected for me on: 855 (x40 in acpi mode), gm965 (x61s) and
arrandale (x201) over multiple suspend cycles. Also tested by several on
tech.

remove argnames from prototype.

no binary change.

Previous code to handle suspend/resume for intagp assumed that
everything was unbound before we go down.

Due to software fallbacks from the vt-switched X this is not strictly
true, so save/restore the gtt (which is stored in a BAR and thus
volatile).

i915 and i945 still have some (unrelated) coruption on dzen2 on resume
which I am looking for still (theory: fence registers), but this helps a
LOT of machines.

``commit'' deraadt@. tested by many (and in snaps the last few days.

spacing; ok deraadt@

braces define scope, not indentation. found hunting uninit bugs. ok oga

add support for ironlake (clarkdale and arrandale, i.e. core i3 and core
i5 internal graphics) to intagp.

While technically this acts like a g4X here, add our own flag because I
anticipate crazy errata and practically costs nothing.

Including other diffs this was tested on two different x201's, a t510
and a t410, worked on all.

Add Pineview M to intagp and inteldrm.

Tested (and initial tweaked diff) from Erik Mugele; thanks!

Support Pineview IGD in intagp.

Tested by Jan Stary, thanks!

these files don't need to include proc.h anymore. ok oga for agp

Make intagp restore pgtbl_ctl and the scratch page to the gtt on resume.

When we move more towards kms we'll need to save/restore what is bound
to the aperture, but right now this is not needed (since we always
unbind everything before we go down anyway).

"can not hurt" deraadt@. tested by halex, deraadt and maybe some others.

Attach intagp on the G41 also.

tested by eric@.

memory leaks found by parfait; ok oga

unfuck the rest of the way. when we bind the scribble pages to the
aperture, skip over dcache on i810 chipsets and stolen memory on later
chips.

I didn't notice this before because I mostly used this code with GEM
code, which doesn't use the stolen memory.

unfuck slightly, offset was wrong.

add an interface to agp to create a bus_dma_tag over a range of the
aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.

This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.

Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.

If flags to bind_page include BUS_DMA_COHERENT, set the snooped bit on
the pte.

This is currently unused, but will be used soon.

Instead of using magic numbers, define the bits that we set in gtt ptes
and use those defines.

Change agp attach (again) so that the driver passes in the aperture size.

While the aperture size may change during attach, it never changes after
the end of the subdriver attach function, so getting this value with a
function is a waste of time. shrinks things slightly and makes the code
clearer.

In preparation for using agp as a bus_dma backend for drm, convert the bind_page
and unbind_page callbacks from

int bind_page(void *, off_t, bus_addr_t)

to

void bind_page(void *, bus_addr_t, paddr_t, int)

We can make these function void by making sure that the agp code sanity
checks properly (it already mostly did), so by definition these
functions may not fail. The flags field is currently unused (intagp at
least will have a use for it soon).

Been in my tree for ages.

change agp driver attach so that the driver passes in the base address
of its aperture, instead of the BAR and memory type. This is a little
larger, but allows the driver to know it's aperture address. Needed for
some future stuff.

Apply the cleanup stick.

make write_gatt actually readable, and a tad smaller. Don't use macros when we
can just call the damned function. coalesce a few bits of code.

as a bonus this actually fixes a bus in the i810/815 dcache case since we got
the offset wrong (confirmed by looking at the datasheet).

Don't map all agp memory we allocate.

If we're just going to be making it available to userland (the X
server), just use load_raw and make sure it's zeroed with BUS_DMA_ZERO.
Should save $AMOUNT_BOUND_TO_GART kva. Most kernel users also write
through the gart, so no mapping there either.

tested by sthen and todd a while back.

Add a bit of sanity-checking paranoia

Don't leak the dmamap on freeing memory.

Attach agp(4) to the Intel 946GZ integrated video.
Tested on Asus P5B-MX motherboard.

ok kettenis@, oga@

Fix support for earlier i8XX chipsets (specifically the 830 and 840).

Earlier changes meant that we were reading the wrong register, on the
graphics card instead of the gmch (bus 0, device 0, function 0. it's the
memory controller on all boards with intel chipsets). Later chipsets
have a ``mirror'' register on the graphics card device, explaining why
this didn't manifest on all chipsets. For simplicity, always find and
read the register from the GMCH. While i'm here, fixup unaligned
configuration space access (0x50 vs 0x52)

Tested by several.

intagp support for Intel 4-series (e.g. GM45) chipsets.

Tested by several x200 owners.

Rework that way that agp attaches.

previously, we had a static list of pcidevs and which agp driver would
be interanlly attached. Instead, split the agp drivers so they work like
audio(4), where we attach a driver, which sets up some callbacks and
initial state, then attaches the interface (agp(4)). Since this allows
us to attach different drivers in different places, and give them
/proper/ probe functions move most of the drivers back to attaching at
pchb, where they should, and intagp (formerly agp_i810) stays attaching
at vga, since it's part of the intel integrated graphics chips.

Diff shrinks the kernel slightly, gets rid of the annoying "no integrated
graphics" warning, and allows more cleanup later.

Tested by many. fix for alpha build (the only other vga_pci.c consumer)
suggested by miod.

Attach agp(4) to the Intel Q35 integrated video.
Tested on ASUS P5E-VM DO motherboard.

ok oga

Right now agp_generic_enable() is wrong. It has been since 2006. It
assumes that the display device and the agp bridge are the same device.
In almost all cases this is incorrect.

In order to correctly enable the agp device with the correct mode, we
need to set the AGP_COMMAND register on both the display and the bridge
with the right bits. Since agp is currently attaching at vga(4), due to
the problems with the intel integrated graphics (a problem that I still
need to solve, to be honest), for now just provide both pci_attach_args
to the agp init, and get what we need from there to do the enable.

This fixes the "agp bug" which i have been known to rant about, a lot.
So agp radeons now work with dri without needing to be forced to pci
mode.

This wasn't detected before, since the only non-drm consumer of agp is
the intel X driver, the i810 agp driver has its own enable function.

tested by many. ok kettenis@.

Add AGP and hostbridge support for the Intel 82945GME chipset.

ok jsg@

Support the Intel G35 which apparently works similarly to the 965.

Initial information, half the diff, and testing from Andrew Lutomirski,
thanks!

Move a debug printf into #ifdef DEBUG. ok todd@, millert@.

add Intel GME965

ok kettenis@

currently agp_i810 needs to map the same BAR as inteldrm, this obviously
fails.

In order to allow this, implement an API so that drm and agp can share
mappings for the BARs. Now it works as it should.

tested by many.
ok kettenis, miod said he'd look at it when it's in tree.

Sometimes the registers claiming the aperture size on 9XX chipsets lie.

So instead, use the size of the aperture BAR to determine the aperture
size for agp_i810, and don't let the 855 and above have the aperture
set. Next to nothing uses it anyway so no harm.

introduce generic_{get,set} aperture which has this behaviour so other
drivers may use it if useful.

Change inspired by what freebsd did after i noticed my aperture size was
wrong.

Tested by many, ok kettenis@.

Add AGP support for the Intel G33 chipset.
Tested on i386 with a Gigabyte G33M-DS2R motherboard (Intel GMA 3100).
Based on NetBSD code.

ok oga@

Clean up Intel host bridge PCI IDs.

ok deraadt@

Fix the issue with some intel 965 host busses. Though the docs claim that the
mmaddr BAR is alway 64-bit, they lie. one some bridges it's not.

Fix this by checking which type of memory it is before trying to map.

Advice and ok kettenis@, Tested by myself and Matthew L. Shobe

Kill a check for malloc fail. The malloc call uses M_WAITOK and thus
should not be able to fail.

ok kettenis@.

Make the "can't find VGA config space" error sound less scary. This
happens sometimes on intel PCI-E chipsets where integrated graphics
have been disabled.

ok kettenis, deraadt.

Restore "evil hack" that we had before the recent agp(4) changes. Solves
X display corruption.

People should know better than just importing the latest random crap from
NetBSD or FreeBSD. That's worse than doing a "commit and run".

sturm@ let me know that the workaround in here breaks things on bge somehow.

Revert it for now.

KNF, no binary change.

Looked over by a few people.

Destatic functions in the agp subsystem.

KNF coming shortly.

ok marco, jsg and mbalmer

Put back some of the handling for writes to the GATT on intel
agp bridges. This got lost in the merge before.

Tested by Peter Hessler on amd64. ok tedu

Initial import of the DRM (direct rendering manager).

This is the kernel part necessary for DRI support in X. Disabled for now
because it still has a few bugs, but now I can work on it in tree. Also
requires the requisite bits in X, which are currently under discussion
on how to deal with them with privsep. ported from a combination of the
free and netbsd implementations.

Known bugs:
1) only the first occurence of X in any session will have dri, after
that something prevents it working.
2) if the machine does not have a dri capable card, the kernel panics.
Something's up in one of the probe functions. I haven't been able to
find it though.
3) radeon cards need to be forced to use PCI mode otherwise they get
into an infinite loop.

This is known to at least kinda work with SiS, radeons in pci mode and
intel cards.

ok deraadt, kinda ok art, a few other people had a quick look.

do not check malloc return value against NULL, as M_WAITOK is used

ok oga@

correct newlines surrounding the sub-bus configuration, and unify
pchb's further
ok reyk oga

fix new agp code on amd64
- internal intel graphics semi-agp chipsets need special handling in pchb.c
- re-add the i965GM device
- use the correct major device id for /dev/agp0 on amd64 (not the i386 one)

ok deraadt@

Fix hardware cursor mapping.

ok matthieu.

Make agp attach as a device. This means that many more agp bridges
actually get detected and attached. Also adds a kernel api for
manipulating agp.

Enable this on i386 and amd64.

"I think you should commit it" deraadt@, ok matthieu. Looked over by
several others.

Simpliest memset(,0,) -> M_ZERO changes. One (caddr *) cast removal,
otherwise just adding M_ZERO to malloc() and removing the immediately
adjacent memset(,0,).

Only the most obvious bzero() -> M_ZERO changes. No cast changes, no
MALLOC/FREE, etc. Just adding M_ZERO to malloc() and deleting an
immediately adjacent bzero().

Add AGP support for the intel i965 chipset, this also extends the
internal AGP API to work with 64bit PCI-Express memory and
non-standard AGP aperture bases.

tested by many
ok matthieu@, deraadt@

In agp_i810_alloc_memory(), do not check for sc_maxmem limit reached, as the
caller has already done this.
Test matthieu@ ok deraadt@

Add AGP support for Intel 945G/GM chipsets. The 945GM (mobile) variant
also needs a X.org update, which will go in later.

Tested by a bunch of people; ok deraadt@

Patch from Dimitry Andric to fix the allocation of 4 pages of gart
memory for hardware cursor. Tested by many, ok tedu@

New version of i915 supprotm adapted from freebsd by Dimitry Andric, with
one tweak suggested by miod@.

Back out i915 changes; they broke some i810-based machines.

support i915. adapted from freebsd by Dimitry Andric. does not break
at least i810 on x40, but made x41 work. ok matthieu

fix merge misses
tested by millert, mbalmer and me; ok grange, mickey

Support for i852/855/865 AGP; from NetBSD via Michael van der
Westhuizen <michael@skanky.homeunix.net> with little tweaks.

Tested by millert@ todd@ jmc@ andreas@ and jcs@'s friend
ok millert@

Correct checks for non-i810 chip; from FreeBSD.

test and ok millert@

branches: 1.5.4;
Add i830 support from NetBSD via patch in kernel/3150.
Verified to not break i81[05] and tested on two i830s.

proper free order; from sturm@

branches: 1.3.4;
- some KNF.
- comment out debugging printf for i810.
- remove checks for failure if malloc is used with M_WAITOK.

mickey@ ok.

remove a bunch of debugging printfs and disable agp_debug; prompted by millert@

support for the agp gart on various agp chipsets.
only i810 driver was tested though.
based on the netbsd's lkm, initially ported
by hunter@dg.net.ua and later made into shape by mickey.
testing by art@ and millert@ .

remove prototypes with no matching function
ok mpi@

Constify struct cfattach.

Update shared drm code, inteldrm(4) and radeondrm(4) from linux 4.4 to
linux 4.19.34.

Adds support for more Intel hardware:
Broxton/Apollo Lake (was is_preliminary in 4.4)
Amber Lake (another Kaby Lake refresh)
Gemini Lake
Coffee Lake
Whiskey Lake
Cannon Lake (though no hardware with Intel graphics ever shipped)
Ice Lake (alpha support, hardware not released)

This does not add support for new radeon hardware on the AMD side as
newer radeons have a different kernel driver (amdgpu).

Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for
helping and a bunch of other developers for testing.

Remove code that has been unused ever since we removed the agp ioctl interface.

ok mpi@

Make inteldrm(4) attach to pci(4) instead of vga(4) just like radeondrm(4).
This is needed for machines where Intel graphics isn't the primary graphics
device and on systems with UEFI firmware that put the device in non-VGA mode.

ok jsg@

Remove evil hack. I've never seen the printf fire, and xenocara no longer
contains any code that can manipulate the affected register directly.

ok jsg@

sizes for free(); ok semarie

Add the required includes for the conditional parts of
struct vga_pci_softc in vga_pcivar.h

Original diff from guenther@ changed to incorporate feedback
from kettenis@ and myself.

Match q33 devices. Previously only inteldrm matched on q33,
which would lead to a panic.
Problem reported by karlis.mikelsons at lf.lv.

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

Move GTT management for Sandy Bridge and up into inteldrm(4). This makes
it possible to use the non-mappable part of the GTT, prepares the way for
using the PPGTT and reduces the diffs with Linux.

ok jsg@

No need to include <sys/lock.h> when only <sys/rwlock.h> is needed,
so remove the former and include the latter instead of pulling it
in <dev/pci/agpvar.h>. This header already requires various other
types anyway. While here remove unneeded headers.

The AGP ioctl interface is gone; remove the header file as well.

ok matthieu@

Don't bitch about binding into stolen memory on older hardware either.

Remove some code that has no effect.

We're never going to detach the host bridge on our machines.

spotted by deraadt@ during n2k14

Remove MD intagp(4) code that is unused now that inteldrm(4) manages the GTT
all by itself.

Move the GTT management into the inteldrm driver. It is really obvious now
that this is necessary as on some hardware we need guard pages between
regions that have different cache attributes. Even if this appears to cause
regressions on some hardware, this change is a necessary (but not sufficient)
step to fix the cache coherency problems on the affected hardware.

ok jsg@

Add the remaining support code for 4th gen Intel Core/Haswell graphics
and match the same pci devices Linux does. Untested for lack of
hardware but should work. Note that 3D/OpenGL won't work until
we update to a newer version of Mesa, which can't happen until
the Radeon KMS work is ready.

ok deraadt@

sync the list of pre haswell intel video devices with linux
ok kettenis@

Add support for Intel E7221 integrated graphics.

ok jsg@

Even though Sandy Bridge and Ivy Bridge have stolen memory, substracting it
from the GTT aperture doesn't make a lot of sense. On some machines the
amount of stolen memory is the same size of even larger than the aperture!
So pretend that there is no stolen memory on these systems for now.

ok jsg@

Indirectly pass the cache level down to agp by abusing spare bus_dma bits.
Currently only used on gen6+, everything else keeps the old semantics.

gen6+ can do 40 bit addressing

stash the number of stolen entries in the agp struct
will be used in a future commit

Add minimal support for gen7/ivy bridge in inteldrm.
Like gen6/sandy bridge this is enough to manage memory but
does not attempt to setup the rings.
ok kettenis@

Initial kernel support for sandybridge intel chipsets in intagp and inteldrm.

Far from perfect. Extra (almost essential) features like the extra
ringbuffers are not yet supported (I have half a diff), but this and the
appropriate ddx patches allow modesetting and basic shadow acceleration.

Initial work by jcs@, a few cleanups and bugfixes by me.

Tested by many on all appropriate chipsets. ok kettenis@

Rev 1.67 of intagp (agp_i810.c) was added to deal with the problem
where stuff was bound for a software fallback while we were vt switched,
so we couldn't assume that the aperture was clear.

Turns out that the 855 at least does not like this (the !stolen bits of
the bar at least are write-only), and this caused a gpu lockup on any
suspend that used that activate handler.

So this diff fixes it in a more complete way:

Firstly revert 1.67 of agp_i810.c, secondly add a DVACT_QUIESCE handler
to inteldrm, and in it we do three things:

1) set a flag that causes any ioctl or pagefault to sleep until the flag
is cleared so that we don't end up with something doing the following
(for example:)
- bind object
- do another blocking operation in the same ioctl/fault
< suspend happens here, followed by resume>
- wake up assuming that the object is still bound and continue along our
merry way

2) Wait for all current entrypoints to finish (so that 1) is actually
effective we need to first quiesce our callers before we continue).

3) unbind everything that is in the gtt

On resume we clear the quiet flag, and everything can continue as
expected.

Behaves as expected for me on: 855 (x40 in acpi mode), gm965 (x61s) and
arrandale (x201) over multiple suspend cycles. Also tested by several on
tech.

remove argnames from prototype.

no binary change.

Previous code to handle suspend/resume for intagp assumed that
everything was unbound before we go down.

Due to software fallbacks from the vt-switched X this is not strictly
true, so save/restore the gtt (which is stored in a BAR and thus
volatile).

i915 and i945 still have some (unrelated) coruption on dzen2 on resume
which I am looking for still (theory: fence registers), but this helps a
LOT of machines.

``commit'' deraadt@. tested by many (and in snaps the last few days.

spacing; ok deraadt@

braces define scope, not indentation. found hunting uninit bugs. ok oga

add support for ironlake (clarkdale and arrandale, i.e. core i3 and core
i5 internal graphics) to intagp.

While technically this acts like a g4X here, add our own flag because I
anticipate crazy errata and practically costs nothing.

Including other diffs this was tested on two different x201's, a t510
and a t410, worked on all.

Add Pineview M to intagp and inteldrm.

Tested (and initial tweaked diff) from Erik Mugele; thanks!

Support Pineview IGD in intagp.

Tested by Jan Stary, thanks!

these files don't need to include proc.h anymore. ok oga for agp

Make intagp restore pgtbl_ctl and the scratch page to the gtt on resume.

When we move more towards kms we'll need to save/restore what is bound
to the aperture, but right now this is not needed (since we always
unbind everything before we go down anyway).

"can not hurt" deraadt@. tested by halex, deraadt and maybe some others.

Attach intagp on the G41 also.

tested by eric@.

memory leaks found by parfait; ok oga

unfuck the rest of the way. when we bind the scribble pages to the
aperture, skip over dcache on i810 chipsets and stolen memory on later
chips.

I didn't notice this before because I mostly used this code with GEM
code, which doesn't use the stolen memory.

unfuck slightly, offset was wrong.

add an interface to agp to create a bus_dma_tag over a range of the
aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.

This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.

Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.

If flags to bind_page include BUS_DMA_COHERENT, set the snooped bit on
the pte.

This is currently unused, but will be used soon.

Instead of using magic numbers, define the bits that we set in gtt ptes
and use those defines.

Change agp attach (again) so that the driver passes in the aperture size.

While the aperture size may change during attach, it never changes after
the end of the subdriver attach function, so getting this value with a
function is a waste of time. shrinks things slightly and makes the code
clearer.

In preparation for using agp as a bus_dma backend for drm, convert the bind_page
and unbind_page callbacks from

int bind_page(void *, off_t, bus_addr_t)

to

void bind_page(void *, bus_addr_t, paddr_t, int)

We can make these function void by making sure that the agp code sanity
checks properly (it already mostly did), so by definition these
functions may not fail. The flags field is currently unused (intagp at
least will have a use for it soon).

Been in my tree for ages.

change agp driver attach so that the driver passes in the base address
of its aperture, instead of the BAR and memory type. This is a little
larger, but allows the driver to know it's aperture address. Needed for
some future stuff.

Apply the cleanup stick.

make write_gatt actually readable, and a tad smaller. Don't use macros when we
can just call the damned function. coalesce a few bits of code.

as a bonus this actually fixes a bus in the i810/815 dcache case since we got
the offset wrong (confirmed by looking at the datasheet).

Don't map all agp memory we allocate.

If we're just going to be making it available to userland (the X
server), just use load_raw and make sure it's zeroed with BUS_DMA_ZERO.
Should save $AMOUNT_BOUND_TO_GART kva. Most kernel users also write
through the gart, so no mapping there either.

tested by sthen and todd a while back.

Add a bit of sanity-checking paranoia

Don't leak the dmamap on freeing memory.

Attach agp(4) to the Intel 946GZ integrated video.
Tested on Asus P5B-MX motherboard.

ok kettenis@, oga@

Fix support for earlier i8XX chipsets (specifically the 830 and 840).

Earlier changes meant that we were reading the wrong register, on the
graphics card instead of the gmch (bus 0, device 0, function 0. it's the
memory controller on all boards with intel chipsets). Later chipsets
have a ``mirror'' register on the graphics card device, explaining why
this didn't manifest on all chipsets. For simplicity, always find and
read the register from the GMCH. While i'm here, fixup unaligned
configuration space access (0x50 vs 0x52)

Tested by several.

intagp support for Intel 4-series (e.g. GM45) chipsets.

Tested by several x200 owners.

Rework that way that agp attaches.

previously, we had a static list of pcidevs and which agp driver would
be interanlly attached. Instead, split the agp drivers so they work like
audio(4), where we attach a driver, which sets up some callbacks and
initial state, then attaches the interface (agp(4)). Since this allows
us to attach different drivers in different places, and give them
/proper/ probe functions move most of the drivers back to attaching at
pchb, where they should, and intagp (formerly agp_i810) stays attaching
at vga, since it's part of the intel integrated graphics chips.

Diff shrinks the kernel slightly, gets rid of the annoying "no integrated
graphics" warning, and allows more cleanup later.

Tested by many. fix for alpha build (the only other vga_pci.c consumer)
suggested by miod.

Attach agp(4) to the Intel Q35 integrated video.
Tested on ASUS P5E-VM DO motherboard.

ok oga

Right now agp_generic_enable() is wrong. It has been since 2006. It
assumes that the display device and the agp bridge are the same device.
In almost all cases this is incorrect.

In order to correctly enable the agp device with the correct mode, we
need to set the AGP_COMMAND register on both the display and the bridge
with the right bits. Since agp is currently attaching at vga(4), due to
the problems with the intel integrated graphics (a problem that I still
need to solve, to be honest), for now just provide both pci_attach_args
to the agp init, and get what we need from there to do the enable.

This fixes the "agp bug" which i have been known to rant about, a lot.
So agp radeons now work with dri without needing to be forced to pci
mode.

This wasn't detected before, since the only non-drm consumer of agp is
the intel X driver, the i810 agp driver has its own enable function.

tested by many. ok kettenis@.

Add AGP and hostbridge support for the Intel 82945GME chipset.

ok jsg@

Support the Intel G35 which apparently works similarly to the 965.

Initial information, half the diff, and testing from Andrew Lutomirski,
thanks!

Move a debug printf into #ifdef DEBUG. ok todd@, millert@.

add Intel GME965

ok kettenis@

currently agp_i810 needs to map the same BAR as inteldrm, this obviously
fails.

In order to allow this, implement an API so that drm and agp can share
mappings for the BARs. Now it works as it should.

tested by many.
ok kettenis, miod said he'd look at it when it's in tree.

Sometimes the registers claiming the aperture size on 9XX chipsets lie.

So instead, use the size of the aperture BAR to determine the aperture
size for agp_i810, and don't let the 855 and above have the aperture
set. Next to nothing uses it anyway so no harm.

introduce generic_{get,set} aperture which has this behaviour so other
drivers may use it if useful.

Change inspired by what freebsd did after i noticed my aperture size was
wrong.

Tested by many, ok kettenis@.

Add AGP support for the Intel G33 chipset.
Tested on i386 with a Gigabyte G33M-DS2R motherboard (Intel GMA 3100).
Based on NetBSD code.

ok oga@

Clean up Intel host bridge PCI IDs.

ok deraadt@

Fix the issue with some intel 965 host busses. Though the docs claim that the
mmaddr BAR is alway 64-bit, they lie. one some bridges it's not.

Fix this by checking which type of memory it is before trying to map.

Advice and ok kettenis@, Tested by myself and Matthew L. Shobe

Kill a check for malloc fail. The malloc call uses M_WAITOK and thus
should not be able to fail.

ok kettenis@.

Make the "can't find VGA config space" error sound less scary. This
happens sometimes on intel PCI-E chipsets where integrated graphics
have been disabled.

ok kettenis, deraadt.

Restore "evil hack" that we had before the recent agp(4) changes. Solves
X display corruption.

People should know better than just importing the latest random crap from
NetBSD or FreeBSD. That's worse than doing a "commit and run".

sturm@ let me know that the workaround in here breaks things on bge somehow.

Revert it for now.

KNF, no binary change.

Looked over by a few people.

Destatic functions in the agp subsystem.

KNF coming shortly.

ok marco, jsg and mbalmer

Put back some of the handling for writes to the GATT on intel
agp bridges. This got lost in the merge before.

Tested by Peter Hessler on amd64. ok tedu

Initial import of the DRM (direct rendering manager).

This is the kernel part necessary for DRI support in X. Disabled for now
because it still has a few bugs, but now I can work on it in tree. Also
requires the requisite bits in X, which are currently under discussion
on how to deal with them with privsep. ported from a combination of the
free and netbsd implementations.

Known bugs:
1) only the first occurence of X in any session will have dri, after
that something prevents it working.
2) if the machine does not have a dri capable card, the kernel panics.
Something's up in one of the probe functions. I haven't been able to
find it though.
3) radeon cards need to be forced to use PCI mode otherwise they get
into an infinite loop.

This is known to at least kinda work with SiS, radeons in pci mode and
intel cards.

ok deraadt, kinda ok art, a few other people had a quick look.

do not check malloc return value against NULL, as M_WAITOK is used

ok oga@

correct newlines surrounding the sub-bus configuration, and unify
pchb's further
ok reyk oga

fix new agp code on amd64
- internal intel graphics semi-agp chipsets need special handling in pchb.c
- re-add the i965GM device
- use the correct major device id for /dev/agp0 on amd64 (not the i386 one)

ok deraadt@

Fix hardware cursor mapping.

ok matthieu.

Make agp attach as a device. This means that many more agp bridges
actually get detected and attached. Also adds a kernel api for
manipulating agp.

Enable this on i386 and amd64.

"I think you should commit it" deraadt@, ok matthieu. Looked over by
several others.

Simpliest memset(,0,) -> M_ZERO changes. One (caddr *) cast removal,
otherwise just adding M_ZERO to malloc() and removing the immediately
adjacent memset(,0,).

Only the most obvious bzero() -> M_ZERO changes. No cast changes, no
MALLOC/FREE, etc. Just adding M_ZERO to malloc() and deleting an
immediately adjacent bzero().

Add AGP support for the intel i965 chipset, this also extends the
internal AGP API to work with 64bit PCI-Express memory and
non-standard AGP aperture bases.

tested by many
ok matthieu@, deraadt@

In agp_i810_alloc_memory(), do not check for sc_maxmem limit reached, as the
caller has already done this.
Test matthieu@ ok deraadt@

Add AGP support for Intel 945G/GM chipsets. The 945GM (mobile) variant
also needs a X.org update, which will go in later.

Tested by a bunch of people; ok deraadt@

Patch from Dimitry Andric to fix the allocation of 4 pages of gart
memory for hardware cursor. Tested by many, ok tedu@

New version of i915 supprotm adapted from freebsd by Dimitry Andric, with
one tweak suggested by miod@.

Back out i915 changes; they broke some i810-based machines.

support i915. adapted from freebsd by Dimitry Andric. does not break
at least i810 on x40, but made x41 work. ok matthieu

fix merge misses
tested by millert, mbalmer and me; ok grange, mickey

Support for i852/855/865 AGP; from NetBSD via Michael van der
Westhuizen <michael@skanky.homeunix.net> with little tweaks.

Tested by millert@ todd@ jmc@ andreas@ and jcs@'s friend
ok millert@

Correct checks for non-i810 chip; from FreeBSD.

test and ok millert@

branches: 1.5.4;
Add i830 support from NetBSD via patch in kernel/3150.
Verified to not break i81[05] and tested on two i830s.

proper free order; from sturm@

branches: 1.3.4;
- some KNF.
- comment out debugging printf for i810.
- remove checks for failure if malloc is used with M_WAITOK.

mickey@ ok.

remove a bunch of debugging printfs and disable agp_debug; prompted by millert@

support for the agp gart on various agp chipsets.
only i810 driver was tested though.
based on the netbsd's lkm, initially ported
by hunter@dg.net.ua and later made into shape by mickey.
testing by art@ and millert@ .

Constify struct cfattach.

Update shared drm code, inteldrm(4) and radeondrm(4) from linux 4.4 to
linux 4.19.34.

Adds support for more Intel hardware:
Broxton/Apollo Lake (was is_preliminary in 4.4)
Amber Lake (another Kaby Lake refresh)
Gemini Lake
Coffee Lake
Whiskey Lake
Cannon Lake (though no hardware with Intel graphics ever shipped)
Ice Lake (alpha support, hardware not released)

This does not add support for new radeon hardware on the AMD side as
newer radeons have a different kernel driver (amdgpu).

Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for
helping and a bunch of other developers for testing.

Remove code that has been unused ever since we removed the agp ioctl interface.

ok mpi@

Make inteldrm(4) attach to pci(4) instead of vga(4) just like radeondrm(4).
This is needed for machines where Intel graphics isn't the primary graphics
device and on systems with UEFI firmware that put the device in non-VGA mode.

ok jsg@

Remove evil hack. I've never seen the printf fire, and xenocara no longer
contains any code that can manipulate the affected register directly.

ok jsg@

sizes for free(); ok semarie

Add the required includes for the conditional parts of
struct vga_pci_softc in vga_pcivar.h

Original diff from guenther@ changed to incorporate feedback
from kettenis@ and myself.

Match q33 devices. Previously only inteldrm matched on q33,
which would lead to a panic.
Problem reported by karlis.mikelsons at lf.lv.

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

Move GTT management for Sandy Bridge and up into inteldrm(4). This makes
it possible to use the non-mappable part of the GTT, prepares the way for
using the PPGTT and reduces the diffs with Linux.

ok jsg@

No need to include <sys/lock.h> when only <sys/rwlock.h> is needed,
so remove the former and include the latter instead of pulling it
in <dev/pci/agpvar.h>. This header already requires various other
types anyway. While here remove unneeded headers.

The AGP ioctl interface is gone; remove the header file as well.

ok matthieu@

Don't bitch about binding into stolen memory on older hardware either.

Remove some code that has no effect.

We're never going to detach the host bridge on our machines.

spotted by deraadt@ during n2k14

Remove MD intagp(4) code that is unused now that inteldrm(4) manages the GTT
all by itself.

Move the GTT management into the inteldrm driver. It is really obvious now
that this is necessary as on some hardware we need guard pages between
regions that have different cache attributes. Even if this appears to cause
regressions on some hardware, this change is a necessary (but not sufficient)
step to fix the cache coherency problems on the affected hardware.

ok jsg@

Add the remaining support code for 4th gen Intel Core/Haswell graphics
and match the same pci devices Linux does. Untested for lack of
hardware but should work. Note that 3D/OpenGL won't work until
we update to a newer version of Mesa, which can't happen until
the Radeon KMS work is ready.

ok deraadt@

sync the list of pre haswell intel video devices with linux
ok kettenis@

Add support for Intel E7221 integrated graphics.

ok jsg@

Even though Sandy Bridge and Ivy Bridge have stolen memory, substracting it
from the GTT aperture doesn't make a lot of sense. On some machines the
amount of stolen memory is the same size of even larger than the aperture!
So pretend that there is no stolen memory on these systems for now.

ok jsg@

Indirectly pass the cache level down to agp by abusing spare bus_dma bits.
Currently only used on gen6+, everything else keeps the old semantics.

gen6+ can do 40 bit addressing

stash the number of stolen entries in the agp struct
will be used in a future commit

Add minimal support for gen7/ivy bridge in inteldrm.
Like gen6/sandy bridge this is enough to manage memory but
does not attempt to setup the rings.
ok kettenis@

Initial kernel support for sandybridge intel chipsets in intagp and inteldrm.

Far from perfect. Extra (almost essential) features like the extra
ringbuffers are not yet supported (I have half a diff), but this and the
appropriate ddx patches allow modesetting and basic shadow acceleration.

Initial work by jcs@, a few cleanups and bugfixes by me.

Tested by many on all appropriate chipsets. ok kettenis@

Rev 1.67 of intagp (agp_i810.c) was added to deal with the problem
where stuff was bound for a software fallback while we were vt switched,
so we couldn't assume that the aperture was clear.

Turns out that the 855 at least does not like this (the !stolen bits of
the bar at least are write-only), and this caused a gpu lockup on any
suspend that used that activate handler.

So this diff fixes it in a more complete way:

Firstly revert 1.67 of agp_i810.c, secondly add a DVACT_QUIESCE handler
to inteldrm, and in it we do three things:

1) set a flag that causes any ioctl or pagefault to sleep until the flag
is cleared so that we don't end up with something doing the following
(for example:)
- bind object
- do another blocking operation in the same ioctl/fault
< suspend happens here, followed by resume>
- wake up assuming that the object is still bound and continue along our
merry way

2) Wait for all current entrypoints to finish (so that 1) is actually
effective we need to first quiesce our callers before we continue).

3) unbind everything that is in the gtt

On resume we clear the quiet flag, and everything can continue as
expected.

Behaves as expected for me on: 855 (x40 in acpi mode), gm965 (x61s) and
arrandale (x201) over multiple suspend cycles. Also tested by several on
tech.

remove argnames from prototype.

no binary change.

Previous code to handle suspend/resume for intagp assumed that
everything was unbound before we go down.

Due to software fallbacks from the vt-switched X this is not strictly
true, so save/restore the gtt (which is stored in a BAR and thus
volatile).

i915 and i945 still have some (unrelated) coruption on dzen2 on resume
which I am looking for still (theory: fence registers), but this helps a
LOT of machines.

``commit'' deraadt@. tested by many (and in snaps the last few days.

spacing; ok deraadt@

braces define scope, not indentation. found hunting uninit bugs. ok oga

add support for ironlake (clarkdale and arrandale, i.e. core i3 and core
i5 internal graphics) to intagp.

While technically this acts like a g4X here, add our own flag because I
anticipate crazy errata and practically costs nothing.

Including other diffs this was tested on two different x201's, a t510
and a t410, worked on all.

Add Pineview M to intagp and inteldrm.

Tested (and initial tweaked diff) from Erik Mugele; thanks!

Support Pineview IGD in intagp.

Tested by Jan Stary, thanks!

these files don't need to include proc.h anymore. ok oga for agp

Make intagp restore pgtbl_ctl and the scratch page to the gtt on resume.

When we move more towards kms we'll need to save/restore what is bound
to the aperture, but right now this is not needed (since we always
unbind everything before we go down anyway).

"can not hurt" deraadt@. tested by halex, deraadt and maybe some others.

Attach intagp on the G41 also.

tested by eric@.

memory leaks found by parfait; ok oga

unfuck the rest of the way. when we bind the scribble pages to the
aperture, skip over dcache on i810 chipsets and stolen memory on later
chips.

I didn't notice this before because I mostly used this code with GEM
code, which doesn't use the stolen memory.

unfuck slightly, offset was wrong.

add an interface to agp to create a bus_dma_tag over a range of the
aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.

This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.

Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.

If flags to bind_page include BUS_DMA_COHERENT, set the snooped bit on
the pte.

This is currently unused, but will be used soon.

Instead of using magic numbers, define the bits that we set in gtt ptes
and use those defines.

Change agp attach (again) so that the driver passes in the aperture size.

While the aperture size may change during attach, it never changes after
the end of the subdriver attach function, so getting this value with a
function is a waste of time. shrinks things slightly and makes the code
clearer.

In preparation for using agp as a bus_dma backend for drm, convert the bind_page
and unbind_page callbacks from

int bind_page(void *, off_t, bus_addr_t)

to

void bind_page(void *, bus_addr_t, paddr_t, int)

We can make these function void by making sure that the agp code sanity
checks properly (it already mostly did), so by definition these
functions may not fail. The flags field is currently unused (intagp at
least will have a use for it soon).

Been in my tree for ages.

change agp driver attach so that the driver passes in the base address
of its aperture, instead of the BAR and memory type. This is a little
larger, but allows the driver to know it's aperture address. Needed for
some future stuff.

Apply the cleanup stick.

make write_gatt actually readable, and a tad smaller. Don't use macros when we
can just call the damned function. coalesce a few bits of code.

as a bonus this actually fixes a bus in the i810/815 dcache case since we got
the offset wrong (confirmed by looking at the datasheet).

Don't map all agp memory we allocate.

If we're just going to be making it available to userland (the X
server), just use load_raw and make sure it's zeroed with BUS_DMA_ZERO.
Should save $AMOUNT_BOUND_TO_GART kva. Most kernel users also write
through the gart, so no mapping there either.

tested by sthen and todd a while back.

Add a bit of sanity-checking paranoia

Don't leak the dmamap on freeing memory.

Attach agp(4) to the Intel 946GZ integrated video.
Tested on Asus P5B-MX motherboard.

ok kettenis@, oga@

Fix support for earlier i8XX chipsets (specifically the 830 and 840).

Earlier changes meant that we were reading the wrong register, on the
graphics card instead of the gmch (bus 0, device 0, function 0. it's the
memory controller on all boards with intel chipsets). Later chipsets
have a ``mirror'' register on the graphics card device, explaining why
this didn't manifest on all chipsets. For simplicity, always find and
read the register from the GMCH. While i'm here, fixup unaligned
configuration space access (0x50 vs 0x52)

Tested by several.

intagp support for Intel 4-series (e.g. GM45) chipsets.

Tested by several x200 owners.

Rework that way that agp attaches.

previously, we had a static list of pcidevs and which agp driver would
be interanlly attached. Instead, split the agp drivers so they work like
audio(4), where we attach a driver, which sets up some callbacks and
initial state, then attaches the interface (agp(4)). Since this allows
us to attach different drivers in different places, and give them
/proper/ probe functions move most of the drivers back to attaching at
pchb, where they should, and intagp (formerly agp_i810) stays attaching
at vga, since it's part of the intel integrated graphics chips.

Diff shrinks the kernel slightly, gets rid of the annoying "no integrated
graphics" warning, and allows more cleanup later.

Tested by many. fix for alpha build (the only other vga_pci.c consumer)
suggested by miod.

Attach agp(4) to the Intel Q35 integrated video.
Tested on ASUS P5E-VM DO motherboard.

ok oga

Right now agp_generic_enable() is wrong. It has been since 2006. It
assumes that the display device and the agp bridge are the same device.
In almost all cases this is incorrect.

In order to correctly enable the agp device with the correct mode, we
need to set the AGP_COMMAND register on both the display and the bridge
with the right bits. Since agp is currently attaching at vga(4), due to
the problems with the intel integrated graphics (a problem that I still
need to solve, to be honest), for now just provide both pci_attach_args
to the agp init, and get what we need from there to do the enable.

This fixes the "agp bug" which i have been known to rant about, a lot.
So agp radeons now work with dri without needing to be forced to pci
mode.

This wasn't detected before, since the only non-drm consumer of agp is
the intel X driver, the i810 agp driver has its own enable function.

tested by many. ok kettenis@.

Add AGP and hostbridge support for the Intel 82945GME chipset.

ok jsg@

Support the Intel G35 which apparently works similarly to the 965.

Initial information, half the diff, and testing from Andrew Lutomirski,
thanks!

Move a debug printf into #ifdef DEBUG. ok todd@, millert@.

add Intel GME965

ok kettenis@

currently agp_i810 needs to map the same BAR as inteldrm, this obviously
fails.

In order to allow this, implement an API so that drm and agp can share
mappings for the BARs. Now it works as it should.

tested by many.
ok kettenis, miod said he'd look at it when it's in tree.

Sometimes the registers claiming the aperture size on 9XX chipsets lie.

So instead, use the size of the aperture BAR to determine the aperture
size for agp_i810, and don't let the 855 and above have the aperture
set. Next to nothing uses it anyway so no harm.

introduce generic_{get,set} aperture which has this behaviour so other
drivers may use it if useful.

Change inspired by what freebsd did after i noticed my aperture size was
wrong.

Tested by many, ok kettenis@.

Add AGP support for the Intel G33 chipset.
Tested on i386 with a Gigabyte G33M-DS2R motherboard (Intel GMA 3100).
Based on NetBSD code.

ok oga@

Clean up Intel host bridge PCI IDs.

ok deraadt@

Fix the issue with some intel 965 host busses. Though the docs claim that the
mmaddr BAR is alway 64-bit, they lie. one some bridges it's not.

Fix this by checking which type of memory it is before trying to map.

Advice and ok kettenis@, Tested by myself and Matthew L. Shobe

Kill a check for malloc fail. The malloc call uses M_WAITOK and thus
should not be able to fail.

ok kettenis@.

Make the "can't find VGA config space" error sound less scary. This
happens sometimes on intel PCI-E chipsets where integrated graphics
have been disabled.

ok kettenis, deraadt.

Restore "evil hack" that we had before the recent agp(4) changes. Solves
X display corruption.

People should know better than just importing the latest random crap from
NetBSD or FreeBSD. That's worse than doing a "commit and run".

sturm@ let me know that the workaround in here breaks things on bge somehow.

Revert it for now.

KNF, no binary change.

Looked over by a few people.

Destatic functions in the agp subsystem.

KNF coming shortly.

ok marco, jsg and mbalmer

Put back some of the handling for writes to the GATT on intel
agp bridges. This got lost in the merge before.

Tested by Peter Hessler on amd64. ok tedu

Initial import of the DRM (direct rendering manager).

This is the kernel part necessary for DRI support in X. Disabled for now
because it still has a few bugs, but now I can work on it in tree. Also
requires the requisite bits in X, which are currently under discussion
on how to deal with them with privsep. ported from a combination of the
free and netbsd implementations.

Known bugs:
1) only the first occurence of X in any session will have dri, after
that something prevents it working.
2) if the machine does not have a dri capable card, the kernel panics.
Something's up in one of the probe functions. I haven't been able to
find it though.
3) radeon cards need to be forced to use PCI mode otherwise they get
into an infinite loop.

This is known to at least kinda work with SiS, radeons in pci mode and
intel cards.

ok deraadt, kinda ok art, a few other people had a quick look.

do not check malloc return value against NULL, as M_WAITOK is used

ok oga@

correct newlines surrounding the sub-bus configuration, and unify
pchb's further
ok reyk oga

fix new agp code on amd64
- internal intel graphics semi-agp chipsets need special handling in pchb.c
- re-add the i965GM device
- use the correct major device id for /dev/agp0 on amd64 (not the i386 one)

ok deraadt@

Fix hardware cursor mapping.

ok matthieu.

Make agp attach as a device. This means that many more agp bridges
actually get detected and attached. Also adds a kernel api for
manipulating agp.

Enable this on i386 and amd64.

"I think you should commit it" deraadt@, ok matthieu. Looked over by
several others.

Simpliest memset(,0,) -> M_ZERO changes. One (caddr *) cast removal,
otherwise just adding M_ZERO to malloc() and removing the immediately
adjacent memset(,0,).

Only the most obvious bzero() -> M_ZERO changes. No cast changes, no
MALLOC/FREE, etc. Just adding M_ZERO to malloc() and deleting an
immediately adjacent bzero().

Add AGP support for the intel i965 chipset, this also extends the
internal AGP API to work with 64bit PCI-Express memory and
non-standard AGP aperture bases.

tested by many
ok matthieu@, deraadt@

In agp_i810_alloc_memory(), do not check for sc_maxmem limit reached, as the
caller has already done this.
Test matthieu@ ok deraadt@

Add AGP support for Intel 945G/GM chipsets. The 945GM (mobile) variant
also needs a X.org update, which will go in later.

Tested by a bunch of people; ok deraadt@

Patch from Dimitry Andric to fix the allocation of 4 pages of gart
memory for hardware cursor. Tested by many, ok tedu@

New version of i915 supprotm adapted from freebsd by Dimitry Andric, with
one tweak suggested by miod@.

Back out i915 changes; they broke some i810-based machines.

support i915. adapted from freebsd by Dimitry Andric. does not break
at least i810 on x40, but made x41 work. ok matthieu

fix merge misses
tested by millert, mbalmer and me; ok grange, mickey

Support for i852/855/865 AGP; from NetBSD via Michael van der
Westhuizen <michael@skanky.homeunix.net> with little tweaks.

Tested by millert@ todd@ jmc@ andreas@ and jcs@'s friend
ok millert@

Correct checks for non-i810 chip; from FreeBSD.

test and ok millert@

branches: 1.5.4;
Add i830 support from NetBSD via patch in kernel/3150.
Verified to not break i81[05] and tested on two i830s.

proper free order; from sturm@

branches: 1.3.4;
- some KNF.
- comment out debugging printf for i810.
- remove checks for failure if malloc is used with M_WAITOK.

mickey@ ok.

remove a bunch of debugging printfs and disable agp_debug; prompted by millert@

support for the agp gart on various agp chipsets.
only i810 driver was tested though.
based on the netbsd's lkm, initially ported
by hunter@dg.net.ua and later made into shape by mickey.
testing by art@ and millert@ .

Update shared drm code, inteldrm(4) and radeondrm(4) from linux 4.4 to
linux 4.19.34.

Adds support for more Intel hardware:
Broxton/Apollo Lake (was is_preliminary in 4.4)
Amber Lake (another Kaby Lake refresh)
Gemini Lake
Coffee Lake
Whiskey Lake
Cannon Lake (though no hardware with Intel graphics ever shipped)
Ice Lake (alpha support, hardware not released)

This does not add support for new radeon hardware on the AMD side as
newer radeons have a different kernel driver (amdgpu).

Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for
helping and a bunch of other developers for testing.

Remove code that has been unused ever since we removed the agp ioctl interface.

ok mpi@

Make inteldrm(4) attach to pci(4) instead of vga(4) just like radeondrm(4).
This is needed for machines where Intel graphics isn't the primary graphics
device and on systems with UEFI firmware that put the device in non-VGA mode.

ok jsg@

Remove evil hack. I've never seen the printf fire, and xenocara no longer
contains any code that can manipulate the affected register directly.

ok jsg@

sizes for free(); ok semarie

Add the required includes for the conditional parts of
struct vga_pci_softc in vga_pcivar.h

Original diff from guenther@ changed to incorporate feedback
from kettenis@ and myself.

Match q33 devices. Previously only inteldrm matched on q33,
which would lead to a panic.
Problem reported by karlis.mikelsons at lf.lv.

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

Move GTT management for Sandy Bridge and up into inteldrm(4). This makes
it possible to use the non-mappable part of the GTT, prepares the way for
using the PPGTT and reduces the diffs with Linux.

ok jsg@

No need to include <sys/lock.h> when only <sys/rwlock.h> is needed,
so remove the former and include the latter instead of pulling it
in <dev/pci/agpvar.h>. This header already requires various other
types anyway. While here remove unneeded headers.

The AGP ioctl interface is gone; remove the header file as well.

ok matthieu@

Don't bitch about binding into stolen memory on older hardware either.

Remove some code that has no effect.

We're never going to detach the host bridge on our machines.

spotted by deraadt@ during n2k14

Remove MD intagp(4) code that is unused now that inteldrm(4) manages the GTT
all by itself.

Move the GTT management into the inteldrm driver. It is really obvious now
that this is necessary as on some hardware we need guard pages between
regions that have different cache attributes. Even if this appears to cause
regressions on some hardware, this change is a necessary (but not sufficient)
step to fix the cache coherency problems on the affected hardware.

ok jsg@

Add the remaining support code for 4th gen Intel Core/Haswell graphics
and match the same pci devices Linux does. Untested for lack of
hardware but should work. Note that 3D/OpenGL won't work until
we update to a newer version of Mesa, which can't happen until
the Radeon KMS work is ready.

ok deraadt@

sync the list of pre haswell intel video devices with linux
ok kettenis@

Add support for Intel E7221 integrated graphics.

ok jsg@

Even though Sandy Bridge and Ivy Bridge have stolen memory, substracting it
from the GTT aperture doesn't make a lot of sense. On some machines the
amount of stolen memory is the same size of even larger than the aperture!
So pretend that there is no stolen memory on these systems for now.

ok jsg@

Indirectly pass the cache level down to agp by abusing spare bus_dma bits.
Currently only used on gen6+, everything else keeps the old semantics.

gen6+ can do 40 bit addressing

stash the number of stolen entries in the agp struct
will be used in a future commit

Add minimal support for gen7/ivy bridge in inteldrm.
Like gen6/sandy bridge this is enough to manage memory but
does not attempt to setup the rings.
ok kettenis@

Initial kernel support for sandybridge intel chipsets in intagp and inteldrm.

Far from perfect. Extra (almost essential) features like the extra
ringbuffers are not yet supported (I have half a diff), but this and the
appropriate ddx patches allow modesetting and basic shadow acceleration.

Initial work by jcs@, a few cleanups and bugfixes by me.

Tested by many on all appropriate chipsets. ok kettenis@

Rev 1.67 of intagp (agp_i810.c) was added to deal with the problem
where stuff was bound for a software fallback while we were vt switched,
so we couldn't assume that the aperture was clear.

Turns out that the 855 at least does not like this (the !stolen bits of
the bar at least are write-only), and this caused a gpu lockup on any
suspend that used that activate handler.

So this diff fixes it in a more complete way:

Firstly revert 1.67 of agp_i810.c, secondly add a DVACT_QUIESCE handler
to inteldrm, and in it we do three things:

1) set a flag that causes any ioctl or pagefault to sleep until the flag
is cleared so that we don't end up with something doing the following
(for example:)
- bind object
- do another blocking operation in the same ioctl/fault
< suspend happens here, followed by resume>
- wake up assuming that the object is still bound and continue along our
merry way

2) Wait for all current entrypoints to finish (so that 1) is actually
effective we need to first quiesce our callers before we continue).

3) unbind everything that is in the gtt

On resume we clear the quiet flag, and everything can continue as
expected.

Behaves as expected for me on: 855 (x40 in acpi mode), gm965 (x61s) and
arrandale (x201) over multiple suspend cycles. Also tested by several on
tech.

remove argnames from prototype.

no binary change.

Previous code to handle suspend/resume for intagp assumed that
everything was unbound before we go down.

Due to software fallbacks from the vt-switched X this is not strictly
true, so save/restore the gtt (which is stored in a BAR and thus
volatile).

i915 and i945 still have some (unrelated) coruption on dzen2 on resume
which I am looking for still (theory: fence registers), but this helps a
LOT of machines.

``commit'' deraadt@. tested by many (and in snaps the last few days.

spacing; ok deraadt@

braces define scope, not indentation. found hunting uninit bugs. ok oga

add support for ironlake (clarkdale and arrandale, i.e. core i3 and core
i5 internal graphics) to intagp.

While technically this acts like a g4X here, add our own flag because I
anticipate crazy errata and practically costs nothing.

Including other diffs this was tested on two different x201's, a t510
and a t410, worked on all.

Add Pineview M to intagp and inteldrm.

Tested (and initial tweaked diff) from Erik Mugele; thanks!

Support Pineview IGD in intagp.

Tested by Jan Stary, thanks!

these files don't need to include proc.h anymore. ok oga for agp

Make intagp restore pgtbl_ctl and the scratch page to the gtt on resume.

When we move more towards kms we'll need to save/restore what is bound
to the aperture, but right now this is not needed (since we always
unbind everything before we go down anyway).

"can not hurt" deraadt@. tested by halex, deraadt and maybe some others.

Attach intagp on the G41 also.

tested by eric@.

memory leaks found by parfait; ok oga

unfuck the rest of the way. when we bind the scribble pages to the
aperture, skip over dcache on i810 chipsets and stolen memory on later
chips.

I didn't notice this before because I mostly used this code with GEM
code, which doesn't use the stolen memory.

unfuck slightly, offset was wrong.

add an interface to agp to create a bus_dma_tag over a range of the
aperture, which will take your memory, bind it to agp, and return you the
aperture address. It's essentially the same as iommu on amd64 in the way it
works.

This will be used by the upcoming (works but is slow and will not be
enabled at first) drm memory management code for intel igp chipsets.

Right now the sync function for intagp is really slow (doing a wbinvd()
on every sync), this is in the process of getting fixed, but the size of
the diffs in my trees was getting silly.

If flags to bind_page include BUS_DMA_COHERENT, set the snooped bit on
the pte.

This is currently unused, but will be used soon.

Instead of using magic numbers, define the bits that we set in gtt ptes
and use those defines.

Change agp attach (again) so that the driver passes in the aperture size.

While the aperture size may change during attach, it never changes after
the end of the subdriver attach function, so getting this value with a
function is a waste of time. shrinks things slightly and makes the code
clearer.

In preparation for using agp as a bus_dma backend for drm, convert the bind_page
and unbind_page callbacks from

int bind_page(void *, off_t, bus_addr_t)

to

void bind_page(void *, bus_addr_t, paddr_t, int)

We can make these function void by making sure that the agp code sanity
checks properly (it already mostly did), so by definition these
functions may not fail. The flags field is currently unused (intagp at
least will have a use for it soon).

Been in my tree for ages.

change agp driver attach so that the driver passes in the base address
of its aperture, instead of the BAR and memory type. This is a little
larger, but allows the driver to know it's aperture address. Needed for
some future stuff.

Apply the cleanup stick.

make write_gatt actually readable, and a tad smaller. Don't use macros when we
can just call the damned function. coalesce a few bits of code.

as a bonus this actually fixes a bus in the i810/815 dcache case since we got
the offset wrong (confirmed by looking at the datasheet).

Don't map all agp memory we allocate.

If we're just going to be making it available to userland (the X
server), just use load_raw and make sure it's zeroed with BUS_DMA_ZERO.
Should save $AMOUNT_BOUND_TO_GART kva. Most kernel users also write
through the gart, so no mapping there either.

tested by sthen and todd a while back.

Add a bit of sanity-checking paranoia

Don't leak the dmamap on freeing memory.

Attach agp(4) to the Intel 946GZ integrated video.
Tested on Asus P5B-MX motherboard.

ok kettenis@, oga@

Fix support for earlier i8XX chipsets (specifically the 830 and 840).

Earlier changes meant that we were reading the wrong register, on the
graphics card instead of the gmch (bus 0, device 0, function 0. it's the
memory controller on all boards with intel chipsets). Later chipsets
have a ``mirror'' register on the graphics card device, explaining why
this didn't manifest on all chipsets. For simplicity, always find and
read the register from the GMCH. While i'm here, fixup unaligned
configuration space access (0x50 vs 0x52)

Tested by several.

intagp support for Intel 4-series (e.g. GM45) chipsets.

Tested by several x200 owners.

Rework that way that agp attaches.

previously, we had a static list of pcidevs and which agp driver would
be interanlly attached. Instead, split the agp drivers so they work like
audio(4), where we attach a driver, which sets up some callbacks and
initial state, then attaches the interface (agp(4)). Since this allows
us to attach different drivers in different places, and give them
/proper/ probe functions move most of the drivers back to attaching at
pchb, where they should, and intagp (formerly agp_i810) stays attaching
at vga, since it's part of the intel integrated graphics chips.

Diff shrinks the kernel slightly, gets rid of the annoying "no integrated
graphics" warning, and allows more cleanup later.

Tested by many. fix for alpha build (the only other vga_pci.c consumer)
suggested by miod.

Attach agp(4) to the Intel Q35 integrated video.
Tested on ASUS P5E-VM DO motherboard.

ok oga

Right now agp_generic_enable() is wrong. It has been since 2006. It
assumes that the display device and the agp bridge are the same device.
In almost all cases this is incorrect.

In order to correctly enable the agp device with the correct mode, we
need to set the AGP_COMMAND register on both the display and the bridge
with the right bits. Since agp is currently attaching at vga(4), due to
the problems with the intel integrated graphics (a problem that I still
need to solve, to be honest), for now just provide both pci_attach_args
to the agp init, and get what we need from there to do the enable.

This fixes the "agp bug" which i have been known to rant about, a lot.
So agp radeons now work with dri without needing to be forced to pci
mode.

This wasn't detected before, since the only non-drm consumer of agp is
the intel X driver, the i810 agp driver has its own enable function.

tested by many. ok kettenis@.

Add AGP and hostbridge support for the Intel 82945GME chipset.

ok jsg@

Support the Intel G35 which apparently works similarly to the 965.

Initial information, half the diff, and testing from Andrew Lutomirski,
thanks!

Move a debug printf into #ifdef DEBUG. ok todd@, millert@.

add Intel GME965

ok kettenis@

currently agp_i810 needs to map the same BAR as inteldrm, this obviously
fails.

In order to allow this, implement an API so that drm and agp can share
mappings for the BARs. Now it works as it should.

tested by many.
ok kettenis, miod said he'd look at it when it's in tree.

Sometimes the registers claiming the aperture size on 9XX chipsets lie.

So instead, use the size of the aperture BAR to determine the aperture
size for agp_i810, and don't let the 855 and above have the aperture
set. Next to nothing uses it anyway so no harm.

introduce generic_{get,set} aperture which has this behaviour so other
drivers may use it if useful.

Change inspired by what freebsd did after i noticed my aperture size was
wrong.

Tested by many, ok kettenis@.

Add AGP support for the Intel G33 chipset.
Tested on i386 with a Gigabyte G33M-DS2R motherboard (Intel GMA 3100).
Based on NetBSD code.

ok oga@

Clean up Intel host bridge PCI IDs.

ok deraadt@

Fix the issue with some intel 965 host busses. Though the docs claim that the
mmaddr BAR is alway 64-bit, they lie. one some bridges it's not.

Fix this by checking which type of memory it is before trying to map.

Advice and ok kettenis@, Tested by myself and Matthew L. Shobe

Kill a check for malloc fail. The malloc call uses M_WAITOK and thus
should not be able to fail.

ok kettenis@.

Make the "can't find VGA config space" error sound less scary. This
happens sometimes on intel PCI-E chipsets where integrated graphics
have been disabled.

ok kettenis, deraadt.

Restore "evil hack" that we had before the recent agp(4) changes. Solves
X display corruption.

People should know better than just importing the latest random crap from
NetBSD or FreeBSD. That's worse than doing a "commit and run".

sturm@ let me know that the workaround in here breaks things on bge somehow.

Revert it for now.

KNF, no binary change.

Looked over by a few people.

Destatic functions in the agp subsystem.

KNF coming shortly.

ok marco, jsg and mbalmer

Put back some of the handling for writes to the GATT on intel
agp bridges. This got lost in the merge before.

Tested by Peter Hessler on amd64. ok tedu

Initial import of the DRM (direct rendering manager).

This is the kernel part necessary for DRI support in X. Disabled for now
because it still has a few bugs, but now I can work on it in tree. Also
requires the requisite bits in X, which are currently under discussion
on how to deal with them with privsep. ported from a combination of the
free and netbsd implementations.

Known bugs:
1) only the first occurence of X in any session will have dri, after
that something prevents it working.
2) if the machine does not have a dri capable card, the kernel panics.
Something's up in one of the probe functions. I haven't been able to
find it though.
3) radeon cards need to be forced to use PCI mode otherwise they get
into an infinite loop.

This is known to at least kinda work with SiS, radeons in pci mode and
intel cards.

ok deraadt, kinda ok art, a few other people had a quick look.

do not check malloc return value against NULL, as M_WAITOK is used

ok oga@

correct newlines surrounding the sub-bus configuration, and unify
pchb's further
ok reyk oga

fix new agp code on amd64
- internal intel graphics semi-agp chipsets need special handling in pchb.c
- re-add the i965GM device
- use the correct major device id for /dev/agp0 on amd64 (not the i386 one)

ok deraadt@

Fix hardware cursor mapping.

ok matthieu.

Make agp attach as a device. This means that many more agp bridges
actually get detected and attached. Also adds a kernel api for
manipulating agp.

Enable this on i386 and amd64.

"I think you should commit it" deraadt@, ok matthieu. Looked over by
several others.

Simpliest memset(,0,) -> M_ZERO changes. One (caddr *) cast removal,
otherwise just adding M_ZERO to malloc() and removing the immediately
adjacent memset(,0,).

Only the most obvious bzero() -> M_ZERO changes. No cast changes, no
MALLOC/FREE, etc. Just adding M_ZERO to malloc() and deleting an
immediately adjacent bzero().

Add AGP support for the intel i965 chipset, this also extends the
internal AGP API to work with 64bit PCI-Express memory and
non-standard AGP aperture bases.

tested by many
ok matthieu@, deraadt@

In agp_i810_alloc_memory(), do not check for sc_maxmem limit reached, as the
caller has already done this.
Test matthieu@ ok deraadt@

Add AGP support for Intel 945G/GM chipsets. The 945GM (mobile) variant
also needs a X.org update, which will go in later.

Tested by a bunch of people; ok deraadt@

Patch from Dimitry Andric to fix the allocation of 4 pages of gart
memory for hardware cursor. Tested by many, ok tedu@

New version of i915 supprotm adapted from freebsd by Dimitry Andric, with
one tweak suggested by miod@.

Back out i915 changes; they broke some i810-based machines.

support i915. adapted from freebsd by Dimitry Andric. does not break
at least i810 on x40, but made x41 work. ok matthieu

fix merge misses
tested by millert, mbalmer and me; ok grange, mickey

Support for i852/855/865 AGP; from NetBSD via Michael van der
Westhuizen <michael@skanky.homeunix.net> with little tweaks.

Tested by millert@ todd@ jmc@ andreas@ and jcs@'s friend
ok millert@

Correct checks for non-i810 chip; from FreeBSD.

test and ok millert@

branches: 1.5.4;
Add i830 support from NetBSD via patch in kernel/3150.
Verified to not break i81[05] and tested on two i830s.

proper free order; from sturm@

branches: 1.3.4;
- some KNF.
- comment out debugging printf for i810.
- remove checks for failure if malloc is used with M_WAITOK.

mickey@ ok.

remove a bunch of debugging printfs and disable agp_debug; prompted by millert@

support for the agp gart on various agp chipsets.
only i810 driver was tested though.
based on the netbsd's lkm, initially ported
by hunter@dg.net.ua and later made into shape by mickey.
testing by art@ and millert@ .

Remove code that has been unused ever since we removed the agp ioctl interface.

ok mpi@

Make inteldrm(4) attach to pci(4) instead of vga(4) just like radeondrm(4).
This is needed for machines where Intel graphics isn't the primary graphics
device and on systems with UEFI firmware that put the device in non-VGA mode.

ok jsg@

Remove evil hack. I've never seen the printf fire, and xenocara no longer
contains any code that can manipulate the affected register directly.

ok jsg@

sizes for free(); ok semarie

Add the required includes for the conditional parts of
struct vga_pci_softc in vga_pcivar.h

Original diff from guenther@ changed to incorporate feedback
from kettenis@ and myself.

Match q33 devices. Previously only inteldrm matched on q33,
which would lead to a panic.
Problem reported by karlis.mikelsons at lf.lv.

add a size argument to free. will be used soon, but for now default to 0.
after discussions with beck deraadt kettenis.

Move GTT management for Sandy Bridge and up into inteldrm(4). This makes
it possible to use the non-mappable part of the GTT, prepares the way for
using the PPGTT and reduces the diffs with Linux.

ok jsg@

No need to include <sys/lock.h> when only <sys/rwlock.h> is needed,
so remove the former and include the latter instead of pulling it
in <dev/pci/agpvar.h>. This header already requires various other
types anyway. While here remove unneeded headers.

The AGP ioctl interface is gone; remove the header file as well.

ok matthieu@

Don't bitch about binding into stolen memory on older hardware either.

Remove some code that has no effect.

We're never going to detach the host bridge on our machines.

spotted by deraadt@ during n2k14

Remove MD intagp(4) code that is unused now that inteldrm(4) manages the GTT
all by itself.

Move the GTT management into the inteldrm driver. It is really obvious now
that this is necessary as on some hardware we need guard pages between
regions that have different cache attributes. Even if this appears to cause
regressions on some hardware, this change is a necessary (but not sufficient)
step to fix the cache coherency problems on the affected hardware.

ok jsg@

Add the remaining support code for 4th gen Intel Core/Haswell graphics
and match the same pci devices Linux does. Untested for lack of
hardware but should work. Note that 3D/OpenGL won't work until
we update to a newer version of Mesa, which can't happen until
the Radeon KMS work is ready.

ok deraadt@

sync the list of pre haswell intel video devices with linux
ok kettenis@