History log of /openbsd-current/sys/arch/sparc64/include/intr.h
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
# 1.25 29-Mar-2024 miod

Drop the first argument of intr_establish().

Instead, require all callers to put the right value in the ih_pil field, and
have intr_establish() trust them rather than assigning this field again from
its first argument.

ok claudio@ kettenis@


# 1.24 29-Mar-2024 miod

send_softint() was designed as being able to target a particular cpu, but the
code for this was never written and all uses target the running cpu anyway,
so stop pretending it may do things it won't do and drop that cpu argument.

ok claudio@ kettenis@


# 1.23 29-Mar-2024 miod

Move C declarations from intreg.h to <machine/intr.h> which includes it.

This makes intreg.h locore-friendly - it only contains the MAXINTNUM define
after that.

ok claudio@ kettenis@


Revision tags: OPENBSD_6_4_BASE OPENBSD_6_5_BASE OPENBSD_6_6_BASE OPENBSD_6_7_BASE OPENBSD_6_8_BASE OPENBSD_6_9_BASE OPENBSD_7_0_BASE OPENBSD_7_1_BASE OPENBSD_7_2_BASE OPENBSD_7_3_BASE OPENBSD_7_4_BASE OPENBSD_7_5_BASE
# 1.22 20-Aug-2018 visa

Remove unused spllock().

OK deraadt@ mpi@


Revision tags: OPENBSD_6_3_BASE
# 1.21 13-Jan-2018 mpi

Define and use IPL_MPFLOOR in our common mutex implementation.

ok kettenis@, visa@


Revision tags: OPENBSD_6_1_BASE OPENBSD_6_2_BASE
# 1.20 17-Aug-2016 dlg

we have some spare interrupt levels, so move softnet above softclock.

ok kettenis@


Revision tags: OPENBSD_6_0_BASE
# 1.19 13-Jun-2016 dlg

rework sparc64 splfoo functions to be more consistent with other archs

this also moves us toward having an MI splraise().

sparc64 (and sparc) are different to the other archs because they
have macros that build templates. each spl uses that macro to create
an instance of an inline function specific to that spl call.

this moves it to having a single splraise inline that the spl api is
defined with. eg, #define splfoo() _splraise(IPL_FOO).

ok kettenis@


Revision tags: OPENBSD_5_9_BASE
# 1.18 27-Sep-2015 kettenis

Store the target CPU in "struct intrhand" and use it in intr_barrier().
Also use it wherever we configure the hardware to direct interrupts to the
right CPU.


# 1.17 13-Sep-2015 kettenis

Introduce intr_barrier(4), an interface that guarantees that an interrupt
handler that was running has finished.

ok miod@, guenther@


Revision tags: OPENBSD_5_4_BASE OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE
# 1.16 17-May-2013 kettenis

Implement IPL_MPSAFE for pci bus interrupt handlers.


# 1.15 13-May-2013 kettenis

Implement support for running interrupt handlers without taking the kernel
lock, by adding a new BUS_INTR_ESTABLISH_MPSAFE flag for use with the
(sparc64-specific) bus_intr_establish(9) interface. Add support for this
flag to schizo(4); other bus drivers will ignore it for now. While there,
remove the BUS_INTR_ESTABLISH_FASTTRAP flag which serves no purpose.


Revision tags: OPENBSD_5_0_BASE OPENBSD_5_1_BASE OPENBSD_5_2_BASE OPENBSD_5_3_BASE
# 1.14 23-Mar-2011 deraadt

Including <sparc64/intreg.h> here is ugly, but intr.h only comes from
<machine/cpu.h> if _KERNEL is defined. The bootblocks are stupid, and
for now they need this. We need more namespace cleanup, for sure.


# 1.13 23-Mar-2011 pirofti

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.


Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE
# 1.12 26-Jun-2008 ray

First pass at removing clauses 3 and 4 from NetBSD licenses.

Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code that NetBSD has claimed for itself without attributing to the
actual authors.

OK deraadt@


# 1.11 28-Apr-2008 kettenis

Rename IPL_SOFTSERIAL to IPL_SOFTTTY. Sprinkle some KNF while I'm there.


# 1.10 12-Mar-2008 kettenis

Introduce a per-handler interrupt acknowledgement function.


Revision tags: OPENBSD_4_3_BASE
# 1.9 14-Feb-2008 kettenis

Make sure an interrupt handler does not get on the per-cpu list of pending
interrupts twice, with one exception: interrupt handlers are allowed to be on
the tail of said lists (needed for clock interrupts on MP kernels).
Prevents losing interrupts. Makes usb keyboard as console work on Sun Blade
1000/2000 with MP kernels.


Revision tags: OPENBSD_3_6_BASE OPENBSD_3_7_BASE OPENBSD_3_8_BASE OPENBSD_3_9_BASE OPENBSD_4_0_BASE OPENBSD_4_1_BASE OPENBSD_4_2_BASE
# 1.8 28-Jun-2004 aaron

Use new event counter API for interrupt counting on sparc64. deraadt@ tholo@
drahn@ millert@ ok


# 1.7 23-Jun-2004 aaron

tabs vs spaces


Revision tags: OPENBSD_3_4_BASE OPENBSD_3_5_BASE SMP_SYNC_A SMP_SYNC_B
# 1.6 24-Jun-2003 henric

Add a "where" argument to the sparc64 interrupt code. This lets us
associate a name with each interrupt handler. This is not visible
outside the kernel (yet).

ok jason@


Revision tags: OPENBSD_3_2_BASE OPENBSD_3_3_BASE UBC_SYNC_A UBC_SYNC_B
# 1.5 11-Jun-2002 art

define IPL_STATCLOCK.


# 1.4 21-May-2002 art

Implement splassert just like it's on sparc.
This also requires a change to rename {PIL,IPL}_IMP to {PIL,IPL}_VM.
XXX - We should get rid of PIL_*.


Revision tags: OPENBSD_3_1_BASE
# 1.3 14-Mar-2002 millert

Final __P removal plus some cosmetic fixups


# 1.2 14-Mar-2002 millert

First round of __P removal in sys


Revision tags: UBC_BASE
# 1.1 18-Aug-2001 jason

branches: 1.1.1; 1.1.2; 1.1.4;
Initial revision


# 1.22 20-Aug-2018 visa

Remove unused spllock().

OK deraadt@ mpi@


Revision tags: OPENBSD_6_3_BASE
# 1.21 13-Jan-2018 mpi

Define and use IPL_MPFLOOR in our common mutex implementation.

ok kettenis@, visa@


Revision tags: OPENBSD_6_1_BASE OPENBSD_6_2_BASE
# 1.20 17-Aug-2016 dlg

we have some spare interrupt levels, so move softnet above softclock.

ok kettenis@


Revision tags: OPENBSD_6_0_BASE
# 1.19 13-Jun-2016 dlg

rework sparc64 splfoo functions to be more consistent with other archs

this also moves us toward having an MI splraise().

sparc64 (and sparc) are different to the other archs because they
have macros that build templates. each spl uses that macro to create
an instance of an inline function specific to that spl call.

this moves it to having a single splraise inline that the spl api is
defined with. eg, #define splfoo() _splraise(IPL_FOO).

ok kettenis@


Revision tags: OPENBSD_5_9_BASE
# 1.18 27-Sep-2015 kettenis

Store the target CPU in "struct intrhand" and use it in intr_barrier().
Also use it wherever we configure the hardware to direct interrupts to the
right CPU.


# 1.17 13-Sep-2015 kettenis

Introduce intr_barrier(4), an interface that guarantees that an interrupt
handler that was running has finished.

ok miod@, guenther@


Revision tags: OPENBSD_5_4_BASE OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE
# 1.16 17-May-2013 kettenis

Implement IPL_MPSAFE for pci bus interrupt handlers.


# 1.15 13-May-2013 kettenis

Implement support for running interrupt handlers without taking the kernel
lock, by adding a new BUS_INTR_ESTABLISH_MPSAFE flag for use with the
(sparc64-specific) bus_intr_establish(9) interface. Add support for this
flag to schizo(4); other bus drivers will ignore it for now. While there,
remove the BUS_INTR_ESTABLISH_FASTTRAP flag which serves no purpose.


Revision tags: OPENBSD_5_0_BASE OPENBSD_5_1_BASE OPENBSD_5_2_BASE OPENBSD_5_3_BASE
# 1.14 23-Mar-2011 deraadt

Including <sparc64/intreg.h> here is ugly, but intr.h only comes from
<machine/cpu.h> if _KERNEL is defined. The bootblocks are stupid, and
for now they need this. We need more namespace cleanup, for sure.


# 1.13 23-Mar-2011 pirofti

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.


Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE
# 1.12 26-Jun-2008 ray

First pass at removing clauses 3 and 4 from NetBSD licenses.

Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code that NetBSD has claimed for itself without attributing to the
actual authors.

OK deraadt@


# 1.11 28-Apr-2008 kettenis

Rename IPL_SOFTSERIAL to IPL_SOFTTTY. Sprinkle some KNF while I'm there.


# 1.10 12-Mar-2008 kettenis

Introduce a per-handler interrupt acknowledgement function.


Revision tags: OPENBSD_4_3_BASE
# 1.9 14-Feb-2008 kettenis

Make sure an interrupt handler does not get on the per-cpu list of pending
interrupts twice, with one exception: interrupt handlers are allowed to be on
the tail of said lists (needed for clock interrupts on MP kernels).
Prevents losing interrupts. Makes usb keyboard as console work on Sun Blade
1000/2000 with MP kernels.


Revision tags: OPENBSD_3_6_BASE OPENBSD_3_7_BASE OPENBSD_3_8_BASE OPENBSD_3_9_BASE OPENBSD_4_0_BASE OPENBSD_4_1_BASE OPENBSD_4_2_BASE
# 1.8 28-Jun-2004 aaron

Use new event counter API for interrupt counting on sparc64. deraadt@ tholo@
drahn@ millert@ ok


# 1.7 23-Jun-2004 aaron

tabs vs spaces


Revision tags: OPENBSD_3_4_BASE OPENBSD_3_5_BASE SMP_SYNC_A SMP_SYNC_B
# 1.6 24-Jun-2003 henric

Add a "where" argument to the sparc64 interrupt code. This lets us
associate a name with each interrupt handler. This is not visible
outside the kernel (yet).

ok jason@


Revision tags: OPENBSD_3_2_BASE OPENBSD_3_3_BASE UBC_SYNC_A UBC_SYNC_B
# 1.5 11-Jun-2002 art

define IPL_STATCLOCK.


# 1.4 21-May-2002 art

Implement splassert just like it's on sparc.
This also requires a change to rename {PIL,IPL}_IMP to {PIL,IPL}_VM.
XXX - We should get rid of PIL_*.


Revision tags: OPENBSD_3_1_BASE
# 1.3 14-Mar-2002 millert

Final __P removal plus some cosmetic fixups


# 1.2 14-Mar-2002 millert

First round of __P removal in sys


Revision tags: UBC_BASE
# 1.1 18-Aug-2001 jason

branches: 1.1.1; 1.1.2; 1.1.4;
Initial revision


# 1.21 13-Jan-2018 mpi

Define and use IPL_MPFLOOR in our common mutex implementation.

ok kettenis@, visa@


Revision tags: OPENBSD_6_1_BASE OPENBSD_6_2_BASE
# 1.20 17-Aug-2016 dlg

we have some spare interrupt levels, so move softnet above softclock.

ok kettenis@


Revision tags: OPENBSD_6_0_BASE
# 1.19 13-Jun-2016 dlg

rework sparc64 splfoo functions to be more consistent with other archs

this also moves us toward having an MI splraise().

sparc64 (and sparc) are different to the other archs because they
have macros that build templates. each spl uses that macro to create
an instance of an inline function specific to that spl call.

this moves it to having a single splraise inline that the spl api is
defined with. eg, #define splfoo() _splraise(IPL_FOO).

ok kettenis@


Revision tags: OPENBSD_5_9_BASE
# 1.18 27-Sep-2015 kettenis

Store the target CPU in "struct intrhand" and use it in intr_barrier().
Also use it wherever we configure the hardware to direct interrupts to the
right CPU.


# 1.17 13-Sep-2015 kettenis

Introduce intr_barrier(4), an interface that guarantees that an interrupt
handler that was running has finished.

ok miod@, guenther@


Revision tags: OPENBSD_5_4_BASE OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE
# 1.16 17-May-2013 kettenis

Implement IPL_MPSAFE for pci bus interrupt handlers.


# 1.15 13-May-2013 kettenis

Implement support for running interrupt handlers without taking the kernel
lock, by adding a new BUS_INTR_ESTABLISH_MPSAFE flag for use with the
(sparc64-specific) bus_intr_establish(9) interface. Add support for this
flag to schizo(4); other bus drivers will ignore it for now. While there,
remove the BUS_INTR_ESTABLISH_FASTTRAP flag which serves no purpose.


Revision tags: OPENBSD_5_0_BASE OPENBSD_5_1_BASE OPENBSD_5_2_BASE OPENBSD_5_3_BASE
# 1.14 23-Mar-2011 deraadt

Including <sparc64/intreg.h> here is ugly, but intr.h only comes from
<machine/cpu.h> if _KERNEL is defined. The bootblocks are stupid, and
for now they need this. We need more namespace cleanup, for sure.


# 1.13 23-Mar-2011 pirofti

Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.

Discussed and okay drahn@. Okay deraadt@.


Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE
# 1.12 26-Jun-2008 ray

First pass at removing clauses 3 and 4 from NetBSD licenses.

Not sure what's more surprising: how long it took for NetBSD to
catch up to the rest of the BSDs (including UCB), or the amount of
code that NetBSD has claimed for itself without attributing to the
actual authors.

OK deraadt@


# 1.11 28-Apr-2008 kettenis

Rename IPL_SOFTSERIAL to IPL_SOFTTTY. Sprinkle some KNF while I'm there.


# 1.10 12-Mar-2008 kettenis

Introduce a per-handler interrupt acknowledgement function.


Revision tags: OPENBSD_4_3_BASE
# 1.9 14-Feb-2008 kettenis

Make sure an interrupt handler does not get on the per-cpu list of pending
interrupts twice, with one exception: interrupt handlers are allowed to be on
the tail of said lists (needed for clock interrupts on MP kernels).
Prevents losing interrupts. Makes usb keyboard as console work on Sun Blade
1000/2000 with MP kernels.


Revision tags: OPENBSD_3_6_BASE OPENBSD_3_7_BASE OPENBSD_3_8_BASE OPENBSD_3_9_BASE OPENBSD_4_0_BASE OPENBSD_4_1_BASE OPENBSD_4_2_BASE
# 1.8 28-Jun-2004 aaron

Use new event counter API for interrupt counting on sparc64. deraadt@ tholo@
drahn@ millert@ ok


# 1.7 23-Jun-2004 aaron

tabs vs spaces


Revision tags: OPENBSD_3_4_BASE OPENBSD_3_5_BASE SMP_SYNC_A SMP_SYNC_B
# 1.6 24-Jun-2003 henric

Add a "where" argument to the sparc64 interrupt code. This lets us
associate a name with each interrupt handler. This is not visible
outside the kernel (yet).

ok jason@


Revision tags: OPENBSD_3_2_BASE OPENBSD_3_3_BASE UBC_SYNC_A UBC_SYNC_B
# 1.5 11-Jun-2002 art

define IPL_STATCLOCK.


# 1.4 21-May-2002 art

Implement splassert just like it's on sparc.
This also requires a change to rename {PIL,IPL}_IMP to {PIL,IPL}_VM.
XXX - We should get rid of PIL_*.


Revision tags: OPENBSD_3_1_BASE
# 1.3 14-Mar-2002 millert

Final __P removal plus some cosmetic fixups


# 1.2 14-Mar-2002 millert

First round of __P removal in sys


Revision tags: UBC_BASE
# 1.1 18-Aug-2001 jason

branches: 1.1.1; 1.1.2; 1.1.4;
Initial revision