| #
1.8 |
|
29-Mar-2024 |
kettenis |
Use SBI calls to reboot or power down the machine when the firmware
supports them.
ok jca@
|
|
Revision tags: OPENBSD_7_3_BASE OPENBSD_7_4_BASE OPENBSD_7_5_BASE
|
|
| #
1.7 |
|
06-Dec-2022 |
jca |
Print SBI vendor, version and implemented spec version
On my Unmatched:
SBI: OpenSBI v0.9, SBI Specification Version 0.2
ok mlarkin@
|
|
Revision tags: OPENBSD_7_0_BASE OPENBSD_7_1_BASE OPENBSD_7_2_BASE
|
|
| #
1.6 |
|
02-Jul-2021 |
kettenis |
Run SBI calls to to get mvendorid/marchid/mimplid on the actual CPU we're
probing and decode mvendorid and marchid.
ok mlarkin@, deraadt@, jsg@
|
| #
1.5 |
|
27-Jun-2021 |
kettenis |
Add Hart State Management functions. These will be needed to spin up
the secondary cores. From FreeBSD.
ok mlarkin@
|
| #
1.4 |
|
12-May-2021 |
jsg |
add OpenBSD rcs ids
|
| #
1.3 |
|
01-May-2021 |
kettenis |
Implement early console functionality based on available SBI calls.
While these calls are part of the legacy extensions and deprecated, they
are really useful for debugging purposes.
ok jsg@
|
| #
1.2 |
|
30-Apr-2021 |
jsg |
remove FreeBSD derived riscv cpu ident
print the mvendorid marchid mimpid values from sbi instead of
using hardcoded values
continue printing riscv,isa and copy it to cpu_model so it
will show up in sysctl
ok kettenis@
|
| #
1.1 |
|
23-Apr-2021 |
drahn |
Initial import of OpenBSD/riscv64
This work is based on the effort:
https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf
"Porting OpenBSD to RISC-V ISA"
by
Brian Bamsch <bbamsch@google.com>
Wenyan He <wenyan.he@sjsu.edu>
Mars Li <mengshi.li.mars@gmail.com>
Shivam Waghela <shivamwaghela@gmail.com>
With additional work by Dale Rahn <drahn@openbsd.org>
|
| #
1.7 |
|
06-Dec-2022 |
jca |
Print SBI vendor, version and implemented spec version
On my Unmatched:
SBI: OpenSBI v0.9, SBI Specification Version 0.2
ok mlarkin@
|
|
Revision tags: OPENBSD_7_0_BASE OPENBSD_7_1_BASE OPENBSD_7_2_BASE
|
|
| #
1.6 |
|
02-Jul-2021 |
kettenis |
Run SBI calls to to get mvendorid/marchid/mimplid on the actual CPU we're
probing and decode mvendorid and marchid.
ok mlarkin@, deraadt@, jsg@
|
| #
1.5 |
|
27-Jun-2021 |
kettenis |
Add Hart State Management functions. These will be needed to spin up
the secondary cores. From FreeBSD.
ok mlarkin@
|
| #
1.4 |
|
12-May-2021 |
jsg |
add OpenBSD rcs ids
|
| #
1.3 |
|
01-May-2021 |
kettenis |
Implement early console functionality based on available SBI calls.
While these calls are part of the legacy extensions and deprecated, they
are really useful for debugging purposes.
ok jsg@
|
| #
1.2 |
|
30-Apr-2021 |
jsg |
remove FreeBSD derived riscv cpu ident
print the mvendorid marchid mimpid values from sbi instead of
using hardcoded values
continue printing riscv,isa and copy it to cpu_model so it
will show up in sysctl
ok kettenis@
|
| #
1.1 |
|
23-Apr-2021 |
drahn |
Initial import of OpenBSD/riscv64
This work is based on the effort:
https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf
"Porting OpenBSD to RISC-V ISA"
by
Brian Bamsch <bbamsch@google.com>
Wenyan He <wenyan.he@sjsu.edu>
Mars Li <mengshi.li.mars@gmail.com>
Shivam Waghela <shivamwaghela@gmail.com>
With additional work by Dale Rahn <drahn@openbsd.org>
|
| #
1.6 |
|
02-Jul-2021 |
kettenis |
Run SBI calls to to get mvendorid/marchid/mimplid on the actual CPU we're
probing and decode mvendorid and marchid.
ok mlarkin@, deraadt@, jsg@
|
| #
1.5 |
|
27-Jun-2021 |
kettenis |
Add Hart State Management functions. These will be needed to spin up
the secondary cores. From FreeBSD.
ok mlarkin@
|
| #
1.4 |
|
12-May-2021 |
jsg |
add OpenBSD rcs ids
|
| #
1.3 |
|
01-May-2021 |
kettenis |
Implement early console functionality based on available SBI calls.
While these calls are part of the legacy extensions and deprecated, they
are really useful for debugging purposes.
ok jsg@
|
| #
1.2 |
|
30-Apr-2021 |
jsg |
remove FreeBSD derived riscv cpu ident
print the mvendorid marchid mimpid values from sbi instead of
using hardcoded values
continue printing riscv,isa and copy it to cpu_model so it
will show up in sysctl
ok kettenis@
|
| #
1.1 |
|
23-Apr-2021 |
drahn |
Initial import of OpenBSD/riscv64
This work is based on the effort:
https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf
"Porting OpenBSD to RISC-V ISA"
by
Brian Bamsch <bbamsch@google.com>
Wenyan He <wenyan.he@sjsu.edu>
Mars Li <mengshi.li.mars@gmail.com>
Shivam Waghela <shivamwaghela@gmail.com>
With additional work by Dale Rahn <drahn@openbsd.org>
|
| #
1.5 |
|
27-Jun-2021 |
kettenis |
Add Hart State Management functions. These will be needed to spin up
the secondary cores. From FreeBSD.
ok mlarkin@
|
| #
1.4 |
|
12-May-2021 |
jsg |
add OpenBSD rcs ids
|
| #
1.3 |
|
01-May-2021 |
kettenis |
Implement early console functionality based on available SBI calls.
While these calls are part of the legacy extensions and deprecated, they
are really useful for debugging purposes.
ok jsg@
|
| #
1.2 |
|
30-Apr-2021 |
jsg |
remove FreeBSD derived riscv cpu ident
print the mvendorid marchid mimpid values from sbi instead of
using hardcoded values
continue printing riscv,isa and copy it to cpu_model so it
will show up in sysctl
ok kettenis@
|
| #
1.1 |
|
23-Apr-2021 |
drahn |
Initial import of OpenBSD/riscv64
This work is based on the effort:
https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf
"Porting OpenBSD to RISC-V ISA"
by
Brian Bamsch <bbamsch@google.com>
Wenyan He <wenyan.he@sjsu.edu>
Mars Li <mengshi.li.mars@gmail.com>
Shivam Waghela <shivamwaghela@gmail.com>
With additional work by Dale Rahn <drahn@openbsd.org>
|
| #
1.4 |
|
12-May-2021 |
jsg |
add OpenBSD rcs ids
|
| #
1.3 |
|
01-May-2021 |
kettenis |
Implement early console functionality based on available SBI calls.
While these calls are part of the legacy extensions and deprecated, they
are really useful for debugging purposes.
ok jsg@
|
| #
1.2 |
|
30-Apr-2021 |
jsg |
remove FreeBSD derived riscv cpu ident
print the mvendorid marchid mimpid values from sbi instead of
using hardcoded values
continue printing riscv,isa and copy it to cpu_model so it
will show up in sysctl
ok kettenis@
|
| #
1.1 |
|
23-Apr-2021 |
drahn |
Initial import of OpenBSD/riscv64
This work is based on the effort:
https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf
"Porting OpenBSD to RISC-V ISA"
by
Brian Bamsch <bbamsch@google.com>
Wenyan He <wenyan.he@sjsu.edu>
Mars Li <mengshi.li.mars@gmail.com>
Shivam Waghela <shivamwaghela@gmail.com>
With additional work by Dale Rahn <drahn@openbsd.org>
|
| #
1.3 |
|
01-May-2021 |
kettenis |
Implement early console functionality based on available SBI calls.
While these calls are part of the legacy extensions and deprecated, they
are really useful for debugging purposes.
ok jsg@
|
| #
1.2 |
|
30-Apr-2021 |
jsg |
remove FreeBSD derived riscv cpu ident
print the mvendorid marchid mimpid values from sbi instead of
using hardcoded values
continue printing riscv,isa and copy it to cpu_model so it
will show up in sysctl
ok kettenis@
|
| #
1.1 |
|
23-Apr-2021 |
drahn |
Initial import of OpenBSD/riscv64
This work is based on the effort:
https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf
"Porting OpenBSD to RISC-V ISA"
by
Brian Bamsch <bbamsch@google.com>
Wenyan He <wenyan.he@sjsu.edu>
Mars Li <mengshi.li.mars@gmail.com>
Shivam Waghela <shivamwaghela@gmail.com>
With additional work by Dale Rahn <drahn@openbsd.org>
|