Enter power-saving mode on POWER9 (ISA v3)

When opal(4) attaches, look in the device tree for a psscr value. In
cpu_idle_cycle(), use this psscr value and the stop instruction to
wait for the next interrupt. In mp kernels, cpu_unidle() now sends an
interrupt. In "sysctl hw.sensors", the power and temperature sensors
from opalsens(4) may show lower values.

The cpu may exit stop at the system reset vector after losing user
registers. If so, restore some registers. For now, ignore deeper
stop states that would lose hypervisor registers.

Our mp kernel uses only the first hardware thread of each core. Take
the extra threads from the firmware and stop them forever; this may
switch the core from SMT4 to single-thread mode and increase
performance.

partly by kettenis@, ok kettenis@

Sprinkle some .type statements to help btrace(4) pick function names.

Stop using %r13 as the per-cpu register in the kernel. Since
uvm_map_inentry() may sleep we would have to do the same fixup as after
calling uvm_fault() there. It is just simpler and safer to just rely
on the pointer in SPRG0.

Implement spilling of kernel SLB entries. Mostly from FreeBSD.

This makes it possible to use more SLB entries for the kernel than the
hardware supports. The design is such that a subset of the hardware SLB
entries can be replaced when needed. This makes sure the entries
mapping kernel code and data and the page tables ar always present.
Traps for missing SLB entries are handled in real-mode and on a special
stack such that it doesn't have to rely on SLB entires mapping kernel
stacks.

With this in place we can increase KVA to 32GB. Hopefully that's enough
to support large memory configurations.

Whitespace.

Let traps save and restore VRSAVE.

The minimum frame size for the ELFv2 ABI is 32 bytes. Using this value
instead of 48 in the trap setup functions makes it possible to get rid
of the magic offset in proc_trampoline.

Suggested by gkoehler@

Make return-to-user and kernel re-entry work. This adds a per-pmap SLB
cache. We might want to turn that in a per-proc cache at some point, but
this gets us to the point where we can sucessfully have init(1) do its
first system call.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

Sprinkle some .type statements to help btrace(4) pick function names.

Stop using %r13 as the per-cpu register in the kernel. Since
uvm_map_inentry() may sleep we would have to do the same fixup as after
calling uvm_fault() there. It is just simpler and safer to just rely
on the pointer in SPRG0.

Implement spilling of kernel SLB entries. Mostly from FreeBSD.

This makes it possible to use more SLB entries for the kernel than the
hardware supports. The design is such that a subset of the hardware SLB
entries can be replaced when needed. This makes sure the entries
mapping kernel code and data and the page tables ar always present.
Traps for missing SLB entries are handled in real-mode and on a special
stack such that it doesn't have to rely on SLB entires mapping kernel
stacks.

With this in place we can increase KVA to 32GB. Hopefully that's enough
to support large memory configurations.

Whitespace.

Let traps save and restore VRSAVE.

The minimum frame size for the ELFv2 ABI is 32 bytes. Using this value
instead of 48 in the trap setup functions makes it possible to get rid
of the magic offset in proc_trampoline.

Suggested by gkoehler@

Make return-to-user and kernel re-entry work. This adds a per-pmap SLB
cache. We might want to turn that in a per-proc cache at some point, but
this gets us to the point where we can sucessfully have init(1) do its
first system call.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

Stop using %r13 as the per-cpu register in the kernel. Since
uvm_map_inentry() may sleep we would have to do the same fixup as after
calling uvm_fault() there. It is just simpler and safer to just rely
on the pointer in SPRG0.

Implement spilling of kernel SLB entries. Mostly from FreeBSD.

This makes it possible to use more SLB entries for the kernel than the
hardware supports. The design is such that a subset of the hardware SLB
entries can be replaced when needed. This makes sure the entries
mapping kernel code and data and the page tables ar always present.
Traps for missing SLB entries are handled in real-mode and on a special
stack such that it doesn't have to rely on SLB entires mapping kernel
stacks.

With this in place we can increase KVA to 32GB. Hopefully that's enough
to support large memory configurations.

Whitespace.

Let traps save and restore VRSAVE.

The minimum frame size for the ELFv2 ABI is 32 bytes. Using this value
instead of 48 in the trap setup functions makes it possible to get rid
of the magic offset in proc_trampoline.

Suggested by gkoehler@

Make return-to-user and kernel re-entry work. This adds a per-pmap SLB
cache. We might want to turn that in a per-proc cache at some point, but
this gets us to the point where we can sucessfully have init(1) do its
first system call.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

Implement spilling of kernel SLB entries. Mostly from FreeBSD.

This makes it possible to use more SLB entries for the kernel than the
hardware supports. The design is such that a subset of the hardware SLB
entries can be replaced when needed. This makes sure the entries
mapping kernel code and data and the page tables ar always present.
Traps for missing SLB entries are handled in real-mode and on a special
stack such that it doesn't have to rely on SLB entires mapping kernel
stacks.

With this in place we can increase KVA to 32GB. Hopefully that's enough
to support large memory configurations.

Whitespace.

Let traps save and restore VRSAVE.

The minimum frame size for the ELFv2 ABI is 32 bytes. Using this value
instead of 48 in the trap setup functions makes it possible to get rid
of the magic offset in proc_trampoline.

Suggested by gkoehler@

Make return-to-user and kernel re-entry work. This adds a per-pmap SLB
cache. We might want to turn that in a per-proc cache at some point, but
this gets us to the point where we can sucessfully have init(1) do its
first system call.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

Let traps save and restore VRSAVE.

The minimum frame size for the ELFv2 ABI is 32 bytes. Using this value
instead of 48 in the trap setup functions makes it possible to get rid
of the magic offset in proc_trampoline.

Suggested by gkoehler@

Make return-to-user and kernel re-entry work. This adds a per-pmap SLB
cache. We might want to turn that in a per-proc cache at some point, but
this gets us to the point where we can sucessfully have init(1) do its
first system call.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

The minimum frame size for the ELFv2 ABI is 32 bytes. Using this value
instead of 48 in the trap setup functions makes it possible to get rid
of the magic offset in proc_trampoline.

Suggested by gkoehler@

Make return-to-user and kernel re-entry work. This adds a per-pmap SLB
cache. We might want to turn that in a per-proc cache at some point, but
this gets us to the point where we can sucessfully have init(1) do its
first system call.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

Implement copyin(9), copyout(9), copyinstr(9) and copyoutstr(9).

Set %r13 with a pointer to our per-CPU info struct when setting up a
trapframe.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

AST handling.

Cache kernel SLB entries in per-CPU struct and restore them upon
kernel entry.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.

Get context switching between kernel threads going.

Since the stacks for kernel threads are not mapped 1:1 this involves
translating virtual addresses into physical addresses when making
OPAL calls.

Add support for the XIVE interrupt controller found on POWER9 CPUs.

Make FRAME_LEAVE a bit more complete and do things in the same order as
FreeBSD for now.

Enable translation in the trap handlers.
Initialize msgbuf.

Enter ddb at a trap instruction or with db_enter().

Tell make that trap_subr.S needs assym.h.
Fill in opal_cngetc() so I can type at the "ddb>" prompt.
Add enough code to trap_subr.S to "c" continue from ddb.
Give registers to ddb.
Try to load symbols from initrd.

ok kettenis@

Fill complete trap frame.

Add some very simple trap handling.