Normally context switches happen in mi_switch() but there are 3 cases
where a switch happens outside. Cleanup these code paths and make the
machine independent.

- when a process forks (fork, tfork, kthread), the new proc needs to
somehow be scheduled for the first time. This is done by proc_trampoline.
Since proc_trampoline is machine dependent assembler code change
the MP specific proc_trampoline_mp() to proc_trampoline_mi() and make
sure it is now always called.
- cpu_hatch: when booting APs the code needs to jump to the first proc
running on that CPU. This should be the idle thread for that CPU.
- sched_exit: when a proc exits it needs to switch away from itself and
then instruct the reaper to clean up the rest. This is done by switching
to the idle loop.

Since the last two cases require a context switch to the idle proc factor
out the common code to sched_toidle() and use it in those places.

Tested by many on all archs.
OK miod@ mpi@ cheloha@

timecounting: remove incomplete PPS support

The timecounting code has had stubs for pulse-per-second (PPS) polling
since it was imported in 2004. At this point it seems unlikely that
anyone is going to finish adding PPS support, so let's remove the stubs:

- Delete the dead tc_poll_pps() call from tc_windup().
- Remove all tc_poll_pps symbols from the kernel.

Link: https://marc.info/?l=openbsd-tech&m=167519035723210&w=2

ok miod@

Enable TLB read inhibit on OCTEON Plus and newer SoCs.

OK deraadt@

Replace cpus_running with CPU_IS_RUNNING().

Remember to set CPUF_RUNNING on secondary CPUs.

Make hw_cpu_hatch() more similar on loongson and octeon.

panic does not require a \n at the end. When one is provided, it looks wrong.

Add initial bits for Check Point UTM-1 EDGE N.

From Thaison Nguyen

Handle Netgear ProSecure UTM25

This makes the system recognize and configure Netgear ProSecure UTM25.
Of the network ports, LAN1-4 and WAN1 are functional. WAN2 does not work
for some reason. Even though WAN1 has a separate link to the SoC, the
connection appears to go through the same switch that the LAN ports use.
At the moment, the system relies on U-Boot to set up the switch so that
the LAN and WAN segments stay separate.

Initial diff and input from Thaison Nguyen, thank you!

Abstract octeon board handling a little

Detect octeon board model in one place, and replace firmware-supplied
board_type with an abstract model identifier in driver code. This makes
it easier to manage with different products, and board flavours, that
happen to use the same model information, such as board_type.

Userland timecounter implementation for octeon

OK naddy@; no objections from kettenis@

Synchronize each core's CP0 cycle counter using the IO clock counter.
This makes the cycle counter usable as timecounter on multiprocessor
machines.

Idea from Linux.

Tested on CN5020, CN6120, CN7130 and CN7360.

Looks reasonable to kettenis@

Add support for timeconting in userland.

This diff exposes parts of clock_gettime(2) and gettimeofday(2) to
userland via libc eliberating processes from the need for a context
switch everytime they want to count the passage of time.

If a timecounter clock can be exposed to userland than it needs to set
its tc_user member to a non-zero value. Tested with one or multiple
counters per architecture.

The timing data is shared through a pointer found in the new ELF
auxiliary vector AUX_openbsd_timekeep containing timehands information
that is frequently updated by the kernel.

Timing differences between the last kernel update and the current time
are adjusted in userland by the tc_get_timecount() function inside the
MD usertc.c file.

This permits a much more responsive environment, quite visible in
browsers, office programs and gaming (apparently one is are able to fly
in Minecraft now).

Tested by robert@, sthen@, naddy@, kmos@, phessler@, and many others!

OK from at least kettenis@, cheloha@, naddy@, sthen@

cpu_rnd_messybits() for mips64

Use CP0 Count as a basis. Also take noise from virtual memory activity
by including BadVAddr.

OK deraadt@ dlg@

introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.

rnd.c uses nanotime to get access to some bits that change quickly
between events that it can mix into the entropy pool. it doesn't
use nanotime to get a monotonically increasing set or ordered and
accurate timestamps, it just wants something with bits that change.

there's been discussions for years about letting rnd use a clock
that's super fast to read, but not necessarily accurate, but it
wasn't until recently that i figured out it wasn't interested in
time at all, so things like keeping a fast clock coherent between
cpu cores or correct according to ntp is unecessary. this means we
can just let rnd read the cycle counters on cpus and things will
be fine. cpus with cycle counters that vary in their speed and
arent kept consistent between cores may even be desirable in this
context.

so this is the first step in converting rnd.c to reading cycle
counter. it copies the nanotime backend to each arch, and they can
replace it with something MD as a second step later on.

djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits.
thanks to visa for his eyes.
ok deraadt@ visa@
deraadt@ says he will help handle any MD fallout that occurs.

dev/rndvar.h no longer has statistical interfaces (removed during various
conversion steps). it only contains kernel prototypes for 4 interfaces,
all of which legitimately belong in sys/systm.h, which are already included
by all enqueue_randomness() users.

Pass boothowto from the bootloader to the kernel on octeon.

OK deraadt@

Mix board information into the entropy pool.

The data are static but they introduce differences between systems.

OK deraadt@

Convert various boolean_t/TRUE/FALSE to int/1/0 in mips64 memory code.

OK mpi@

rename the 'cn30xx' drivers to just 'oct', because digits inside devices
drivers is gross. discussed with visa.

Fix kmem access on octeon. Currently, mem_layout lists segments that
were free after the kernel was loaded. The memory occupied by the kernel
image is not included. To let libkvm access the image through /dev/kmem,
return true from is_memory_range() if the physical address is within
the kernel.

Adjust search of symbol table pointers to match with the bootloader.

Add a bootloader for octeon.

The firmware on OCTEON machines usually does not provide an interface
for accessing devices, which has made it tricky to implement an OpenBSD
bootloader. To solve this device access problem, this new loader has
been built on top of a small kernel. The kernel provides all the
necessary devices drivers, while most of the usual bootloader logic
is in a userspace program in a ramdisk.

The loader program is accompanied by a special device, octboot(4).
The main purpose of this device is to implement a mechanism for
loading and launching kernels. The mechanism has been inspired by Linux'
kexec(2) system call.

The bootloader will be enabled later when it is ready for general use.

Discussed with deraadt@

Remove unnecessary extern declarations.

Make rootdev parsing a little saner. The "rootdev=" prefix can be
removed already in process_bootargs(). Pass the value as a parameter
to parse_uboot_root(). Set uboot_rootdev only if parsing succeeds.

Fix misleading code. The kernel keeps using the original boot
descriptors even after bootstrap.

Add parsing for standard boot options.

Use the .bss for the bootstrap stack of mips_init(). This way the memory
region is properly allocated by the firmware.

Move the .bss clearing to locore.S because the section has to be ready
when the stack is taken into use. This additionally makes the
C environment more consistent at the start of mips_init().

fast track ddb> reboot command to skip anything which might panic again.
ok deraadt

Figure out the number of available CPUs using system fuse registers.
This makes `ncpusfound' independent of kernel boot parameters.

The kernel still needs the help of the firmware to spin up secondary
CPUs, so the `coremask' or `numcores' boot parameter is still needed
for multicore operation.

Tested on CN5020, CN6120, CN7130 and CN7360.

Add processor IDs for several OCTEON II and III SoCs.

Make octeon kernels compile with DEBUG.

Based on a diff from jj@. Thank you!

Add a driver for the OCTEON cryptographic unit. It provides
a hardware-accelerated implementation of several encryption
and authentication algorithms for ipsec(4):

AES-CBC
AES-CTR
AES-GCM
AES-GMAC
HMAC-MD5
HMAC-SHA1
HMAC-SHA2-256
HMAC-SHA2-384
HMAC-SHA2-512

Please note that the driver is currently disabled.

OK deraadt@

Fix the computation of `ncpusfound' on !MULTIPROCESSOR kernels so that
the value matches with the number of cores that GENERIC.MP uses.

OK deraadt@, krw@, pirofti@

Delete unnecessary <sys/file.h> includes

ok millert@ krw@

In uvm Chuck decided backing store would not be allocated proactively
for blocks re-fetchable from the filesystem. However at reboot time,
filesystems are unmounted, and since processes lack backing store they
are killed. Since the scheduler is still running, in some cases init is
killed... which drops us to ddb [noted by bluhm]. Solution is to convert
filesystems to read-only [proposed by kettenis]. The tale follows:
sys_reboot() should pass proc * to MD boot() to vfs_shutdown() which
completes current IO with vfs_busy VB_WRITE|VB_WAIT, then calls VFS_MOUNT()
with MNT_UPDATE | MNT_RDONLY, soon teaching us that *fs_mount() calls a
copyin() late... so store the sizes in vfsconflist[] and move the copyin()
to sys_mount()... and notice nfs_mount copyin() is size-variant, so kill
legacy struct nfs_args3. Next we learn ffs_mount()'s MNT_UPDATE code is
sharp and rusty especially wrt softdep, so fix some bugs adn add
~MNT_SOFTDEP to the downgrade. Some vnodes need a little more help,
so tie them to &dead_vnops.

ffs_mount calling DIOCCACHESYNC is causing a bit of grief still but
this issue is seperate and will be dealt with in time.
couple hundred reboots by bluhm and myself, advice from guenther and
others at the hut

Add readiness to utilize LMTDMA operations.

Do not print "cpuX launched" any longer. This reduces dmesg spam
on multicore systems.

Let the kernel utilize the FPU if one is available, even when the
FPUEMUL option is enabled. This benefits OCTEON III systems which can
run floating-point operations natively.

Feedback from and OK miod@; he also helped with testing.

Tested on octeon without FPU (CN5020, CN6120) and with FPU (CN7130),
as well as on sgi/IP27 (MP R16000), sgi/IP32 (R5000), and
loongson (3A1000).

Use macros for Config1 bits.

Replace OCTEON_MAXCPUS with MAXCPUS to avoid redundancy.

Attach com(4) using fdt on octeon.

The relevant part of uartbus(4) is made part of the com(4) glue
to avoid extra maneuvers in the code.

Fix the timecounter register on CN72xx/CN73xx.

Use octeon_model_family() for SoC identification as in the rest
of the code.

Use type register_t instead of __register_t. Drop unneeded __unused.

Move IPI control entry points into octeon_intr.c.
Needed by upcoming driver changes.

Drop unnecessary call to octeon_setintrmask(). The function gets called
by the splx() handler.

Fix TLB size computation on OCTEON II and III. The CPUs have utilized
the whole TLB space even before this. However, TLB initialization on
boot and TLB flush on ASID wraparound have been incomplete. These have
caused crashes of processes.

Add a memory barrier to ensure that stores become visible
in a proper order.

Rename Debugger() into db_enter().

Using a name with the 'db_' prefix makes it invisible from the dynamic
profiler.

ok deraadt@, kettenis@, visa@

Add an fdt blob for octeon systems whose firmware does not provide
a device-tree. It will be needed later when more device drivers
are attached using fdt.

OK kettenis@

Make TCB address available to userspace via the UserLocal register.
This lets programs get the address without a system call on OCTEON II
and later.

Add UserLocal load emulation for systems that do not implement
the RDHWR instruction or the UserLocal register.

OK guenther@

Add prid for CN72xx/CN73xx.

Make SoC version available in a simple form.

printf format strings should be literals. Reminded by clang.

Ansify cpu_sysctl() on mips64 platforms.

OK patrick@, visa@, jasper@, mpi@

Fix IO clock speed and system reset on Octeon III.

On some systems, the firmware advertises multiple tiny and disjoint
regions of free memory whose size is no more than a few page frames.
Ignore them in order not to clutter uvm with fragments.

Start process_bootargs at 0 instead of 1.
When using endbootargs in U-Boot arguments start at position 0.

OK visa@

Revert previous `ncpus' change because the percpu code now works
without it.

Increment `ncpus' to its final value already during autoconfiguration so
that percpu data areas get allocated properly on mips64 platforms. It is
too late to set the value during launch of secondary CPUs.

ok jasper@ kettenis@ dlg@

Apply consistency to forever loops with continue and NOTREACHED

Same thought from kettenis@, ok krw@ phessler@ millert@

Utilize the TLB Execute-Inhibit bit with non-executable mappings on CPUs
that support the Execute-Inhibit exception. This makes user space W^X
effective on Octeon Plus and later Octeon versions.

Feedback from miod@, thanks!
No objection from deraadt@

Add fdt init for octeon.

On Octeon systems, U-Boot provides a list of usable memory regions. Use
the list instead of hardcoded regions in memory setup. Works on
EdgeRouter Lite, EdgeRouter Pro, Lanner MR326b and Movidis 16x.

Tested by jj@
Tested by and ok jmatthew@

Rename mips64's trap_frame into trapframe.

For coherency with other archs and in order to use it in MI code.

ok visa@, tobiasu@

Panic if someone boots the kernel by force without CPU 0. The system
will not work without that core.

Enable the DR1 region even with 32-bit page table entries. Those have
enough bits for addressing the region.

Clean up octeon memory region setup.

Diff by miod@ during c2k15
Tested by jbg@, jasper@, pirofti@
OK jasper@, pirofti@

Use the IPD Clock Count register as a timecounter, making the clock
tick in Octeon MP land.

ok pirofti@, miod@, uebayasi@

Register the IPI handler early enough for the correct idle_mask to
propagate to all threads. Otherwise early-started kernel threads run
IPIs disabled, which will lead to a deadlock soon after other cores
have started.

ok miod@ pirofti@

Ditch the octeon simulator non-sense.

Discussed with miod@.

Refix memory handling for machines with less than 256M broken by revision 1.64.

Allows my DSR-500 to boot again.

Okay miod@.

Re-enable memory above 256mb now that uvm_pmr_get1page() has been fixed.
From Visa Hankala.

retire shutdown hooks; ok deraadt, krw

Use config_suspend_all(9).

ok mpi@, uebayasi@, dlg@

Do not use CKSEG0 to quickly map physical addresses, but XKPHYS, for we are
not limited to 512MB physmem.

boot(9): Reduce annoying style diffs

- Always use either: ((x & RB_XXX) != 0) or ((x & RB_XXX) == 0) in boolean
context (mostly if (x), or x ? y : z)
- prom_halt() in alpha is confirmed to take int as boolean

Converted by coccinelle. No functional change intended.

boot(9): Cosmetic changes to improve diff'ability.

Cosmetic changes to reduce diffs.

consistency with upcoming bootloader device parsing of the uboot arguments,
root= becomes rootdev=

print leading '0x' for addresses and masks with DUMP_BOOT_{DESC,INFO}

ok pirofti@

- fix off-by-one in getting the number of cores in the system
- unbreak GENERIC.MP build

boot(9): Undo curproc-overriding hacks

Some (not all) boot(9) implementations have ancient hacks which overrides if
(curproc == NULL). This was probably made in a hope to forcibly proceed
various clean-shutdown related code, including VFS shutdown. Let's clarify
that clean-shutdown needs process context; it is impossible to cleanly shutdown
VFS from within e.g. a panic in SPL_HIGH.

OK kettenis@

Set cold to 1 before executing the DVACT_POWERDOWN handlers when halting or
rebooting a machine, like it is done in the hibernate case.

At least some USB host controller drivers rely on this to busy way instead
of sleeping. Avoid a panic on macppc with an uhci(4) cardbus plugged in.

ok deraadt@, uebayashi@

boot(9): Remove comments about RB_*, "cold", and savectx()

Again remove slightly different comments to reduce diffs. These will be
re-added once boot() become MI and its specification is clearly re-defined.

OK miod@

boot(): Remove comments about RB_TIMEBAD to reduce diffs

RB_TIMEBAD is documented well enough that the comment is not needed. sparc64
does slightly different and its comment is left with XXX.

OK deraadt@ miod@

boot(): Unify declarations

OK deraadt@

The io clock on Octeon II (CN6xxx) runs at a different rate to the cpu clock.
Program the uarts based on the io clock rate on these platforms.

ok jasper@ pirofti@ yasuoka@

Revert previous diff setting cold to 1 on shutdown because it breaks machine
with softraid(4) disks.

softraid(4) is the last real consumer of the doshutdownhooks(9) API and it is
not trivial to convert its hook to a DVACT_POWERDOWN handler since the latter
does not allow to sleep.

Set cold to 1 before executing the DVACT_POWERDOWN handlers when halting or
rebooting a machine, like it is done in the hibernate case.

At least some USB host controller drivers rely on this to busy way instead
of sleeping. Avoid a panic on macppc with an uhci(4) cardbus plugged in.

ok deraadt@, uebayashi@

spello in comment and tweak DUMP_BOOT_DESC a tad

various format string fixes and remove -Wno-format from octeon

feedback/ok miod@

Moar <uvm/uvm.h> -> <uvm/uvm_extern.h> love.

get rid of the assumption that the head of the alldevs list is the
"mainbus" device. this breaks when mpath is enabled because it
attaches before mainbus and therefore takes the head position.

have autoconf provide device_mainbus() which looks up mainbus_cd,
and use that instead.

discussed with deraadt who just wants mpath stuff to move forward
despite there being many ways to shine this particular turd.

Rework the per-cpu cache information. Use a common struct to store the line
size, the number of sets, and the total size (and the set size, for convenience)
per cache (I$, D$, L2, L3).
This allows cpu.c to print the number of ways (sets) of L2 and L3 caches from
the cache information, rather than hardcoding this from the processor type.

In boot(), do not iterate over alldevs if it's empty (i.e. halting from ddb
with ddb entered early with boot -d or from UKC).

Fix memory initialization for octeon's with less than 256MB.

Don't substract the 256MB upperbound from realmem_bytes if the current
available memory is less than that.

Makes my DSR-500 kernel reach userland.

Okay miod@

Missed a spot in my last commit.

Have some style(9).

whitespace

move octeonreg.h to a more generic location and add multiple inclusion
guards while here.

ok uebayasi@

- remove more backward compat code and switch the callers over to the new function

ok uebayasi@

corectly initialize the number of cores/cpus on the board. this fixes a NULL
deref in cpuattach() since we advertised only a single CPU, but tried to
attach two.

with this diff bsd.mp boots up on the ERL.

discussed with pirofti@
ok miod@ pirofti@

allow octeon to find it's root device, based on the flags passed by U-Boot. The ${bootcmd}
needs to be something like 'bootoctlinux root=/dev/octcf0'.

This will be temporary untill we have proper bootblocks, but for now, this (in combination)
with an upcoming installer diff allows my CAM-0100 to autoboot straight of the disk, without
having to load the kernel via TFTP.

ok bcallah@ yasuoka@

allow GENERIC.MP to compile again...just for shits and giggles.

fix comment detailing the memory map

from syuu@

fill in cpu_model.

implement octeon_cpuspeed()

ok yasuoka@

instead of treating boot_info->cf_common_addr special, save the whole of boot_info
for future use.

ok yasuoka@

print a dump of structs boot_info/boot_desc which contain useful information
to have in the dmesg, for the time being

ok bcallah@ yasuoka@

add some board types which will be used later to identify particular boards

ok yasuoka@

save a copy of the address at which the CF bus can be found, and use this in octcf(4) for
a better probe function which doesn't unconditionally tries to attach octcf(4). this would
cause endless faults on the EdgeRouter Lite as it lacks a CF bus.

feedback and testing bcallah@ and chris@
ok yasuoka@

Allow octeon to reboot by poking the right address for a soft cpu reset.
No more yanking the powercable when I hit ddb :)

also tested by bcallah@

ok bcallah@ chris@ yasuoka@

Revamp the sequences for suspend/hibernate -> resume so that the code
paths are reflexive. It is now possible to fail part-way through a
suspend sequence, and recover along the resume code path.
Split DVACT_SUSPEND by adding a new DVACT_POWERDOWN method is used
after hibernate (and suspend too) to finish the job. Some drivers
must be converted at the same time to use this instead of shutdown hooks
(the others will follow at a later time)
ok kettenis mlarkin

Don't include <mips64/archtype.h> when you don't need it.

Split ever-growing mips <machine/cpu.h> into what 99% of the kernel needs,
which will remain in <machine/cpu.h>, and a new mips_cpu.h containing only the
goriest md details, which are only of interest to a handful set of files; this
is similar in spirit to what alpha does, but here <machine/cpu.h> does not
include the new file.

Kill the mostly unused VMTLB_xxx and VMNUM_xxx defines. Move all tlb
knowledge to <machine/pte.h>. Add specific routines for tlb handling setup
(at cpu initialization time) and tlb ASID wrap.

Forgot these files during the recent clock churning.

Remove leftover loongson or sgi references.

Move cache handling routines related definitions to a dedicated header file,
rather than abusing <machine/cpu.h>.

uncached_base was introduced early in IP27 support, since these designs use
subspaces in the CCA_NC uncached memory space. However, being coherent,
there was never a need for bus_dma to use uncached addresses.

This means that, on the only systems where uncached_base was not set to
PHYS_TO_XKPHYS(0, CCA_NC), it was never used.

Remove the variable, and replace PHYS_TO_UNCACHED() with
PHYS_TO_XKPHYS(, CCA_NC). No functional change.

if_downall() cannot be done MI in sys_reboot() because vfs_shutdown()
might need network (ie. nfs). Move the call to the MD boot() routines.
This cause for boot hangs diagnosed by kettenis.

machdep.kbdreset enables a shutdown by Ctrl-Alt-Del on amd64 and
i386. Stop abusing it on other archs for controling a shutdown by
pressing the soft power button:

* Add a MI sysctl hw.allowpowerdown; if set to 1 (the default) it
allows a power button shutdown.
* Make acpi(4)/acpibtn(4) honor hw.allowpowerdown.
* Switch the various power button intercepts on landisk, sgi, sparc64
and zaurus over to hw.allowpowerdown.
* Garbage collect the machdep.kbdreset sysctl on all archs other than
amd64 and i386.

ok miod@

Move the bufcachepercent setting code to MI locations -- set it to 42%
for now; that is unlikely to hit some of the remaining starvation bugs.
Repair the bufpages calculation too; i386 was doing it ahead of time
(incorrectly) and then re-calculating it.
ok thib

Remove the freelist member from vm_physseg

The new world order of pmemrange makes this data completely redundant
(being dealt with by the pmemrange constraints instead). Remove all code
that messes with the freelist.

While touching every caller of uvm_page_physload() anyway, add the flags
argument to all callers (all but one is 0 and that one already used
PHYSLOAD_DEVICE) and remove the macro magic to allow callers to continue
without it.

Should shrink the code a bit, as well.

matthew@ pointed out some mistakes i'd made.
``freelist death, I like. Ok.' ariane@
`I agree with the general direction, go ahead and i'll fix any fallout
shortly'' miod@ (68k 88k and vax i could not check would build)

memory handling fix

fix variable name

combus renamed uartbus, com_oct renamed cn30xxuart

obio renamed iobus, moved interrupt handler code to dev/octeon_intr.c

boot descriptor support added

passing stack pointer to secondary processors

Correct interrupt handling

Move build_trampoline() and setregs() to a common location for all mips ports.

Implemented combus to support com device on OCTEON without modifing dev/ic/com.c ok deraadt@

Remove bootinfo.c which has license issue. ok deraadt@

Initial revision

timecounting: remove incomplete PPS support

The timecounting code has had stubs for pulse-per-second (PPS) polling
since it was imported in 2004. At this point it seems unlikely that
anyone is going to finish adding PPS support, so let's remove the stubs:

- Delete the dead tc_poll_pps() call from tc_windup().
- Remove all tc_poll_pps symbols from the kernel.

Link: https://marc.info/?l=openbsd-tech&m=167519035723210&w=2

ok miod@

Enable TLB read inhibit on OCTEON Plus and newer SoCs.

OK deraadt@

Replace cpus_running with CPU_IS_RUNNING().

Remember to set CPUF_RUNNING on secondary CPUs.

Make hw_cpu_hatch() more similar on loongson and octeon.

panic does not require a \n at the end. When one is provided, it looks wrong.

Add initial bits for Check Point UTM-1 EDGE N.

From Thaison Nguyen

Handle Netgear ProSecure UTM25

This makes the system recognize and configure Netgear ProSecure UTM25.
Of the network ports, LAN1-4 and WAN1 are functional. WAN2 does not work
for some reason. Even though WAN1 has a separate link to the SoC, the
connection appears to go through the same switch that the LAN ports use.
At the moment, the system relies on U-Boot to set up the switch so that
the LAN and WAN segments stay separate.

Initial diff and input from Thaison Nguyen, thank you!

Abstract octeon board handling a little

Detect octeon board model in one place, and replace firmware-supplied
board_type with an abstract model identifier in driver code. This makes
it easier to manage with different products, and board flavours, that
happen to use the same model information, such as board_type.

Userland timecounter implementation for octeon

OK naddy@; no objections from kettenis@

Synchronize each core's CP0 cycle counter using the IO clock counter.
This makes the cycle counter usable as timecounter on multiprocessor
machines.

Idea from Linux.

Tested on CN5020, CN6120, CN7130 and CN7360.

Looks reasonable to kettenis@

Add support for timeconting in userland.

This diff exposes parts of clock_gettime(2) and gettimeofday(2) to
userland via libc eliberating processes from the need for a context
switch everytime they want to count the passage of time.

If a timecounter clock can be exposed to userland than it needs to set
its tc_user member to a non-zero value. Tested with one or multiple
counters per architecture.

The timing data is shared through a pointer found in the new ELF
auxiliary vector AUX_openbsd_timekeep containing timehands information
that is frequently updated by the kernel.

Timing differences between the last kernel update and the current time
are adjusted in userland by the tc_get_timecount() function inside the
MD usertc.c file.

This permits a much more responsive environment, quite visible in
browsers, office programs and gaming (apparently one is are able to fly
in Minecraft now).

Tested by robert@, sthen@, naddy@, kmos@, phessler@, and many others!

OK from at least kettenis@, cheloha@, naddy@, sthen@

cpu_rnd_messybits() for mips64

Use CP0 Count as a basis. Also take noise from virtual memory activity
by including BadVAddr.

OK deraadt@ dlg@

introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.

rnd.c uses nanotime to get access to some bits that change quickly
between events that it can mix into the entropy pool. it doesn't
use nanotime to get a monotonically increasing set or ordered and
accurate timestamps, it just wants something with bits that change.

there's been discussions for years about letting rnd use a clock
that's super fast to read, but not necessarily accurate, but it
wasn't until recently that i figured out it wasn't interested in
time at all, so things like keeping a fast clock coherent between
cpu cores or correct according to ntp is unecessary. this means we
can just let rnd read the cycle counters on cpus and things will
be fine. cpus with cycle counters that vary in their speed and
arent kept consistent between cores may even be desirable in this
context.

so this is the first step in converting rnd.c to reading cycle
counter. it copies the nanotime backend to each arch, and they can
replace it with something MD as a second step later on.

djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits.
thanks to visa for his eyes.
ok deraadt@ visa@
deraadt@ says he will help handle any MD fallout that occurs.

dev/rndvar.h no longer has statistical interfaces (removed during various
conversion steps). it only contains kernel prototypes for 4 interfaces,
all of which legitimately belong in sys/systm.h, which are already included
by all enqueue_randomness() users.

Pass boothowto from the bootloader to the kernel on octeon.

OK deraadt@

Mix board information into the entropy pool.

The data are static but they introduce differences between systems.

OK deraadt@

Convert various boolean_t/TRUE/FALSE to int/1/0 in mips64 memory code.

OK mpi@

rename the 'cn30xx' drivers to just 'oct', because digits inside devices
drivers is gross. discussed with visa.

Fix kmem access on octeon. Currently, mem_layout lists segments that
were free after the kernel was loaded. The memory occupied by the kernel
image is not included. To let libkvm access the image through /dev/kmem,
return true from is_memory_range() if the physical address is within
the kernel.

Adjust search of symbol table pointers to match with the bootloader.

Add a bootloader for octeon.

The firmware on OCTEON machines usually does not provide an interface
for accessing devices, which has made it tricky to implement an OpenBSD
bootloader. To solve this device access problem, this new loader has
been built on top of a small kernel. The kernel provides all the
necessary devices drivers, while most of the usual bootloader logic
is in a userspace program in a ramdisk.

The loader program is accompanied by a special device, octboot(4).
The main purpose of this device is to implement a mechanism for
loading and launching kernels. The mechanism has been inspired by Linux'
kexec(2) system call.

The bootloader will be enabled later when it is ready for general use.

Discussed with deraadt@

Remove unnecessary extern declarations.

Make rootdev parsing a little saner. The "rootdev=" prefix can be
removed already in process_bootargs(). Pass the value as a parameter
to parse_uboot_root(). Set uboot_rootdev only if parsing succeeds.

Fix misleading code. The kernel keeps using the original boot
descriptors even after bootstrap.

Add parsing for standard boot options.

Use the .bss for the bootstrap stack of mips_init(). This way the memory
region is properly allocated by the firmware.

Move the .bss clearing to locore.S because the section has to be ready
when the stack is taken into use. This additionally makes the
C environment more consistent at the start of mips_init().

fast track ddb> reboot command to skip anything which might panic again.
ok deraadt

Figure out the number of available CPUs using system fuse registers.
This makes `ncpusfound' independent of kernel boot parameters.

The kernel still needs the help of the firmware to spin up secondary
CPUs, so the `coremask' or `numcores' boot parameter is still needed
for multicore operation.

Tested on CN5020, CN6120, CN7130 and CN7360.

Add processor IDs for several OCTEON II and III SoCs.

Make octeon kernels compile with DEBUG.

Based on a diff from jj@. Thank you!

Add a driver for the OCTEON cryptographic unit. It provides
a hardware-accelerated implementation of several encryption
and authentication algorithms for ipsec(4):

AES-CBC
AES-CTR
AES-GCM
AES-GMAC
HMAC-MD5
HMAC-SHA1
HMAC-SHA2-256
HMAC-SHA2-384
HMAC-SHA2-512

Please note that the driver is currently disabled.

OK deraadt@

Fix the computation of `ncpusfound' on !MULTIPROCESSOR kernels so that
the value matches with the number of cores that GENERIC.MP uses.

OK deraadt@, krw@, pirofti@

Delete unnecessary <sys/file.h> includes

ok millert@ krw@

In uvm Chuck decided backing store would not be allocated proactively
for blocks re-fetchable from the filesystem. However at reboot time,
filesystems are unmounted, and since processes lack backing store they
are killed. Since the scheduler is still running, in some cases init is
killed... which drops us to ddb [noted by bluhm]. Solution is to convert
filesystems to read-only [proposed by kettenis]. The tale follows:
sys_reboot() should pass proc * to MD boot() to vfs_shutdown() which
completes current IO with vfs_busy VB_WRITE|VB_WAIT, then calls VFS_MOUNT()
with MNT_UPDATE | MNT_RDONLY, soon teaching us that *fs_mount() calls a
copyin() late... so store the sizes in vfsconflist[] and move the copyin()
to sys_mount()... and notice nfs_mount copyin() is size-variant, so kill
legacy struct nfs_args3. Next we learn ffs_mount()'s MNT_UPDATE code is
sharp and rusty especially wrt softdep, so fix some bugs adn add
~MNT_SOFTDEP to the downgrade. Some vnodes need a little more help,
so tie them to &dead_vnops.

ffs_mount calling DIOCCACHESYNC is causing a bit of grief still but
this issue is seperate and will be dealt with in time.
couple hundred reboots by bluhm and myself, advice from guenther and
others at the hut

Add readiness to utilize LMTDMA operations.

Do not print "cpuX launched" any longer. This reduces dmesg spam
on multicore systems.

Let the kernel utilize the FPU if one is available, even when the
FPUEMUL option is enabled. This benefits OCTEON III systems which can
run floating-point operations natively.

Feedback from and OK miod@; he also helped with testing.

Tested on octeon without FPU (CN5020, CN6120) and with FPU (CN7130),
as well as on sgi/IP27 (MP R16000), sgi/IP32 (R5000), and
loongson (3A1000).

Use macros for Config1 bits.

Replace OCTEON_MAXCPUS with MAXCPUS to avoid redundancy.

Attach com(4) using fdt on octeon.

The relevant part of uartbus(4) is made part of the com(4) glue
to avoid extra maneuvers in the code.

Fix the timecounter register on CN72xx/CN73xx.

Use octeon_model_family() for SoC identification as in the rest
of the code.

Use type register_t instead of __register_t. Drop unneeded __unused.

Move IPI control entry points into octeon_intr.c.
Needed by upcoming driver changes.

Drop unnecessary call to octeon_setintrmask(). The function gets called
by the splx() handler.

Fix TLB size computation on OCTEON II and III. The CPUs have utilized
the whole TLB space even before this. However, TLB initialization on
boot and TLB flush on ASID wraparound have been incomplete. These have
caused crashes of processes.

Add a memory barrier to ensure that stores become visible
in a proper order.

Rename Debugger() into db_enter().

Using a name with the 'db_' prefix makes it invisible from the dynamic
profiler.

ok deraadt@, kettenis@, visa@

Add an fdt blob for octeon systems whose firmware does not provide
a device-tree. It will be needed later when more device drivers
are attached using fdt.

OK kettenis@

Make TCB address available to userspace via the UserLocal register.
This lets programs get the address without a system call on OCTEON II
and later.

Add UserLocal load emulation for systems that do not implement
the RDHWR instruction or the UserLocal register.

OK guenther@

Add prid for CN72xx/CN73xx.

Make SoC version available in a simple form.

printf format strings should be literals. Reminded by clang.

Ansify cpu_sysctl() on mips64 platforms.

OK patrick@, visa@, jasper@, mpi@

Fix IO clock speed and system reset on Octeon III.

On some systems, the firmware advertises multiple tiny and disjoint
regions of free memory whose size is no more than a few page frames.
Ignore them in order not to clutter uvm with fragments.

Start process_bootargs at 0 instead of 1.
When using endbootargs in U-Boot arguments start at position 0.

OK visa@

Revert previous `ncpus' change because the percpu code now works
without it.

Increment `ncpus' to its final value already during autoconfiguration so
that percpu data areas get allocated properly on mips64 platforms. It is
too late to set the value during launch of secondary CPUs.

ok jasper@ kettenis@ dlg@

Apply consistency to forever loops with continue and NOTREACHED

Same thought from kettenis@, ok krw@ phessler@ millert@

Utilize the TLB Execute-Inhibit bit with non-executable mappings on CPUs
that support the Execute-Inhibit exception. This makes user space W^X
effective on Octeon Plus and later Octeon versions.

Feedback from miod@, thanks!
No objection from deraadt@

Add fdt init for octeon.

On Octeon systems, U-Boot provides a list of usable memory regions. Use
the list instead of hardcoded regions in memory setup. Works on
EdgeRouter Lite, EdgeRouter Pro, Lanner MR326b and Movidis 16x.

Tested by jj@
Tested by and ok jmatthew@

Rename mips64's trap_frame into trapframe.

For coherency with other archs and in order to use it in MI code.

ok visa@, tobiasu@

Panic if someone boots the kernel by force without CPU 0. The system
will not work without that core.

Enable the DR1 region even with 32-bit page table entries. Those have
enough bits for addressing the region.

Clean up octeon memory region setup.

Diff by miod@ during c2k15
Tested by jbg@, jasper@, pirofti@
OK jasper@, pirofti@

Use the IPD Clock Count register as a timecounter, making the clock
tick in Octeon MP land.

ok pirofti@, miod@, uebayasi@

Register the IPI handler early enough for the correct idle_mask to
propagate to all threads. Otherwise early-started kernel threads run
IPIs disabled, which will lead to a deadlock soon after other cores
have started.

ok miod@ pirofti@

Ditch the octeon simulator non-sense.

Discussed with miod@.

Refix memory handling for machines with less than 256M broken by revision 1.64.

Allows my DSR-500 to boot again.

Okay miod@.

Re-enable memory above 256mb now that uvm_pmr_get1page() has been fixed.
From Visa Hankala.

retire shutdown hooks; ok deraadt, krw

Use config_suspend_all(9).

ok mpi@, uebayasi@, dlg@

Do not use CKSEG0 to quickly map physical addresses, but XKPHYS, for we are
not limited to 512MB physmem.

boot(9): Reduce annoying style diffs

- Always use either: ((x & RB_XXX) != 0) or ((x & RB_XXX) == 0) in boolean
context (mostly if (x), or x ? y : z)
- prom_halt() in alpha is confirmed to take int as boolean

Converted by coccinelle. No functional change intended.

boot(9): Cosmetic changes to improve diff'ability.

Cosmetic changes to reduce diffs.

consistency with upcoming bootloader device parsing of the uboot arguments,
root= becomes rootdev=

print leading '0x' for addresses and masks with DUMP_BOOT_{DESC,INFO}

ok pirofti@

- fix off-by-one in getting the number of cores in the system
- unbreak GENERIC.MP build

boot(9): Undo curproc-overriding hacks

Some (not all) boot(9) implementations have ancient hacks which overrides if
(curproc == NULL). This was probably made in a hope to forcibly proceed
various clean-shutdown related code, including VFS shutdown. Let's clarify
that clean-shutdown needs process context; it is impossible to cleanly shutdown
VFS from within e.g. a panic in SPL_HIGH.

OK kettenis@

Set cold to 1 before executing the DVACT_POWERDOWN handlers when halting or
rebooting a machine, like it is done in the hibernate case.

At least some USB host controller drivers rely on this to busy way instead
of sleeping. Avoid a panic on macppc with an uhci(4) cardbus plugged in.

ok deraadt@, uebayashi@

boot(9): Remove comments about RB_*, "cold", and savectx()

Again remove slightly different comments to reduce diffs. These will be
re-added once boot() become MI and its specification is clearly re-defined.

OK miod@

boot(): Remove comments about RB_TIMEBAD to reduce diffs

RB_TIMEBAD is documented well enough that the comment is not needed. sparc64
does slightly different and its comment is left with XXX.

OK deraadt@ miod@

boot(): Unify declarations

OK deraadt@

The io clock on Octeon II (CN6xxx) runs at a different rate to the cpu clock.
Program the uarts based on the io clock rate on these platforms.

ok jasper@ pirofti@ yasuoka@

Revert previous diff setting cold to 1 on shutdown because it breaks machine
with softraid(4) disks.

softraid(4) is the last real consumer of the doshutdownhooks(9) API and it is
not trivial to convert its hook to a DVACT_POWERDOWN handler since the latter
does not allow to sleep.

Set cold to 1 before executing the DVACT_POWERDOWN handlers when halting or
rebooting a machine, like it is done in the hibernate case.

At least some USB host controller drivers rely on this to busy way instead
of sleeping. Avoid a panic on macppc with an uhci(4) cardbus plugged in.

ok deraadt@, uebayashi@

spello in comment and tweak DUMP_BOOT_DESC a tad

various format string fixes and remove -Wno-format from octeon

feedback/ok miod@

Moar <uvm/uvm.h> -> <uvm/uvm_extern.h> love.

get rid of the assumption that the head of the alldevs list is the
"mainbus" device. this breaks when mpath is enabled because it
attaches before mainbus and therefore takes the head position.

have autoconf provide device_mainbus() which looks up mainbus_cd,
and use that instead.

discussed with deraadt who just wants mpath stuff to move forward
despite there being many ways to shine this particular turd.

Rework the per-cpu cache information. Use a common struct to store the line
size, the number of sets, and the total size (and the set size, for convenience)
per cache (I$, D$, L2, L3).
This allows cpu.c to print the number of ways (sets) of L2 and L3 caches from
the cache information, rather than hardcoding this from the processor type.

In boot(), do not iterate over alldevs if it's empty (i.e. halting from ddb
with ddb entered early with boot -d or from UKC).

Fix memory initialization for octeon's with less than 256MB.

Don't substract the 256MB upperbound from realmem_bytes if the current
available memory is less than that.

Makes my DSR-500 kernel reach userland.

Okay miod@

Missed a spot in my last commit.

Have some style(9).

whitespace

move octeonreg.h to a more generic location and add multiple inclusion
guards while here.

ok uebayasi@

- remove more backward compat code and switch the callers over to the new function

ok uebayasi@

corectly initialize the number of cores/cpus on the board. this fixes a NULL
deref in cpuattach() since we advertised only a single CPU, but tried to
attach two.

with this diff bsd.mp boots up on the ERL.

discussed with pirofti@
ok miod@ pirofti@

allow octeon to find it's root device, based on the flags passed by U-Boot. The ${bootcmd}
needs to be something like 'bootoctlinux root=/dev/octcf0'.

This will be temporary untill we have proper bootblocks, but for now, this (in combination)
with an upcoming installer diff allows my CAM-0100 to autoboot straight of the disk, without
having to load the kernel via TFTP.

ok bcallah@ yasuoka@

allow GENERIC.MP to compile again...just for shits and giggles.

fix comment detailing the memory map

from syuu@

fill in cpu_model.

implement octeon_cpuspeed()

ok yasuoka@

instead of treating boot_info->cf_common_addr special, save the whole of boot_info
for future use.

ok yasuoka@

print a dump of structs boot_info/boot_desc which contain useful information
to have in the dmesg, for the time being

ok bcallah@ yasuoka@

add some board types which will be used later to identify particular boards

ok yasuoka@

save a copy of the address at which the CF bus can be found, and use this in octcf(4) for
a better probe function which doesn't unconditionally tries to attach octcf(4). this would
cause endless faults on the EdgeRouter Lite as it lacks a CF bus.

feedback and testing bcallah@ and chris@
ok yasuoka@

Allow octeon to reboot by poking the right address for a soft cpu reset.
No more yanking the powercable when I hit ddb :)

also tested by bcallah@

ok bcallah@ chris@ yasuoka@

Revamp the sequences for suspend/hibernate -> resume so that the code
paths are reflexive. It is now possible to fail part-way through a
suspend sequence, and recover along the resume code path.
Split DVACT_SUSPEND by adding a new DVACT_POWERDOWN method is used
after hibernate (and suspend too) to finish the job. Some drivers
must be converted at the same time to use this instead of shutdown hooks
(the others will follow at a later time)
ok kettenis mlarkin

Don't include <mips64/archtype.h> when you don't need it.

Split ever-growing mips <machine/cpu.h> into what 99% of the kernel needs,
which will remain in <machine/cpu.h>, and a new mips_cpu.h containing only the
goriest md details, which are only of interest to a handful set of files; this
is similar in spirit to what alpha does, but here <machine/cpu.h> does not
include the new file.

Kill the mostly unused VMTLB_xxx and VMNUM_xxx defines. Move all tlb
knowledge to <machine/pte.h>. Add specific routines for tlb handling setup
(at cpu initialization time) and tlb ASID wrap.

Forgot these files during the recent clock churning.

Remove leftover loongson or sgi references.

Move cache handling routines related definitions to a dedicated header file,
rather than abusing <machine/cpu.h>.

uncached_base was introduced early in IP27 support, since these designs use
subspaces in the CCA_NC uncached memory space. However, being coherent,
there was never a need for bus_dma to use uncached addresses.

This means that, on the only systems where uncached_base was not set to
PHYS_TO_XKPHYS(0, CCA_NC), it was never used.

Remove the variable, and replace PHYS_TO_UNCACHED() with
PHYS_TO_XKPHYS(, CCA_NC). No functional change.

if_downall() cannot be done MI in sys_reboot() because vfs_shutdown()
might need network (ie. nfs). Move the call to the MD boot() routines.
This cause for boot hangs diagnosed by kettenis.

machdep.kbdreset enables a shutdown by Ctrl-Alt-Del on amd64 and
i386. Stop abusing it on other archs for controling a shutdown by
pressing the soft power button:

* Add a MI sysctl hw.allowpowerdown; if set to 1 (the default) it
allows a power button shutdown.
* Make acpi(4)/acpibtn(4) honor hw.allowpowerdown.
* Switch the various power button intercepts on landisk, sgi, sparc64
and zaurus over to hw.allowpowerdown.
* Garbage collect the machdep.kbdreset sysctl on all archs other than
amd64 and i386.

ok miod@

Move the bufcachepercent setting code to MI locations -- set it to 42%
for now; that is unlikely to hit some of the remaining starvation bugs.
Repair the bufpages calculation too; i386 was doing it ahead of time
(incorrectly) and then re-calculating it.
ok thib

Remove the freelist member from vm_physseg

The new world order of pmemrange makes this data completely redundant
(being dealt with by the pmemrange constraints instead). Remove all code
that messes with the freelist.

While touching every caller of uvm_page_physload() anyway, add the flags
argument to all callers (all but one is 0 and that one already used
PHYSLOAD_DEVICE) and remove the macro magic to allow callers to continue
without it.

Should shrink the code a bit, as well.

matthew@ pointed out some mistakes i'd made.
``freelist death, I like. Ok.' ariane@
`I agree with the general direction, go ahead and i'll fix any fallout
shortly'' miod@ (68k 88k and vax i could not check would build)

memory handling fix

fix variable name

combus renamed uartbus, com_oct renamed cn30xxuart

obio renamed iobus, moved interrupt handler code to dev/octeon_intr.c

boot descriptor support added

passing stack pointer to secondary processors

Correct interrupt handling

Move build_trampoline() and setregs() to a common location for all mips ports.

Implemented combus to support com device on OCTEON without modifing dev/ic/com.c ok deraadt@

Remove bootinfo.c which has license issue. ok deraadt@

Initial revision

Enable TLB read inhibit on OCTEON Plus and newer SoCs.

OK deraadt@

Replace cpus_running with CPU_IS_RUNNING().

Remember to set CPUF_RUNNING on secondary CPUs.

Make hw_cpu_hatch() more similar on loongson and octeon.

panic does not require a \n at the end. When one is provided, it looks wrong.

Add initial bits for Check Point UTM-1 EDGE N.

From Thaison Nguyen

Handle Netgear ProSecure UTM25

This makes the system recognize and configure Netgear ProSecure UTM25.
Of the network ports, LAN1-4 and WAN1 are functional. WAN2 does not work
for some reason. Even though WAN1 has a separate link to the SoC, the
connection appears to go through the same switch that the LAN ports use.
At the moment, the system relies on U-Boot to set up the switch so that
the LAN and WAN segments stay separate.

Initial diff and input from Thaison Nguyen, thank you!

Abstract octeon board handling a little

Detect octeon board model in one place, and replace firmware-supplied
board_type with an abstract model identifier in driver code. This makes
it easier to manage with different products, and board flavours, that
happen to use the same model information, such as board_type.

Userland timecounter implementation for octeon

OK naddy@; no objections from kettenis@

Synchronize each core's CP0 cycle counter using the IO clock counter.
This makes the cycle counter usable as timecounter on multiprocessor
machines.

Idea from Linux.

Tested on CN5020, CN6120, CN7130 and CN7360.

Looks reasonable to kettenis@

Add support for timeconting in userland.

This diff exposes parts of clock_gettime(2) and gettimeofday(2) to
userland via libc eliberating processes from the need for a context
switch everytime they want to count the passage of time.

If a timecounter clock can be exposed to userland than it needs to set
its tc_user member to a non-zero value. Tested with one or multiple
counters per architecture.

The timing data is shared through a pointer found in the new ELF
auxiliary vector AUX_openbsd_timekeep containing timehands information
that is frequently updated by the kernel.

Timing differences between the last kernel update and the current time
are adjusted in userland by the tc_get_timecount() function inside the
MD usertc.c file.

This permits a much more responsive environment, quite visible in
browsers, office programs and gaming (apparently one is are able to fly
in Minecraft now).

Tested by robert@, sthen@, naddy@, kmos@, phessler@, and many others!

OK from at least kettenis@, cheloha@, naddy@, sthen@

cpu_rnd_messybits() for mips64

Use CP0 Count as a basis. Also take noise from virtual memory activity
by including BadVAddr.

OK deraadt@ dlg@

introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.

rnd.c uses nanotime to get access to some bits that change quickly
between events that it can mix into the entropy pool. it doesn't
use nanotime to get a monotonically increasing set or ordered and
accurate timestamps, it just wants something with bits that change.

there's been discussions for years about letting rnd use a clock
that's super fast to read, but not necessarily accurate, but it
wasn't until recently that i figured out it wasn't interested in
time at all, so things like keeping a fast clock coherent between
cpu cores or correct according to ntp is unecessary. this means we
can just let rnd read the cycle counters on cpus and things will
be fine. cpus with cycle counters that vary in their speed and
arent kept consistent between cores may even be desirable in this
context.

so this is the first step in converting rnd.c to reading cycle
counter. it copies the nanotime backend to each arch, and they can
replace it with something MD as a second step later on.

djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits.
thanks to visa for his eyes.
ok deraadt@ visa@
deraadt@ says he will help handle any MD fallout that occurs.

dev/rndvar.h no longer has statistical interfaces (removed during various
conversion steps). it only contains kernel prototypes for 4 interfaces,
all of which legitimately belong in sys/systm.h, which are already included
by all enqueue_randomness() users.

Pass boothowto from the bootloader to the kernel on octeon.

OK deraadt@

Mix board information into the entropy pool.

The data are static but they introduce differences between systems.

OK deraadt@

Convert various boolean_t/TRUE/FALSE to int/1/0 in mips64 memory code.

OK mpi@

rename the 'cn30xx' drivers to just 'oct', because digits inside devices
drivers is gross. discussed with visa.

Fix kmem access on octeon. Currently, mem_layout lists segments that
were free after the kernel was loaded. The memory occupied by the kernel
image is not included. To let libkvm access the image through /dev/kmem,
return true from is_memory_range() if the physical address is within
the kernel.

Adjust search of symbol table pointers to match with the bootloader.

Add a bootloader for octeon.

The firmware on OCTEON machines usually does not provide an interface
for accessing devices, which has made it tricky to implement an OpenBSD
bootloader. To solve this device access problem, this new loader has
been built on top of a small kernel. The kernel provides all the
necessary devices drivers, while most of the usual bootloader logic
is in a userspace program in a ramdisk.

The loader program is accompanied by a special device, octboot(4).
The main purpose of this device is to implement a mechanism for
loading and launching kernels. The mechanism has been inspired by Linux'
kexec(2) system call.

The bootloader will be enabled later when it is ready for general use.

Discussed with deraadt@

Remove unnecessary extern declarations.

Make rootdev parsing a little saner. The "rootdev=" prefix can be
removed already in process_bootargs(). Pass the value as a parameter
to parse_uboot_root(). Set uboot_rootdev only if parsing succeeds.

Fix misleading code. The kernel keeps using the original boot
descriptors even after bootstrap.

Add parsing for standard boot options.

Use the .bss for the bootstrap stack of mips_init(). This way the memory
region is properly allocated by the firmware.

Move the .bss clearing to locore.S because the section has to be ready
when the stack is taken into use. This additionally makes the
C environment more consistent at the start of mips_init().

fast track ddb> reboot command to skip anything which might panic again.
ok deraadt

Figure out the number of available CPUs using system fuse registers.
This makes `ncpusfound' independent of kernel boot parameters.

The kernel still needs the help of the firmware to spin up secondary
CPUs, so the `coremask' or `numcores' boot parameter is still needed
for multicore operation.

Tested on CN5020, CN6120, CN7130 and CN7360.

Add processor IDs for several OCTEON II and III SoCs.

Make octeon kernels compile with DEBUG.

Based on a diff from jj@. Thank you!

Add a driver for the OCTEON cryptographic unit. It provides
a hardware-accelerated implementation of several encryption
and authentication algorithms for ipsec(4):

AES-CBC
AES-CTR
AES-GCM
AES-GMAC
HMAC-MD5
HMAC-SHA1
HMAC-SHA2-256
HMAC-SHA2-384
HMAC-SHA2-512

Please note that the driver is currently disabled.

OK deraadt@

Fix the computation of `ncpusfound' on !MULTIPROCESSOR kernels so that
the value matches with the number of cores that GENERIC.MP uses.

OK deraadt@, krw@, pirofti@

Delete unnecessary <sys/file.h> includes

ok millert@ krw@

In uvm Chuck decided backing store would not be allocated proactively
for blocks re-fetchable from the filesystem. However at reboot time,
filesystems are unmounted, and since processes lack backing store they
are killed. Since the scheduler is still running, in some cases init is
killed... which drops us to ddb [noted by bluhm]. Solution is to convert
filesystems to read-only [proposed by kettenis]. The tale follows:
sys_reboot() should pass proc * to MD boot() to vfs_shutdown() which
completes current IO with vfs_busy VB_WRITE|VB_WAIT, then calls VFS_MOUNT()
with MNT_UPDATE | MNT_RDONLY, soon teaching us that *fs_mount() calls a
copyin() late... so store the sizes in vfsconflist[] and move the copyin()
to sys_mount()... and notice nfs_mount copyin() is size-variant, so kill
legacy struct nfs_args3. Next we learn ffs_mount()'s MNT_UPDATE code is
sharp and rusty especially wrt softdep, so fix some bugs adn add
~MNT_SOFTDEP to the downgrade. Some vnodes need a little more help,
so tie them to &dead_vnops.

ffs_mount calling DIOCCACHESYNC is causing a bit of grief still but
this issue is seperate and will be dealt with in time.
couple hundred reboots by bluhm and myself, advice from guenther and
others at the hut

Add readiness to utilize LMTDMA operations.

Do not print "cpuX launched" any longer. This reduces dmesg spam
on multicore systems.

Let the kernel utilize the FPU if one is available, even when the
FPUEMUL option is enabled. This benefits OCTEON III systems which can
run floating-point operations natively.

Feedback from and OK miod@; he also helped with testing.

Tested on octeon without FPU (CN5020, CN6120) and with FPU (CN7130),
as well as on sgi/IP27 (MP R16000), sgi/IP32 (R5000), and
loongson (3A1000).

Use macros for Config1 bits.

Replace OCTEON_MAXCPUS with MAXCPUS to avoid redundancy.

Attach com(4) using fdt on octeon.

The relevant part of uartbus(4) is made part of the com(4) glue
to avoid extra maneuvers in the code.

Fix the timecounter register on CN72xx/CN73xx.

Use octeon_model_family() for SoC identification as in the rest
of the code.

Use type register_t instead of __register_t. Drop unneeded __unused.

Move IPI control entry points into octeon_intr.c.
Needed by upcoming driver changes.

Drop unnecessary call to octeon_setintrmask(). The function gets called
by the splx() handler.

Fix TLB size computation on OCTEON II and III. The CPUs have utilized
the whole TLB space even before this. However, TLB initialization on
boot and TLB flush on ASID wraparound have been incomplete. These have
caused crashes of processes.

Add a memory barrier to ensure that stores become visible
in a proper order.

Rename Debugger() into db_enter().

Using a name with the 'db_' prefix makes it invisible from the dynamic
profiler.

ok deraadt@, kettenis@, visa@

Add an fdt blob for octeon systems whose firmware does not provide
a device-tree. It will be needed later when more device drivers
are attached using fdt.

OK kettenis@

Make TCB address available to userspace via the UserLocal register.
This lets programs get the address without a system call on OCTEON II
and later.

Add UserLocal load emulation for systems that do not implement
the RDHWR instruction or the UserLocal register.

OK guenther@

Add prid for CN72xx/CN73xx.

Make SoC version available in a simple form.

printf format strings should be literals. Reminded by clang.

Ansify cpu_sysctl() on mips64 platforms.

OK patrick@, visa@, jasper@, mpi@

Fix IO clock speed and system reset on Octeon III.

On some systems, the firmware advertises multiple tiny and disjoint
regions of free memory whose size is no more than a few page frames.
Ignore them in order not to clutter uvm with fragments.

Start process_bootargs at 0 instead of 1.
When using endbootargs in U-Boot arguments start at position 0.

OK visa@

Revert previous `ncpus' change because the percpu code now works
without it.

Increment `ncpus' to its final value already during autoconfiguration so
that percpu data areas get allocated properly on mips64 platforms. It is
too late to set the value during launch of secondary CPUs.

ok jasper@ kettenis@ dlg@

Apply consistency to forever loops with continue and NOTREACHED

Same thought from kettenis@, ok krw@ phessler@ millert@

Utilize the TLB Execute-Inhibit bit with non-executable mappings on CPUs
that support the Execute-Inhibit exception. This makes user space W^X
effective on Octeon Plus and later Octeon versions.

Feedback from miod@, thanks!
No objection from deraadt@

Add fdt init for octeon.

On Octeon systems, U-Boot provides a list of usable memory regions. Use
the list instead of hardcoded regions in memory setup. Works on
EdgeRouter Lite, EdgeRouter Pro, Lanner MR326b and Movidis 16x.

Tested by jj@
Tested by and ok jmatthew@

Rename mips64's trap_frame into trapframe.

For coherency with other archs and in order to use it in MI code.

ok visa@, tobiasu@

Panic if someone boots the kernel by force without CPU 0. The system
will not work without that core.

Enable the DR1 region even with 32-bit page table entries. Those have
enough bits for addressing the region.

Clean up octeon memory region setup.

Diff by miod@ during c2k15
Tested by jbg@, jasper@, pirofti@
OK jasper@, pirofti@

Use the IPD Clock Count register as a timecounter, making the clock
tick in Octeon MP land.

ok pirofti@, miod@, uebayasi@

Register the IPI handler early enough for the correct idle_mask to
propagate to all threads. Otherwise early-started kernel threads run
IPIs disabled, which will lead to a deadlock soon after other cores
have started.

ok miod@ pirofti@

Ditch the octeon simulator non-sense.

Discussed with miod@.

Refix memory handling for machines with less than 256M broken by revision 1.64.

Allows my DSR-500 to boot again.

Okay miod@.

Re-enable memory above 256mb now that uvm_pmr_get1page() has been fixed.
From Visa Hankala.

retire shutdown hooks; ok deraadt, krw

Use config_suspend_all(9).

ok mpi@, uebayasi@, dlg@

Do not use CKSEG0 to quickly map physical addresses, but XKPHYS, for we are
not limited to 512MB physmem.

boot(9): Reduce annoying style diffs

- Always use either: ((x & RB_XXX) != 0) or ((x & RB_XXX) == 0) in boolean
context (mostly if (x), or x ? y : z)
- prom_halt() in alpha is confirmed to take int as boolean

Converted by coccinelle. No functional change intended.

boot(9): Cosmetic changes to improve diff'ability.

Cosmetic changes to reduce diffs.

consistency with upcoming bootloader device parsing of the uboot arguments,
root= becomes rootdev=

print leading '0x' for addresses and masks with DUMP_BOOT_{DESC,INFO}

ok pirofti@

- fix off-by-one in getting the number of cores in the system
- unbreak GENERIC.MP build

boot(9): Undo curproc-overriding hacks

Some (not all) boot(9) implementations have ancient hacks which overrides if
(curproc == NULL). This was probably made in a hope to forcibly proceed
various clean-shutdown related code, including VFS shutdown. Let's clarify
that clean-shutdown needs process context; it is impossible to cleanly shutdown
VFS from within e.g. a panic in SPL_HIGH.

OK kettenis@

Set cold to 1 before executing the DVACT_POWERDOWN handlers when halting or
rebooting a machine, like it is done in the hibernate case.

At least some USB host controller drivers rely on this to busy way instead
of sleeping. Avoid a panic on macppc with an uhci(4) cardbus plugged in.

ok deraadt@, uebayashi@

boot(9): Remove comments about RB_*, "cold", and savectx()

Again remove slightly different comments to reduce diffs. These will be
re-added once boot() become MI and its specification is clearly re-defined.

OK miod@

boot(): Remove comments about RB_TIMEBAD to reduce diffs

RB_TIMEBAD is documented well enough that the comment is not needed. sparc64
does slightly different and its comment is left with XXX.

OK deraadt@ miod@

boot(): Unify declarations

OK deraadt@

The io clock on Octeon II (CN6xxx) runs at a different rate to the cpu clock.
Program the uarts based on the io clock rate on these platforms.

ok jasper@ pirofti@ yasuoka@

Revert previous diff setting cold to 1 on shutdown because it breaks machine
with softraid(4) disks.

softraid(4) is the last real consumer of the doshutdownhooks(9) API and it is
not trivial to convert its hook to a DVACT_POWERDOWN handler since the latter
does not allow to sleep.

Set cold to 1 before executing the DVACT_POWERDOWN handlers when halting or
rebooting a machine, like it is done in the hibernate case.

At least some USB host controller drivers rely on this to busy way instead
of sleeping. Avoid a panic on macppc with an uhci(4) cardbus plugged in.

ok deraadt@, uebayashi@

spello in comment and tweak DUMP_BOOT_DESC a tad

various format string fixes and remove -Wno-format from octeon

feedback/ok miod@

Moar <uvm/uvm.h> -> <uvm/uvm_extern.h> love.

get rid of the assumption that the head of the alldevs list is the
"mainbus" device. this breaks when mpath is enabled because it
attaches before mainbus and therefore takes the head position.

have autoconf provide device_mainbus() which looks up mainbus_cd,
and use that instead.

discussed with deraadt who just wants mpath stuff to move forward
despite there being many ways to shine this particular turd.

Rework the per-cpu cache information. Use a common struct to store the line
size, the number of sets, and the total size (and the set size, for convenience)
per cache (I$, D$, L2, L3).
This allows cpu.c to print the number of ways (sets) of L2 and L3 caches from
the cache information, rather than hardcoding this from the processor type.

In boot(), do not iterate over alldevs if it's empty (i.e. halting from ddb
with ddb entered early with boot -d or from UKC).

Fix memory initialization for octeon's with less than 256MB.

Don't substract the 256MB upperbound from realmem_bytes if the current
available memory is less than that.

Makes my DSR-500 kernel reach userland.

Okay miod@

Missed a spot in my last commit.

Have some style(9).

whitespace

move octeonreg.h to a more generic location and add multiple inclusion
guards while here.

ok uebayasi@

- remove more backward compat code and switch the callers over to the new function

ok uebayasi@

corectly initialize the number of cores/cpus on the board. this fixes a NULL
deref in cpuattach() since we advertised only a single CPU, but tried to
attach two.

with this diff bsd.mp boots up on the ERL.

discussed with pirofti@
ok miod@ pirofti@

allow octeon to find it's root device, based on the flags passed by U-Boot. The ${bootcmd}
needs to be something like 'bootoctlinux root=/dev/octcf0'.

This will be temporary untill we have proper bootblocks, but for now, this (in combination)
with an upcoming installer diff allows my CAM-0100 to autoboot straight of the disk, without
having to load the kernel via TFTP.

ok bcallah@ yasuoka@

allow GENERIC.MP to compile again...just for shits and giggles.

fix comment detailing the memory map

from syuu@

fill in cpu_model.

implement octeon_cpuspeed()

ok yasuoka@

instead of treating boot_info->cf_common_addr special, save the whole of boot_info
for future use.

ok yasuoka@

print a dump of structs boot_info/boot_desc which contain useful information
to have in the dmesg, for the time being

ok bcallah@ yasuoka@

add some board types which will be used later to identify particular boards

ok yasuoka@

save a copy of the address at which the CF bus can be found, and use this in octcf(4) for
a better probe function which doesn't unconditionally tries to attach octcf(4). this would
cause endless faults on the EdgeRouter Lite as it lacks a CF bus.

feedback and testing bcallah@ and chris@
ok yasuoka@

Allow octeon to reboot by poking the right address for a soft cpu reset.
No more yanking the powercable when I hit ddb :)

also tested by bcallah@

ok bcallah@ chris@ yasuoka@

Revamp the sequences for suspend/hibernate -> resume so that the code
paths are reflexive. It is now possible to fail part-way through a
suspend sequence, and recover along the resume code path.
Split DVACT_SUSPEND by adding a new DVACT_POWERDOWN method is used
after hibernate (and suspend too) to finish the job. Some drivers
must be converted at the same time to use this instead of shutdown hooks
(the others will follow at a later time)
ok kettenis mlarkin

Don't include <mips64/archtype.h> when you don't need it.

Split ever-growing mips <machine/cpu.h> into what 99% of the kernel needs,
which will remain in <machine/cpu.h>, and a new mips_cpu.h containing only the
goriest md details, which are only of interest to a handful set of files; this
is similar in spirit to what alpha does, but here <machine/cpu.h> does not
include the new file.

Kill the mostly unused VMTLB_xxx and VMNUM_xxx defines. Move all tlb
knowledge to <machine/pte.h>. Add specific routines for tlb handling setup
(at cpu initialization time) and tlb ASID wrap.

Forgot these files during the recent clock churning.

Remove leftover loongson or sgi references.

Move cache handling routines related definitions to a dedicated header file,
rather than abusing <machine/cpu.h>.

uncached_base was introduced early in IP27 support, since these designs use
subspaces in the CCA_NC uncached memory space. However, being coherent,
there was never a need for bus_dma to use uncached addresses.

This means that, on the only systems where uncached_base was not set to
PHYS_TO_XKPHYS(0, CCA_NC), it was never used.

Remove the variable, and replace PHYS_TO_UNCACHED() with
PHYS_TO_XKPHYS(, CCA_NC). No functional change.

if_downall() cannot be done MI in sys_reboot() because vfs_shutdown()
might need network (ie. nfs). Move the call to the MD boot() routines.
This cause for boot hangs diagnosed by kettenis.

machdep.kbdreset enables a shutdown by Ctrl-Alt-Del on amd64 and
i386. Stop abusing it on other archs for controling a shutdown by
pressing the soft power button:

* Add a MI sysctl hw.allowpowerdown; if set to 1 (the default) it
allows a power button shutdown.
* Make acpi(4)/acpibtn(4) honor hw.allowpowerdown.
* Switch the various power button intercepts on landisk, sgi, sparc64
and zaurus over to hw.allowpowerdown.
* Garbage collect the machdep.kbdreset sysctl on all archs other than
amd64 and i386.

ok miod@

Move the bufcachepercent setting code to MI locations -- set it to 42%
for now; that is unlikely to hit some of the remaining starvation bugs.
Repair the bufpages calculation too; i386 was doing it ahead of time
(incorrectly) and then re-calculating it.
ok thib

Remove the freelist member from vm_physseg

The new world order of pmemrange makes this data completely redundant
(being dealt with by the pmemrange constraints instead). Remove all code
that messes with the freelist.

While touching every caller of uvm_page_physload() anyway, add the flags
argument to all callers (all but one is 0 and that one already used
PHYSLOAD_DEVICE) and remove the macro magic to allow callers to continue
without it.

Should shrink the code a bit, as well.

matthew@ pointed out some mistakes i'd made.
``freelist death, I like. Ok.' ariane@
`I agree with the general direction, go ahead and i'll fix any fallout
shortly'' miod@ (68k 88k and vax i could not check would build)

memory handling fix

fix variable name

combus renamed uartbus, com_oct renamed cn30xxuart

obio renamed iobus, moved interrupt handler code to dev/octeon_intr.c

boot descriptor support added

passing stack pointer to secondary processors

Correct interrupt handling

Move build_trampoline() and setregs() to a common location for all mips ports.

Implemented combus to support com device on OCTEON without modifing dev/ic/com.c ok deraadt@

Remove bootinfo.c which has license issue. ok deraadt@

Initial revision

Replace cpus_running with CPU_IS_RUNNING().

Remember to set CPUF_RUNNING on secondary CPUs.

Make hw_cpu_hatch() more similar on loongson and octeon.

panic does not require a \n at the end. When one is provided, it looks wrong.

Add initial bits for Check Point UTM-1 EDGE N.

From Thaison Nguyen

Handle Netgear ProSecure UTM25

This makes the system recognize and configure Netgear ProSecure UTM25.
Of the network ports, LAN1-4 and WAN1 are functional. WAN2 does not work
for some reason. Even though WAN1 has a separate link to the SoC, the
connection appears to go through the same switch that the LAN ports use.
At the moment, the system relies on U-Boot to set up the switch so that
the LAN and WAN segments stay separate.

Initial diff and input from Thaison Nguyen, thank you!

Abstract octeon board handling a little

Detect octeon board model in one place, and replace firmware-supplied
board_type with an abstract model identifier in driver code. This makes
it easier to manage with different products, and board flavours, that
happen to use the same model information, such as board_type.

Userland timecounter implementation for octeon

OK naddy@; no objections from kettenis@

Synchronize each core's CP0 cycle counter using the IO clock counter.
This makes the cycle counter usable as timecounter on multiprocessor
machines.

Idea from Linux.

Tested on CN5020, CN6120, CN7130 and CN7360.

Looks reasonable to kettenis@

Add support for timeconting in userland.

This diff exposes parts of clock_gettime(2) and gettimeofday(2) to
userland via libc eliberating processes from the need for a context
switch everytime they want to count the passage of time.

If a timecounter clock can be exposed to userland than it needs to set
its tc_user member to a non-zero value. Tested with one or multiple
counters per architecture.

The timing data is shared through a pointer found in the new ELF
auxiliary vector AUX_openbsd_timekeep containing timehands information
that is frequently updated by the kernel.

Timing differences between the last kernel update and the current time
are adjusted in userland by the tc_get_timecount() function inside the
MD usertc.c file.

This permits a much more responsive environment, quite visible in
browsers, office programs and gaming (apparently one is are able to fly
in Minecraft now).

Tested by robert@, sthen@, naddy@, kmos@, phessler@, and many others!

OK from at least kettenis@, cheloha@, naddy@, sthen@

cpu_rnd_messybits() for mips64

Use CP0 Count as a basis. Also take noise from virtual memory activity
by including BadVAddr.

OK deraadt@ dlg@

introduce "cpu_rnd_messybits" for use instead of nanotime in dev/rnd.c.

rnd.c uses nanotime to get access to some bits that change quickly
between events that it can mix into the entropy pool. it doesn't
use nanotime to get a monotonically increasing set or ordered and
accurate timestamps, it just wants something with bits that change.

there's been discussions for years about letting rnd use a clock
that's super fast to read, but not necessarily accurate, but it
wasn't until recently that i figured out it wasn't interested in
time at all, so things like keeping a fast clock coherent between
cpu cores or correct according to ntp is unecessary. this means we
can just let rnd read the cycle counters on cpus and things will
be fine. cpus with cycle counters that vary in their speed and
arent kept consistent between cores may even be desirable in this
context.

so this is the first step in converting rnd.c to reading cycle
counter. it copies the nanotime backend to each arch, and they can
replace it with something MD as a second step later on.

djm@ suggested rnd_messybytes, but we landed on cpu_rnd_messybits.
thanks to visa for his eyes.
ok deraadt@ visa@
deraadt@ says he will help handle any MD fallout that occurs.