Constify struct cfattach.

ok miod@

Map the whole config1 space based on the size read from the
device-tree.

With this change, supplementary PCIe cards are now properly
detected.

This should prevents the kernel from faulting when reading
unmapped PCI addresses as reported by Donovan Watteau on ppc@.

ok kettenis@

OF_getprop() returns an int, so comparing its return value against sizeof casts
it to unsigned, and we need to also check for negative values.
All users of OF_getprop() did this but that one.

ok mpi@

Mimic what's done on sparc64 and parse the OpenFirmware device tree to
enumerate the pci devices. This allow us to not store the interrupt
vector in the interrupt line register and to not try to attach pci
devices disabled by firmware.

With inputs from and ok kettenis@

Only the mpcpcibus driver is actually using these structures so merge them
in the appropriate .c file and remove unused fields while here.

Introduce a new pci routine, pci_conf_size(), which returns the size of a
given pcitag_t configuration address space. Currently, all pci controllers
will return the usual 0x100 bytes of PCI configuration space, but this will
eventually change on PCIe-capable controlers.
ok kettenis@

Constify the what/name parameter of pci_intr_establish().

Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.

ok kettenis

(Manpage follows shortly.)

bzero pci attach args

correct dmesg output

Make pci subsystem aware of domains. Each host bridge gets assigned a unique
domain number such that we can distinguish between busses with the same bus
number that are behind different host bridges. Domains can be accessed by
using different device nodes.

ok deraadt@

* Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.

From NetBSD

ok grange@ kettenis@

Prevent access to PCI config space for function >0 on bus 0.
Fixes Xorg PCI scan.
ok drahn@

Map the config space area based on sc_maxdevs. (removes panic)

Allow PCI_INTERRUPT_PIN_NONE for the interrupt pin.
HyperTransport delivers interrupts via messages and does not define any
interrupt pins. (The documentation even warns that some operating systems
will not function correctly without a non-zero value in its Interrupt Pin
configuration space register.)

ok deraadt@

Determine the number of attached devices from OF.
Map enough memory for up to 8 devices.
Handle unconnected interrupt lines.
ok drahn@

pretty print

Allow fcn 1 to attach (mac-io on G5 tower)

Clean up ht_intr_map() a bit.

Add driver for HyperTransport as found in G5 Macs.
ok drahn@

Map the whole config1 space based on the size read from the
device-tree.

With this change, supplementary PCIe cards are now properly
detected.

This should prevents the kernel from faulting when reading
unmapped PCI addresses as reported by Donovan Watteau on ppc@.

ok kettenis@

OF_getprop() returns an int, so comparing its return value against sizeof casts
it to unsigned, and we need to also check for negative values.
All users of OF_getprop() did this but that one.

ok mpi@

Mimic what's done on sparc64 and parse the OpenFirmware device tree to
enumerate the pci devices. This allow us to not store the interrupt
vector in the interrupt line register and to not try to attach pci
devices disabled by firmware.

With inputs from and ok kettenis@

Only the mpcpcibus driver is actually using these structures so merge them
in the appropriate .c file and remove unused fields while here.

Introduce a new pci routine, pci_conf_size(), which returns the size of a
given pcitag_t configuration address space. Currently, all pci controllers
will return the usual 0x100 bytes of PCI configuration space, but this will
eventually change on PCIe-capable controlers.
ok kettenis@

Constify the what/name parameter of pci_intr_establish().

Tested by myself, sthen, oga, kettenis, and jasper.
Input from sthen and jasper.

ok kettenis

(Manpage follows shortly.)

bzero pci attach args

correct dmesg output

Make pci subsystem aware of domains. Each host bridge gets assigned a unique
domain number such that we can distinguish between busses with the same bus
number that are behind different host bridges. Domains can be accessed by
using different device nodes.

ok deraadt@

* Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.

From NetBSD

ok grange@ kettenis@

Prevent access to PCI config space for function >0 on bus 0.
Fixes Xorg PCI scan.
ok drahn@

Map the config space area based on sc_maxdevs. (removes panic)

Allow PCI_INTERRUPT_PIN_NONE for the interrupt pin.
HyperTransport delivers interrupts via messages and does not define any
interrupt pins. (The documentation even warns that some operating systems
will not function correctly without a non-zero value in its Interrupt Pin
configuration space register.)

ok deraadt@

Determine the number of attached devices from OF.
Map enough memory for up to 8 devices.
Handle unconnected interrupt lines.
ok drahn@

pretty print

Allow fcn 1 to attach (mac-io on G5 tower)

Clean up ht_intr_map() a bit.

Add driver for HyperTransport as found in G5 Macs.
ok drahn@