#
1.16 |
|
10-Oct-2022 |
jsg |
add references to 10h 12h revision guides
|
Revision tags: OPENBSD_7_2_BASE
|
#
1.15 |
|
24-Sep-2022 |
jsg |
add SH-B0 0x00000f50 socket 940 family 0Fh Opteron we already had SH-B0 0x00000f40 socket 754 family 0Fh Athlon 64
SH-B0 is part of amd64_errata_set8[]. Used for: Errata 89: Potential Deadlock With Locked Transactions
ok deraadt@
|
#
1.14 |
|
23-Sep-2022 |
jsg |
only call printf the first time amd64_errata() is called it may later be used from a resume path when we don't want to print
same change as amd64 amd64errata.c 1.11 by robert
ok robert@ deraadt@
|
#
1.13 |
|
20-Sep-2022 |
jsg |
remove HY_D1_G34R1 enum value and just use HY_D1
HY-D1 C32r1 (0x00100f81) and HY-D1 G34r1 (0x00100f91) have the same errata and multiple cpuid values can map to a single enum value.
|
Revision tags: OPENBSD_6_4_BASE OPENBSD_6_5_BASE OPENBSD_6_6_BASE OPENBSD_6_7_BASE OPENBSD_6_8_BASE OPENBSD_6_9_BASE OPENBSD_7_0_BASE OPENBSD_7_1_BASE
|
#
1.12 |
|
31-Mar-2018 |
bluhm |
Change ci_dev.dv_xname to ci_dev->dv_xname in debugging printf() to make it compile when enabled. from hshoexer@
|
#
1.11 |
|
31-Mar-2018 |
bluhm |
Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_3_BASE
|
#
1.10 |
|
22-Mar-2018 |
bluhm |
iBackout the preparations for fixing Meltdown on i386. The task was only halfway done and the current state does not help anybody. For OpenBSD 6.3 release go back to the original code before 2018/03/13. This gives us a stable release and the changes will come back later. discussed with guenther@ deraadt@ hshoexer@
|
#
1.9 |
|
13-Mar-2018 |
bluhm |
Preparation for i386 Meltdown fix:
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_2_BASE
|
#
1.8 |
|
08-Sep-2017 |
deraadt |
If you use sys/param.h, you don't need sys/types.h
|
#
1.7 |
|
24-Jul-2017 |
naddy |
add MULTIPROCESSOR guards around otherwise unused pieces to satisfy clang ok deraadt@ kettenis@
|
Revision tags: OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE OPENBSD_5_9_BASE OPENBSD_6_0_BASE OPENBSD_6_1_BASE
|
#
1.6 |
|
07-Dec-2013 |
brad |
Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too to appease the LLVM warning.
amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-variable]
ok sthen@
|
Revision tags: OPENBSD_5_4_BASE
|
#
1.5 |
|
21-May-2013 |
kettenis |
de-static-ize prototypes as well, which makes these functions not-static for real!
Pointed out by Alexey E. Suslikov.
|
#
1.4 |
|
20-May-2013 |
kettenis |
de-static-ize, such that people don't get confused by aesni failures on AMD hardware the next time somebody tries to run on a broken KVM hypervisor.
|
Revision tags: OPENBSD_5_2_BASE OPENBSD_5_3_BASE
|
#
1.3 |
|
27-Mar-2012 |
jsg |
Implement the AMD suggested workaround for family 10h & 12h errata 721 "Processor May Incorrectly Update Stack Pointer" by setting a bit marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround bit on i386 in case this isn't true and in the interest of keeping the errata in sync between i386/amd64.
ok deraadt@
|
Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE OPENBSD_5_0_BASE OPENBSD_5_1_BASE
|
#
1.2 |
|
26-Jun-2008 |
ray |
First pass at removing clauses 3 and 4 from NetBSD licenses.
Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors.
OK deraadt@
|
Revision tags: OPENBSD_4_1_BASE OPENBSD_4_2_BASE OPENBSD_4_3_BASE
|
#
1.1 |
|
17-Feb-2007 |
tom |
Bring in the AMD errata checks from amd64.
Changes to either copy of amd64errata.c must be replicated in the other.
ok deraadt@
|
Revision tags: OPENBSD_7_2_BASE
|
#
1.15 |
|
24-Sep-2022 |
jsg |
add SH-B0 0x00000f50 socket 940 family 0Fh Opteron we already had SH-B0 0x00000f40 socket 754 family 0Fh Athlon 64
SH-B0 is part of amd64_errata_set8[]. Used for: Errata 89: Potential Deadlock With Locked Transactions
ok deraadt@
|
#
1.14 |
|
23-Sep-2022 |
jsg |
only call printf the first time amd64_errata() is called it may later be used from a resume path when we don't want to print
same change as amd64 amd64errata.c 1.11 by robert
ok robert@ deraadt@
|
#
1.13 |
|
20-Sep-2022 |
jsg |
remove HY_D1_G34R1 enum value and just use HY_D1
HY-D1 C32r1 (0x00100f81) and HY-D1 G34r1 (0x00100f91) have the same errata and multiple cpuid values can map to a single enum value.
|
Revision tags: OPENBSD_6_4_BASE OPENBSD_6_5_BASE OPENBSD_6_6_BASE OPENBSD_6_7_BASE OPENBSD_6_8_BASE OPENBSD_6_9_BASE OPENBSD_7_0_BASE OPENBSD_7_1_BASE
|
#
1.12 |
|
31-Mar-2018 |
bluhm |
Change ci_dev.dv_xname to ci_dev->dv_xname in debugging printf() to make it compile when enabled. from hshoexer@
|
#
1.11 |
|
31-Mar-2018 |
bluhm |
Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_3_BASE
|
#
1.10 |
|
22-Mar-2018 |
bluhm |
iBackout the preparations for fixing Meltdown on i386. The task was only halfway done and the current state does not help anybody. For OpenBSD 6.3 release go back to the original code before 2018/03/13. This gives us a stable release and the changes will come back later. discussed with guenther@ deraadt@ hshoexer@
|
#
1.9 |
|
13-Mar-2018 |
bluhm |
Preparation for i386 Meltdown fix:
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_2_BASE
|
#
1.8 |
|
08-Sep-2017 |
deraadt |
If you use sys/param.h, you don't need sys/types.h
|
#
1.7 |
|
24-Jul-2017 |
naddy |
add MULTIPROCESSOR guards around otherwise unused pieces to satisfy clang ok deraadt@ kettenis@
|
Revision tags: OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE OPENBSD_5_9_BASE OPENBSD_6_0_BASE OPENBSD_6_1_BASE
|
#
1.6 |
|
07-Dec-2013 |
brad |
Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too to appease the LLVM warning.
amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-variable]
ok sthen@
|
Revision tags: OPENBSD_5_4_BASE
|
#
1.5 |
|
21-May-2013 |
kettenis |
de-static-ize prototypes as well, which makes these functions not-static for real!
Pointed out by Alexey E. Suslikov.
|
#
1.4 |
|
20-May-2013 |
kettenis |
de-static-ize, such that people don't get confused by aesni failures on AMD hardware the next time somebody tries to run on a broken KVM hypervisor.
|
Revision tags: OPENBSD_5_2_BASE OPENBSD_5_3_BASE
|
#
1.3 |
|
27-Mar-2012 |
jsg |
Implement the AMD suggested workaround for family 10h & 12h errata 721 "Processor May Incorrectly Update Stack Pointer" by setting a bit marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround bit on i386 in case this isn't true and in the interest of keeping the errata in sync between i386/amd64.
ok deraadt@
|
Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE OPENBSD_5_0_BASE OPENBSD_5_1_BASE
|
#
1.2 |
|
26-Jun-2008 |
ray |
First pass at removing clauses 3 and 4 from NetBSD licenses.
Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors.
OK deraadt@
|
Revision tags: OPENBSD_4_1_BASE OPENBSD_4_2_BASE OPENBSD_4_3_BASE
|
#
1.1 |
|
17-Feb-2007 |
tom |
Bring in the AMD errata checks from amd64.
Changes to either copy of amd64errata.c must be replicated in the other.
ok deraadt@
|
#
1.15 |
|
24-Sep-2022 |
jsg |
add SH-B0 0x00000f50 socket 940 family 0Fh Opteron we already had SH-B0 0x00000f40 socket 754 family 0Fh Athlon 64
SH-B0 is part of amd64_errata_set8[]. Used for: Errata 89: Potential Deadlock With Locked Transactions
ok deraadt@
|
#
1.14 |
|
23-Sep-2022 |
jsg |
only call printf the first time amd64_errata() is called it may later be used from a resume path when we don't want to print
same change as amd64 amd64errata.c 1.11 by robert
ok robert@ deraadt@
|
#
1.13 |
|
20-Sep-2022 |
jsg |
remove HY_D1_G34R1 enum value and just use HY_D1
HY-D1 C32r1 (0x00100f81) and HY-D1 G34r1 (0x00100f91) have the same errata and multiple cpuid values can map to a single enum value.
|
Revision tags: OPENBSD_6_4_BASE OPENBSD_6_5_BASE OPENBSD_6_6_BASE OPENBSD_6_7_BASE OPENBSD_6_8_BASE OPENBSD_6_9_BASE OPENBSD_7_0_BASE OPENBSD_7_1_BASE
|
#
1.12 |
|
31-Mar-2018 |
bluhm |
Change ci_dev.dv_xname to ci_dev->dv_xname in debugging printf() to make it compile when enabled. from hshoexer@
|
#
1.11 |
|
31-Mar-2018 |
bluhm |
Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_3_BASE
|
#
1.10 |
|
22-Mar-2018 |
bluhm |
iBackout the preparations for fixing Meltdown on i386. The task was only halfway done and the current state does not help anybody. For OpenBSD 6.3 release go back to the original code before 2018/03/13. This gives us a stable release and the changes will come back later. discussed with guenther@ deraadt@ hshoexer@
|
#
1.9 |
|
13-Mar-2018 |
bluhm |
Preparation for i386 Meltdown fix:
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_2_BASE
|
#
1.8 |
|
08-Sep-2017 |
deraadt |
If you use sys/param.h, you don't need sys/types.h
|
#
1.7 |
|
24-Jul-2017 |
naddy |
add MULTIPROCESSOR guards around otherwise unused pieces to satisfy clang ok deraadt@ kettenis@
|
Revision tags: OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE OPENBSD_5_9_BASE OPENBSD_6_0_BASE OPENBSD_6_1_BASE
|
#
1.6 |
|
07-Dec-2013 |
brad |
Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too to appease the LLVM warning.
amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-variable]
ok sthen@
|
Revision tags: OPENBSD_5_4_BASE
|
#
1.5 |
|
21-May-2013 |
kettenis |
de-static-ize prototypes as well, which makes these functions not-static for real!
Pointed out by Alexey E. Suslikov.
|
#
1.4 |
|
20-May-2013 |
kettenis |
de-static-ize, such that people don't get confused by aesni failures on AMD hardware the next time somebody tries to run on a broken KVM hypervisor.
|
Revision tags: OPENBSD_5_2_BASE OPENBSD_5_3_BASE
|
#
1.3 |
|
27-Mar-2012 |
jsg |
Implement the AMD suggested workaround for family 10h & 12h errata 721 "Processor May Incorrectly Update Stack Pointer" by setting a bit marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround bit on i386 in case this isn't true and in the interest of keeping the errata in sync between i386/amd64.
ok deraadt@
|
Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE OPENBSD_5_0_BASE OPENBSD_5_1_BASE
|
#
1.2 |
|
26-Jun-2008 |
ray |
First pass at removing clauses 3 and 4 from NetBSD licenses.
Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors.
OK deraadt@
|
Revision tags: OPENBSD_4_1_BASE OPENBSD_4_2_BASE OPENBSD_4_3_BASE
|
#
1.1 |
|
17-Feb-2007 |
tom |
Bring in the AMD errata checks from amd64.
Changes to either copy of amd64errata.c must be replicated in the other.
ok deraadt@
|
#
1.13 |
|
20-Sep-2022 |
jsg |
remove HY_D1_G34R1 enum value and just use HY_D1
HY-D1 C32r1 (0x00100f81) and HY-D1 G34r1 (0x00100f91) have the same errata and multiple cpuid values can map to a single enum value.
|
Revision tags: OPENBSD_6_4_BASE OPENBSD_6_5_BASE OPENBSD_6_6_BASE OPENBSD_6_7_BASE OPENBSD_6_8_BASE OPENBSD_6_9_BASE OPENBSD_7_0_BASE OPENBSD_7_1_BASE
|
#
1.12 |
|
31-Mar-2018 |
bluhm |
Change ci_dev.dv_xname to ci_dev->dv_xname in debugging printf() to make it compile when enabled. from hshoexer@
|
#
1.11 |
|
31-Mar-2018 |
bluhm |
Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_3_BASE
|
#
1.10 |
|
22-Mar-2018 |
bluhm |
iBackout the preparations for fixing Meltdown on i386. The task was only halfway done and the current state does not help anybody. For OpenBSD 6.3 release go back to the original code before 2018/03/13. This gives us a stable release and the changes will come back later. discussed with guenther@ deraadt@ hshoexer@
|
#
1.9 |
|
13-Mar-2018 |
bluhm |
Preparation for i386 Meltdown fix:
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_2_BASE
|
#
1.8 |
|
08-Sep-2017 |
deraadt |
If you use sys/param.h, you don't need sys/types.h
|
#
1.7 |
|
24-Jul-2017 |
naddy |
add MULTIPROCESSOR guards around otherwise unused pieces to satisfy clang ok deraadt@ kettenis@
|
Revision tags: OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE OPENBSD_5_9_BASE OPENBSD_6_0_BASE OPENBSD_6_1_BASE
|
#
1.6 |
|
07-Dec-2013 |
brad |
Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too to appease the LLVM warning.
amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-variable]
ok sthen@
|
Revision tags: OPENBSD_5_4_BASE
|
#
1.5 |
|
21-May-2013 |
kettenis |
de-static-ize prototypes as well, which makes these functions not-static for real!
Pointed out by Alexey E. Suslikov.
|
#
1.4 |
|
20-May-2013 |
kettenis |
de-static-ize, such that people don't get confused by aesni failures on AMD hardware the next time somebody tries to run on a broken KVM hypervisor.
|
Revision tags: OPENBSD_5_2_BASE OPENBSD_5_3_BASE
|
#
1.3 |
|
27-Mar-2012 |
jsg |
Implement the AMD suggested workaround for family 10h & 12h errata 721 "Processor May Incorrectly Update Stack Pointer" by setting a bit marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround bit on i386 in case this isn't true and in the interest of keeping the errata in sync between i386/amd64.
ok deraadt@
|
Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE OPENBSD_5_0_BASE OPENBSD_5_1_BASE
|
#
1.2 |
|
26-Jun-2008 |
ray |
First pass at removing clauses 3 and 4 from NetBSD licenses.
Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors.
OK deraadt@
|
Revision tags: OPENBSD_4_1_BASE OPENBSD_4_2_BASE OPENBSD_4_3_BASE
|
#
1.1 |
|
17-Feb-2007 |
tom |
Bring in the AMD errata checks from amd64.
Changes to either copy of amd64errata.c must be replicated in the other.
ok deraadt@
|
#
1.12 |
|
31-Mar-2018 |
bluhm |
Change ci_dev.dv_xname to ci_dev->dv_xname in debugging printf() to make it compile when enabled. from hshoexer@
|
#
1.11 |
|
31-Mar-2018 |
bluhm |
Recommit preparation for i386 Meltdown fix after OpenBSD 6.3 release.
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_3_BASE
|
#
1.10 |
|
22-Mar-2018 |
bluhm |
iBackout the preparations for fixing Meltdown on i386. The task was only halfway done and the current state does not help anybody. For OpenBSD 6.3 release go back to the original code before 2018/03/13. This gives us a stable release and the changes will come back later. discussed with guenther@ deraadt@ hshoexer@
|
#
1.9 |
|
13-Mar-2018 |
bluhm |
Preparation for i386 Meltdown fix:
- provide a cpu_softc for cpu_attach() etc. - replace per PCB TSS with per CPU TSS
The first change prepares for cpu_info being embedded in a cpu_full_info. Therefore during autoconf/cpu_attach we hand down a softc.
The second change removes the per PCB TSS. We now have one TSS per CPU, thus in cpu_switchto() we only have to patch the ring 0 stack pointer instead of loading a new TSS. This also allows for cleaning up the GDT, so we only have a single slot for the TSS.
from hshoexer@; OK deraadt@
|
Revision tags: OPENBSD_6_2_BASE
|
#
1.8 |
|
08-Sep-2017 |
deraadt |
If you use sys/param.h, you don't need sys/types.h
|
#
1.7 |
|
24-Jul-2017 |
naddy |
add MULTIPROCESSOR guards around otherwise unused pieces to satisfy clang ok deraadt@ kettenis@
|
Revision tags: OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE OPENBSD_5_9_BASE OPENBSD_6_0_BASE OPENBSD_6_1_BASE
|
#
1.6 |
|
07-Dec-2013 |
brad |
Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too to appease the LLVM warning.
amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-variable]
ok sthen@
|
Revision tags: OPENBSD_5_4_BASE
|
#
1.5 |
|
21-May-2013 |
kettenis |
de-static-ize prototypes as well, which makes these functions not-static for real!
Pointed out by Alexey E. Suslikov.
|
#
1.4 |
|
20-May-2013 |
kettenis |
de-static-ize, such that people don't get confused by aesni failures on AMD hardware the next time somebody tries to run on a broken KVM hypervisor.
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Revision tags: OPENBSD_5_2_BASE OPENBSD_5_3_BASE
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#
1.3 |
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27-Mar-2012 |
jsg |
Implement the AMD suggested workaround for family 10h & 12h errata 721 "Processor May Incorrectly Update Stack Pointer" by setting a bit marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround bit on i386 in case this isn't true and in the interest of keeping the errata in sync between i386/amd64.
ok deraadt@
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Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE OPENBSD_5_0_BASE OPENBSD_5_1_BASE
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#
1.2 |
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26-Jun-2008 |
ray |
First pass at removing clauses 3 and 4 from NetBSD licenses.
Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors.
OK deraadt@
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Revision tags: OPENBSD_4_1_BASE OPENBSD_4_2_BASE OPENBSD_4_3_BASE
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#
1.1 |
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17-Feb-2007 |
tom |
Bring in the AMD errata checks from amd64.
Changes to either copy of amd64errata.c must be replicated in the other.
ok deraadt@
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Revision tags: OPENBSD_6_2_BASE
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#
1.8 |
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08-Sep-2017 |
deraadt |
If you use sys/param.h, you don't need sys/types.h
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#
1.7 |
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24-Jul-2017 |
naddy |
add MULTIPROCESSOR guards around otherwise unused pieces to satisfy clang ok deraadt@ kettenis@
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Revision tags: OPENBSD_5_5_BASE OPENBSD_5_6_BASE OPENBSD_5_7_BASE OPENBSD_5_8_BASE OPENBSD_5_9_BASE OPENBSD_6_0_BASE OPENBSD_6_1_BASE
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#
1.6 |
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07-Dec-2013 |
brad |
Errata 122 is currently disabled so stick amd64_errata_set4 under #if 0 too to appease the LLVM warning.
amd64errata.c:103:22: error: unused variable 'amd64_errata_set4' [-Werror,-Wunused-const-variable]
ok sthen@
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Revision tags: OPENBSD_5_4_BASE
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#
1.5 |
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21-May-2013 |
kettenis |
de-static-ize prototypes as well, which makes these functions not-static for real!
Pointed out by Alexey E. Suslikov.
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#
1.4 |
|
20-May-2013 |
kettenis |
de-static-ize, such that people don't get confused by aesni failures on AMD hardware the next time somebody tries to run on a broken KVM hypervisor.
|
Revision tags: OPENBSD_5_2_BASE OPENBSD_5_3_BASE
|
#
1.3 |
|
27-Mar-2012 |
jsg |
Implement the AMD suggested workaround for family 10h & 12h errata 721 "Processor May Incorrectly Update Stack Pointer" by setting a bit marked 'reserved' in an MSR that is only "documented" to exist on 12h.
AMD claim this problem can only occur in 64-bit mode, set the workaround bit on i386 in case this isn't true and in the interest of keeping the errata in sync between i386/amd64.
ok deraadt@
|
Revision tags: OPENBSD_4_4_BASE OPENBSD_4_5_BASE OPENBSD_4_6_BASE OPENBSD_4_7_BASE OPENBSD_4_8_BASE OPENBSD_4_9_BASE OPENBSD_5_0_BASE OPENBSD_5_1_BASE
|
#
1.2 |
|
26-Jun-2008 |
ray |
First pass at removing clauses 3 and 4 from NetBSD licenses.
Not sure what's more surprising: how long it took for NetBSD to catch up to the rest of the BSDs (including UCB), or the amount of code that NetBSD has claimed for itself without attributing to the actual authors.
OK deraadt@
|
Revision tags: OPENBSD_4_1_BASE OPENBSD_4_2_BASE OPENBSD_4_3_BASE
|
#
1.1 |
|
17-Feb-2007 |
tom |
Bring in the AMD errata checks from amd64.
Changes to either copy of amd64errata.c must be replicated in the other.
ok deraadt@
|