t_siginfo: More volatile to prevent optimization.

t_siginfo: Use volatile to prevent optimization.

t_siginfo: No SIGFPE on RISC-V.

t_siginfo:sigfpe_int: Adjust for GCC12

Do not use constant 1 as numerator to raise integer division by zero.
GCC >= 12 optimizes (1 / i) into (abs(i) == 1 ? i : 0), even for -O0.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Skip sigfpe_int also for sh3; integer division by zero is not trapped.

s/occured/occurred/ in comments, log messages and man pages.

skip sigbus_adraln on MIPS

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

t_siginfo: Use volatile to prevent optimization.

t_siginfo: No SIGFPE on RISC-V.

t_siginfo:sigfpe_int: Adjust for GCC12

Do not use constant 1 as numerator to raise integer division by zero.
GCC >= 12 optimizes (1 / i) into (abs(i) == 1 ? i : 0), even for -O0.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Skip sigfpe_int also for sh3; integer division by zero is not trapped.

s/occured/occurred/ in comments, log messages and man pages.

skip sigbus_adraln on MIPS

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

t_siginfo:sigfpe_int: Adjust for GCC12

Do not use constant 1 as numerator to raise integer division by zero.
GCC >= 12 optimizes (1 / i) into (abs(i) == 1 ? i : 0), even for -O0.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Skip sigfpe_int also for sh3; integer division by zero is not trapped.

s/occured/occurred/ in comments, log messages and man pages.

skip sigbus_adraln on MIPS

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Skip sigfpe_int also for sh3; integer division by zero is not trapped.

s/occured/occurred/ in comments, log messages and man pages.

skip sigbus_adraln on MIPS

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

Skip sigfpe_int also for sh3; integer division by zero is not trapped.

s/occured/occurred/ in comments, log messages and man pages.

skip sigbus_adraln on MIPS

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

s/occured/occurred/ in comments, log messages and man pages.

skip sigbus_adraln on MIPS

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

skip sigbus_adraln on MIPS

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

It's GXemul that has the bug! Unfortunately, there's no way (currently) to
detect if we're running under GXemul emulation, so disable for all mips
for now. Hopefully, GXemul will get fixed soon.

PR/55715: pmax testbed panics with "assertion "asid == curcpu()->ci_pmap_asid_cur" failed"

disable the sigbus_adraln test on qemu for now

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

For aarch64eb, no SIGBUS signal for unaligned accesses.
Convert to preprocessor directives.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.

Fix typo in 'exceptions'

Clean up terminology: modern arm CPUs do properly implement IEEE 754
floating point exceptions - but some (actually all currently know ones)
do not implement sending traps when these exceptions are raised.

Pointed out by Peter Maydell.

aarch64 does not trap on unaligned acces

There are aarch64 Cortex cpus that do not trap on some floating point
exceptions - so apply the arm handling for aarch64 as well.

branches: 1.32.2; 1.32.4;
Improve portability of headers and sort them.

From Ngie Cooper in PR bin/51833

reenable sigfpe_flt on powerpc now that FPU exceptions work.

branches: 1.30.2; 1.30.4;
Add __TEST_FENV

m68k (except sun2) never issue SIGBUS on unaligned accesses.
PR lib/49653. Thanks martin@.

Fix strange editor mishap and start block comment on its own line.

Include <ieeefp.h> even for the <fenv.h> case since we use fpsetmask()
to detect ARM Cortex NEON fpus.

Skip the SIGFPE test on arm when the FPU does not provide exception handling.

Use machdep.unaligned_sigbus to skip the unaligned access test on arm
as well.

PR misc/49356 remove unnecessary references to atf-c/config.h

The function included via this header is not used and is removed in
later versions of atf, so let us avoid it.

Use compiler builtins instead of atf_arch and atf_machine.

The atf_arch and atf_machine configuration variables were removed from
atf-0.19 without me realizing that some tests were querying them directly.

Instead of reintroducing those variables, just rely on compiler builtins
as many other tests already do.

Should fix PR bin/48582.

Support using fenv instead of fpsetmask if HAVE_FENV is defined.

Use English spelling of alignment.

use one qemu test

easier way to find if we are on qemu.

branches: 1.18.2;
Skip sigbus_adraln testcase on alpha unless global
machdep.unaligned_sigbus sysctl is enabled.

Revert previous, si_addr is expected to be the faulting *data* address
(mmm, consistent standards).
Add a few tweaks to prevent the compiler's optimizer outsmarting the test.

Do not compare si_addr (address of faulting instruction) against the
unaligned data address causing the fault - this will always fail.
If anybody knows a portable way to get the data address involved in the
fault, please fix the test case as originally intended.

ATF test for SIGBUS => BUS_ADRALN (invalid address alignment).

That one is tedious to test under x86: alignment exceptions are
not reported by this architecture unless you ask for them explicitely (by
setting the PSL_AC bit). The brokenness does not end there: %cr2 should
contain the address where the unaligned access occured, alas, it does not.

I am not aware of other architectures where this could happen. Still, my
knowledge is limited; if there is one, feel free to send me a mail and I
will update the test accordingly.

Adding insult to injury, this test can fail in various funny ways with VMs:
- under x86 QEMU, no trap() happens. As ring 3 code stays almost untouched by
QEMU VMM, I suppose the exception can only be triggered when the host
itself is capable of catching unaligned accesses.
- under Virtual Box with HVM support, i386 works fine, but amd64 fails with a
SIGILL (Illegal instruction) that happens right before entering the
signal handler. No idea why, and trying to debug it with gdb freezes the VM
(including ddb breaks).

Anyway, tested with:
- i386: P4 host, anita, Virtual Box HVM (Mac OS X)
- amd64: anita, Virtual Box HVM (Mac OS X)

XXX I would appreciate if someone could test it under a real amd64 host with
an up-to-date kernel, so I can reasonably assume that the culprit is
Virtual Box and not our amd64 port (my test machine being off line
I cannot do it myself). Results from other arches would be a plus too.

Initial issue reported by Nicolas Joly on port-amd64. Thanks!

To be on the safe side, use the category/number notation when referring to
PRs (otherwise third-party sed-scripts might miss the references). Also
remove white-space.

annotate the PR that failed, and has been fixed.

branches: 1.12.2;
use _FLOAT_IEEE754 instead of vax.

Use volatile for explicit 0 dereference

Skip the sigfpe_flt and sigfpe_int tests on powerpc; powerpc does
not fault on divide-by-zero. As discussed on tech-userlevel.

Attempt further qemu heuristics to avoid failures due to non-working FPU

branches: 1.8.2;
Don't run FP Exception tests under qemu - they don't work.

While here, properly skip certain tests on vax architecture. (It is
not legal to have a test-program with zero test cases, so each test
case needs to check-and-skip.)

If we survive the check for wrong signal code, reset our expectation to
"pass" before checking the signal errno.

Fix $NetBSD$ keyword

return from an SIGFPE handler is not defined when the hardware
caused the exception. Use sigsetjmp/siglongjmp to resume the
test function instead.

Do use integer arithmetics to generate FPE_INTDIV in sigfpe_int testcase.

Ok pgoyette.

Re-enable printing of MD data, with appropriate casts.

For now, don't try to print out machine-dependant stuff. When I figure
out what the right format strings are, I'll re-enable it.

Move the siginfo tests from regress to atf. While here, add a new test
for PR/43655.

XXX The sigchild_dump test currently fails when execute under atf-run.
XXX It does not fail when executed directly from the shell, so there's
XXX something in atf that prevents the child process from dumping.

Expect a failure to trap unaligned acesses only when running under
qemu's TCG CPU emulation, not when running under hardware virtualization
such as qemu -accel nvmm.

Skip sigbus_adraln for powerpc.

SIGBUS for unaligned accesses is not mandatory for powerpc;
most processors (not all, e.g., 403) can deal with that.

Disable the t_siginfo test under MKSANITIZER / MKLIBCSANITIZER

Signal crash events are incompatible with sanitizers.

Mark division by 0 as expected in sigfpe_int

Disable ubsan instrumentation on the operation.

aarch64 doesn't trap integer division by zero either.