History log of /netbsd-current/sys/kern/subr_csan.c
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
# 1.14 30-Jul-2022 riastradh

sys/atomic.h: Fix atomic_store_* on sparcv7, sparcv8.

These did not cooperate with the hash-locked scheme of the other
atomic operations, with the effect that, for instance, a typical
naive spin lock based on atomic_*,

volatile unsigned locked = 0;
lock()
{
while (atomic_swap_uint(&locked, 1))
continue;
membar_acquire();
}
unlock()
{
membar_release();
atomic_store_relaxed(&locked, 0);
}

would fail to achieve mutual exclusion.

For this case, we need to use atomic_swap_* (or, for 8- or 16-bit
objects, atomic_cas_32 loops, since there is no atomic_swap_8 or
atomic_swap_16).

The new machine/types.h macro __HAVE_HASHLOCKED_ATOMICS says whether
these contortions are necessary.

Note that this _requires_ the use of atomic_store_*(p, v), not
regular stores *p = v, to work with the r/m/w atomic operations.


# 1.13 11-Sep-2021 riastradh

ksyms: Use pserialize(9) for kernel access to ksyms.

This makes it available in interrupt context, e.g. for printing
messages with kernel symbol names for return addresses as drm wants
to do.


# 1.12 07-Sep-2021 riastradh

Revert "ksyms: Use pserialize(9) for kernel access to ksyms."


# 1.11 07-Sep-2021 riastradh

ksyms: Use pserialize(9) for kernel access to ksyms.

This makes it available in interrupt context, e.g. for printing
messages with kernel symbol names for return addresses as drm wants
to do.


Revision tags: thorpej-i2c-spi-conf2-base thorpej-futex2-base thorpej-cfargs2-base cjep_sun2x-base1 cjep_sun2x-base cjep_staticlib_x-base1 cjep_staticlib_x-base thorpej-i2c-spi-conf-base thorpej-cfargs-base thorpej-futex-base
# 1.10 10-Sep-2020 maxv

kcsan: fix the copyright notices


# 1.9 30-Jun-2020 maxv

Make copystr() a MI C function, part of libkern and shared on all
architectures.

Notes:

- On alpha and ia64 the function is kept but gets renamed locally to avoid
symbol collision. This is because on these two arches, I am not sure
whether the ASM callers do not rely on fixed registers, so I prefer to
keep the ASM body for now.
- On Vax, only the symbol is removed, because the body is used from other
functions.
- On RISC-V, this change fixes a bug: copystr() was just a wrapper around
strlcpy(), but strlcpy() makes the operation less safe (strlen on the
source beyond its size).
- The kASan, kCSan and kMSan wrappers are removed, because now that
copystr() is in C, the compiler transformations are applied to it,
without the need for manual wrappers.

Could test on amd64 only, but should be fine.


Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1
# 1.8 15-Apr-2020 maxv

Drop the todo and qualify the accesses.


Revision tags: phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.7 02-Apr-2020 maxv

branches: 1.7.2; 1.7.4;
Add a comment.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.13 11-Sep-2021 riastradh

ksyms: Use pserialize(9) for kernel access to ksyms.

This makes it available in interrupt context, e.g. for printing
messages with kernel symbol names for return addresses as drm wants
to do.


# 1.12 07-Sep-2021 riastradh

Revert "ksyms: Use pserialize(9) for kernel access to ksyms."


# 1.11 07-Sep-2021 riastradh

ksyms: Use pserialize(9) for kernel access to ksyms.

This makes it available in interrupt context, e.g. for printing
messages with kernel symbol names for return addresses as drm wants
to do.


Revision tags: thorpej-i2c-spi-conf2-base thorpej-futex2-base thorpej-cfargs2-base cjep_sun2x-base1 cjep_sun2x-base cjep_staticlib_x-base1 cjep_staticlib_x-base thorpej-i2c-spi-conf-base thorpej-cfargs-base thorpej-futex-base
# 1.10 10-Sep-2020 maxv

kcsan: fix the copyright notices


# 1.9 30-Jun-2020 maxv

Make copystr() a MI C function, part of libkern and shared on all
architectures.

Notes:

- On alpha and ia64 the function is kept but gets renamed locally to avoid
symbol collision. This is because on these two arches, I am not sure
whether the ASM callers do not rely on fixed registers, so I prefer to
keep the ASM body for now.
- On Vax, only the symbol is removed, because the body is used from other
functions.
- On RISC-V, this change fixes a bug: copystr() was just a wrapper around
strlcpy(), but strlcpy() makes the operation less safe (strlen on the
source beyond its size).
- The kASan, kCSan and kMSan wrappers are removed, because now that
copystr() is in C, the compiler transformations are applied to it,
without the need for manual wrappers.

Could test on amd64 only, but should be fine.


Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1
# 1.8 15-Apr-2020 maxv

Drop the todo and qualify the accesses.


Revision tags: phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.7 02-Apr-2020 maxv

branches: 1.7.2; 1.7.4;
Add a comment.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.12 07-Sep-2021 riastradh

Revert "ksyms: Use pserialize(9) for kernel access to ksyms."


# 1.11 07-Sep-2021 riastradh

ksyms: Use pserialize(9) for kernel access to ksyms.

This makes it available in interrupt context, e.g. for printing
messages with kernel symbol names for return addresses as drm wants
to do.


Revision tags: thorpej-i2c-spi-conf2-base thorpej-futex2-base thorpej-cfargs2-base cjep_sun2x-base1 cjep_sun2x-base cjep_staticlib_x-base1 cjep_staticlib_x-base thorpej-i2c-spi-conf-base thorpej-cfargs-base thorpej-futex-base
# 1.10 10-Sep-2020 maxv

kcsan: fix the copyright notices


# 1.9 30-Jun-2020 maxv

Make copystr() a MI C function, part of libkern and shared on all
architectures.

Notes:

- On alpha and ia64 the function is kept but gets renamed locally to avoid
symbol collision. This is because on these two arches, I am not sure
whether the ASM callers do not rely on fixed registers, so I prefer to
keep the ASM body for now.
- On Vax, only the symbol is removed, because the body is used from other
functions.
- On RISC-V, this change fixes a bug: copystr() was just a wrapper around
strlcpy(), but strlcpy() makes the operation less safe (strlen on the
source beyond its size).
- The kASan, kCSan and kMSan wrappers are removed, because now that
copystr() is in C, the compiler transformations are applied to it,
without the need for manual wrappers.

Could test on amd64 only, but should be fine.


Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1
# 1.8 15-Apr-2020 maxv

Drop the todo and qualify the accesses.


Revision tags: phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.7 02-Apr-2020 maxv

branches: 1.7.2; 1.7.4;
Add a comment.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.11 07-Sep-2021 riastradh

ksyms: Use pserialize(9) for kernel access to ksyms.

This makes it available in interrupt context, e.g. for printing
messages with kernel symbol names for return addresses as drm wants
to do.


Revision tags: thorpej-i2c-spi-conf2-base thorpej-futex2-base thorpej-cfargs2-base cjep_sun2x-base1 cjep_sun2x-base cjep_staticlib_x-base1 cjep_staticlib_x-base thorpej-i2c-spi-conf-base thorpej-cfargs-base thorpej-futex-base
# 1.10 10-Sep-2020 maxv

kcsan: fix the copyright notices


# 1.9 30-Jun-2020 maxv

Make copystr() a MI C function, part of libkern and shared on all
architectures.

Notes:

- On alpha and ia64 the function is kept but gets renamed locally to avoid
symbol collision. This is because on these two arches, I am not sure
whether the ASM callers do not rely on fixed registers, so I prefer to
keep the ASM body for now.
- On Vax, only the symbol is removed, because the body is used from other
functions.
- On RISC-V, this change fixes a bug: copystr() was just a wrapper around
strlcpy(), but strlcpy() makes the operation less safe (strlen on the
source beyond its size).
- The kASan, kCSan and kMSan wrappers are removed, because now that
copystr() is in C, the compiler transformations are applied to it,
without the need for manual wrappers.

Could test on amd64 only, but should be fine.


Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1
# 1.8 15-Apr-2020 maxv

Drop the todo and qualify the accesses.


Revision tags: phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.7 02-Apr-2020 maxv

branches: 1.7.2; 1.7.4;
Add a comment.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.10 10-Sep-2020 maxv

kcsan: fix the copyright notices


# 1.9 30-Jun-2020 maxv

Make copystr() a MI C function, part of libkern and shared on all
architectures.

Notes:

- On alpha and ia64 the function is kept but gets renamed locally to avoid
symbol collision. This is because on these two arches, I am not sure
whether the ASM callers do not rely on fixed registers, so I prefer to
keep the ASM body for now.
- On Vax, only the symbol is removed, because the body is used from other
functions.
- On RISC-V, this change fixes a bug: copystr() was just a wrapper around
strlcpy(), but strlcpy() makes the operation less safe (strlen on the
source beyond its size).
- The kASan, kCSan and kMSan wrappers are removed, because now that
copystr() is in C, the compiler transformations are applied to it,
without the need for manual wrappers.

Could test on amd64 only, but should be fine.


Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1
# 1.8 15-Apr-2020 maxv

Drop the todo and qualify the accesses.


Revision tags: phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.7 02-Apr-2020 maxv

branches: 1.7.2; 1.7.4;
Add a comment.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.9 30-Jun-2020 maxv

Make copystr() a MI C function, part of libkern and shared on all
architectures.

Notes:

- On alpha and ia64 the function is kept but gets renamed locally to avoid
symbol collision. This is because on these two arches, I am not sure
whether the ASM callers do not rely on fixed registers, so I prefer to
keep the ASM body for now.
- On Vax, only the symbol is removed, because the body is used from other
functions.
- On RISC-V, this change fixes a bug: copystr() was just a wrapper around
strlcpy(), but strlcpy() makes the operation less safe (strlen on the
source beyond its size).
- The kASan, kCSan and kMSan wrappers are removed, because now that
copystr() is in C, the compiler transformations are applied to it,
without the need for manual wrappers.

Could test on amd64 only, but should be fine.


Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1
# 1.8 15-Apr-2020 maxv

Drop the todo and qualify the accesses.


Revision tags: phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.7 02-Apr-2020 maxv

branches: 1.7.2; 1.7.4;
Add a comment.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.8 15-Apr-2020 maxv

Drop the todo and qualify the accesses.


Revision tags: phil-wifi-20200411 bouyer-xenpvh-base phil-wifi-20200406
# 1.7 02-Apr-2020 maxv

branches: 1.7.4;
Add a comment.


Revision tags: is-mlppp-base ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.7 02-Apr-2020 maxv

Add a comment.


Revision tags: ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.6 01-Dec-2019 maxv

Add KCSAN instrumentation for atomic_{load,store}_*.


Revision tags: phil-wifi-20191119
# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.5 15-Nov-2019 maxv

Instrument copyout() in kCSan, for parity with kMSan.


# 1.4 14-Nov-2019 maxv

Don't include "opt_kcsan.h" since there's already <sys/csan.h> included.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.


# 1.3 08-Nov-2019 maxv

Exclude the PTE space from KCSAN, since there the same VA can point to
different PAs.


# 1.2 06-Nov-2019 maxv

Change kcsan_md_is_avail() to always return true; I was testing with
interrupts disabled as debugging. Change the delay/sample parameters
to have better fluidity.


# 1.1 05-Nov-2019 maxv

Add Kernel Concurrency Sanitizer (kCSan) support. This sanitizer allows us
to detect race conditions at runtime. It is a variation of TSan that is
easy to implement and more suited to kernel internals, albeit theoretically
less precise than TSan's happens-before.

We do basically two things:

- On every KCSAN_NACCESSES (=2000) memory accesses, we create a cell
describing the access, and delay the calling CPU (10ms).

- On all memory accesses, we verify if the memory we're reading/writing
is referenced in a cell already.

The combination of the two means that, if for example cpu0 does a read that
is selected and cpu1 does a write at the same address, kCSan will fire,
because cpu1's write collides with cpu0's read cell.

The coverage of the instrumentation is the same as that of kASan. Also, the
code is organized in a way similar to kASan, so it is easy to add support
for more architectures than amd64. kCSan is compatible with KCOV.

Reviewed by Kamil.