PCI_QUIRK_HASEXTCNF is no longer required for AMD Seattle PCHB

Set PCI_QUIRK_HASEXTCNF flag for AMD Seattle PCI host bridges

branches: 1.10.2;
- Add new PCI quirk PCI_QUIRK_HASEXTCNF and PCI_QUIRK_NOEXTCNF. Some devices'
extended configuration area may be broken or violate spec. If an extended
configuration space is strange but it really exist, use PCI_QUIRK_HASEXTCNF.
If an extended configuration space is plausible to exist but it really
doesn't exist, use PCI_QUIRK_NOEXTCNF.
- Add PCI_PRODUCT_INTEL_XEOND_MEM_0_TTR_1(0x6fa8) and
PCI_PRODUCT_INTEL_COREI76K_IMC_0(0x6f68) with PCI_QUIRK_HASEXTCNF. The
document clearly states they violate spec and it support the extended
configuration space.

Use __arraycount() for readability

branches: 1.8.44;
Sync with Xbox Host-PCI bridge name change.

Add quirk for Xbox nForce, from Andrew Gillham.

branches: 1.6.20;
merge ktrace-lwp.

branches: 1.5.2;
Use ANSI function decls and static.

Remove SKIP_FUNCn quirks for SC1100 companion chip; the fix to SMM in
i386/identcpu.c renders it counterproductive.

(this was the only use and the reason for the invention of the
SKIP_FUNCn quirk; it should probably be removed entirely).

- check HDRTYPE early, and ignore if it is not supported (n > 2).
- defer access to interrupt configuration register, as its existence depends on
HDRTYPE.
- add "skip particular funtion in multifunction device" functionality
to quirk table.
- add GEODE/NS SC1100 quirk (now boots on soekris Net4801).

branches: 1.2.10; 1.2.16;
add RCSID

branches: 1.1.26; 1.1.28;
dd a PCI 'quirks' mechanism, meant to be used as the mechanism
of last resort when trying to communicate information about
bogus behaviour of PCI devices to the MI autoconfiguration code.
In general, bogus behaviour should be handled by drivers, but there
are some types of bogons which can't be addressed that way. The
only quirk currently defined is one which indicates that the device
is multi-function even though the device's header says otherwise.
(Mmm, Intel 82371FB PCI-to-ISA Bridge (PIIX); you'd think that at least
Intel would have gotten it right...)