#
1.5 |
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08-Sep-2020 |
jakllsch |
Acknowledge clang warning for NEON cipher code on aarch64eb
We've already made the nonportable vector initializations portable; the code works on aarch64eb.
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#
1.4 |
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16-Aug-2020 |
riastradh |
Fix AES NEON code for big-endian softfp ARM.
...which is how the kernel runs. Switch to using __SOFTFP__ for consistency with how it gets exposed to C, although I'm not sure how to get it defined automagically in the toolchain for .S files so that's set manually in files.aesneon for now.
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#
1.3 |
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30-Jun-2020 |
riastradh |
Limit aes_neon to cpu_cortex | aarch64.
We won't use it on any other systems, and it doesn't build without NEON anyway. Verified earmv7hf GENERIC, aarch64 GENERIC64, and earmv6 RPI2 all build with this.
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#
1.2 |
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29-Jun-2020 |
riastradh |
Provide hand-written AES NEON assembly for arm32.
gcc does a lousy job at compiling 128-bit NEON intrinsics on arm32; hand-writing it made it about 12x faster, by avoiding a zillion loads and stores to spill everything and the kitchen sink onto the stack. (But gcc does fine on aarch64, presumably because it has twice as many registers and doesn't have to deal with q2=d4/d5 overlapping.)
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#
1.1 |
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29-Jun-2020 |
riastradh |
New permutation-based AES implementation using ARM NEON.
Also derived from Mike Hamburg's public-domain vpaes code.
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#
1.4 |
|
16-Aug-2020 |
riastradh |
Fix AES NEON code for big-endian softfp ARM.
...which is how the kernel runs. Switch to using __SOFTFP__ for consistency with how it gets exposed to C, although I'm not sure how to get it defined automagically in the toolchain for .S files so that's set manually in files.aesneon for now.
|
#
1.3 |
|
30-Jun-2020 |
riastradh |
Limit aes_neon to cpu_cortex | aarch64.
We won't use it on any other systems, and it doesn't build without NEON anyway. Verified earmv7hf GENERIC, aarch64 GENERIC64, and earmv6 RPI2 all build with this.
|
#
1.2 |
|
29-Jun-2020 |
riastradh |
Provide hand-written AES NEON assembly for arm32.
gcc does a lousy job at compiling 128-bit NEON intrinsics on arm32; hand-writing it made it about 12x faster, by avoiding a zillion loads and stores to spill everything and the kitchen sink onto the stack. (But gcc does fine on aarch64, presumably because it has twice as many registers and doesn't have to deal with q2=d4/d5 overlapping.)
|
#
1.1 |
|
29-Jun-2020 |
riastradh |
New permutation-based AES implementation using ARM NEON.
Also derived from Mike Hamburg's public-domain vpaes code.
|
#
1.3 |
|
30-Jun-2020 |
riastradh |
Limit aes_neon to cpu_cortex | aarch64.
We won't use it on any other systems, and it doesn't build without NEON anyway. Verified earmv7hf GENERIC, aarch64 GENERIC64, and earmv6 RPI2 all build with this.
|
#
1.2 |
|
29-Jun-2020 |
riastradh |
Provide hand-written AES NEON assembly for arm32.
gcc does a lousy job at compiling 128-bit NEON intrinsics on arm32; hand-writing it made it about 12x faster, by avoiding a zillion loads and stores to spill everything and the kitchen sink onto the stack. (But gcc does fine on aarch64, presumably because it has twice as many registers and doesn't have to deal with q2=d4/d5 overlapping.)
|
#
1.1 |
|
29-Jun-2020 |
riastradh |
New permutation-based AES implementation using ARM NEON.
Also derived from Mike Hamburg's public-domain vpaes code.
|
#
1.2 |
|
29-Jun-2020 |
riastradh |
Provide hand-written AES NEON assembly for arm32.
gcc does a lousy job at compiling 128-bit NEON intrinsics on arm32; hand-writing it made it about 12x faster, by avoiding a zillion loads and stores to spill everything and the kitchen sink onto the stack. (But gcc does fine on aarch64, presumably because it has twice as many registers and doesn't have to deal with q2=d4/d5 overlapping.)
|
#
1.1 |
|
29-Jun-2020 |
riastradh |
New permutation-based AES implementation using ARM NEON.
Also derived from Mike Hamburg's public-domain vpaes code.
|