Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

switch sgimips to common bus_dma and bus_space in arch/mips/
Tested on O2 and Indy.
Things that are compile-tested only for lack of hardware:
- GIO ethernet cards with PCI bridges
- IP2x hardware not found on Indy
- IP1x

branches: 1.13.6;
Add a missing comma

make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.

branches: 1.11.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.

branches: 1.10.4; 1.10.14;
Now that GENERIC32_IPX3x builds again, fix some pci_attach_args
constification that I'd missed.

branches: 1.9.82; 1.9.88;
Generalise pci/pci_machdep.c further and move all mace-specific code into
mace/pci_mace.c in preparation for pci devices on the gio(4) bus.

branches: 1.8.6;
Switch macepci to use MI pci_configure_bus(9) rather than its own fixup code.
Tested on my O2 with several devices, and ok'ed by sekiya.

branches: 1.7.4; 1.7.6; 1.7.8; 1.7.10; 1.7.12;
merge ktrace-lwp.

branches: 1.6.12;
Use the mace interrupt handler for PCI interrupts.

From KIYOHARA Takashi

remove now unnecessary "pci_enumerate_bus" definitions

Apply a bunch of patches written by Christopher SEKIYA
(with several cosmetic changes by me) which fixes O2 (IP32) support.

Now my R5000 O2 works fine in multiuser with on-board AIC7880 SCSIs
and several PCI network cards (but only on serial console yet).
L2 cache on R5000/Rm5200 is still disabled for now, but it will be
fixed later, hopefully.

See recent discussion on port-sgimips for details.

branches: 1.3.10;
Let machine-dependent code specify how to enumerate the bus.
Currently, everyone uses pci_enumerate_bus_generic().

branches: 1.2.4; 1.2.8;
Change pci_intr_map to get interrupt source information from a "struct
pci_attach_args *" instead of from four separate parameters which in
all cases were extracted from the same "struct pci_attach_args".

This both simplifies the driver api, and allows for alternate PCI
interrupt mapping schemes, such as one using the tables described in
the Intel Multiprocessor Spec which describe interrupt wirings for
devices behind pci-pci bridges based on the device's location rather
the bridge's location.

Tested on alpha and i386; welcome to 1.5Q

branches: 1.1.4; 1.1.6;
Initial commit.