History log of /netbsd-current/sys/arch/riscv/starfive/files.starfive
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
# 1.4 27-Jul-2024 skrll

risc-v: split the jh7100 clock controller driver

In preparation for the JH7110 clock driver split the clock definition
and attachment code from the clock handling macros / methods.


Revision tags: perseant-exfatfs-base-20240630 perseant-exfatfs-base
# 1.3 07-Feb-2024 skrll

risc-v: add a driver the JH7100 pin controller


# 1.2 18-Jan-2024 skrll

risc-v: attach the Cadence XHCI usb controller on the JH7100 SoC


# 1.1 16-Jan-2024 skrll

risc-v: add a StarTech JH7100 SoC clock driver

The JH7100 is seen in the Beagle-V board.


# 1.3 07-Feb-2024 skrll

risc-v: add a driver the JH7100 pin controller


# 1.2 18-Jan-2024 skrll

risc-v: attach the Cadence XHCI usb controller on the JH7100 SoC


# 1.1 16-Jan-2024 skrll

risc-v: add a StarTech JH7100 SoC clock driver

The JH7100 is seen in the Beagle-V board.


# 1.2 18-Jan-2024 skrll

risc-v: attach the Cadence XHCI usb controller on the JH7100 SoC


# 1.1 16-Jan-2024 skrll

risc-v: add a StarTech JH7100 SoC clock driver

The JH7100 is seen in the Beagle-V board.