#
1.34 |
|
16-Feb-2022 |
riastradh |
powerpc: Sprinkle "memory" clobbers on eieio and nearby asm blocks.
Otherwise the compiler may reorder these around loads and stores, which mostly defeats the purpose. `asm volatile' just ensures the instruction isn't _deleted_; it may still move around.
|
Revision tags: thorpej-i2c-spi-conf2-base thorpej-futex2-base thorpej-cfargs2-base cjep_sun2x-base1 cjep_sun2x-base cjep_staticlib_x-base1 cjep_staticlib_x-base thorpej-i2c-spi-conf-base thorpej-cfargs-base thorpej-futex-base
|
#
1.33 |
|
23-Mar-2021 |
skrll |
KNF
|
#
1.32 |
|
22-Mar-2021 |
rin |
Brush up previous, or make things more similar to x86:
- Prevent pic_name from appearing vmstat(1) twice. - Restore "irq" in interrupt id fields of intrctl(8).
For these purposes,
- Add is_evname member to struct intr_source. - Bump size of is_source to INTRIDBUF, and rename it to is_intrid for clarity.
Now, outputs from vmstat(1) and intrctl(8) are like:
---- $ vmstat -ev ... openpic irq 39 3967 26 intr ... $ intrctl list interrupt id CPU0 device name(s) ... openpic irq 39 3967* wdc1 ... ----
|
#
1.31 |
|
06-Mar-2021 |
rin |
branches: 1.31.2; Include PIC name to interrupt source, instead of just "irq", so that it appears in "interrupt id" field of intrctl(8).
Should be useful when multiple PICs are simultaneously available as in 405EX (where uic[12] are cascaded to uic0).
|
#
1.30 |
|
02-Mar-2021 |
rin |
Turn imask into static.
XXX Other macro etc. in powerpc/intr.h should also be moved into powerpc/pic/intr.c, or protected by __INTR_PRIVATE.
|
#
1.29 |
|
06-Jul-2020 |
rin |
branches: 1.29.2; Include missing opt_ppcarch.h.
|
#
1.28 |
|
06-Jul-2020 |
rin |
Style and cosmetic changes. No binary changes intended.
|
Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base is-mlppp-base phil-wifi-20200406 ad-namecache-base3
|
#
1.27 |
|
20-Feb-2020 |
rin |
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
|
Revision tags: netbsd-9-0-RELEASE netbsd-9-0-RC2 ad-namecache-base2 ad-namecache-base1 ad-namecache-base netbsd-9-0-RC1 phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
|
#
1.26 |
|
03-Sep-2018 |
riastradh |
branches: 1.26.4; 1.26.6; Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
|
Revision tags: netbsd-8-2-RELEASE netbsd-8-1-RELEASE netbsd-8-1-RC1 pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
|
#
1.25 |
|
19-Oct-2016 |
nonaka |
branches: 1.25.14; 1.25.16; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
|
Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
|
#
1.24 |
|
26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
|
Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
|
#
1.23 |
|
31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
|
#
1.22 |
|
07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
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#
1.21 |
|
07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
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Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
|
01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
|
14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
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Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
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#
1.18 |
|
27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
|
21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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#
1.16 |
|
20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
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#
1.15 |
|
17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
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#
1.14 |
|
17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
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#
1.13 |
|
16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
|
#
1.12 |
|
16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
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Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
|
#
1.11 |
|
05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
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Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
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#
1.10 |
|
20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
|
12-May-2010 |
macallan |
make this work again
|
Revision tags: uebayasi-xip-base1
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#
1.8 |
|
24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
|
10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
|
Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
|
29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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#
1.5 |
|
08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
|
11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
|
03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
|
#
1.2 |
|
17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
|
Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
|
#
1.1 |
|
02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
|
#
1.33 |
|
23-Mar-2021 |
skrll |
KNF
|
#
1.32 |
|
22-Mar-2021 |
rin |
Brush up previous, or make things more similar to x86:
- Prevent pic_name from appearing vmstat(1) twice. - Restore "irq" in interrupt id fields of intrctl(8).
For these purposes,
- Add is_evname member to struct intr_source. - Bump size of is_source to INTRIDBUF, and rename it to is_intrid for clarity.
Now, outputs from vmstat(1) and intrctl(8) are like:
---- $ vmstat -ev ... openpic irq 39 3967 26 intr ... $ intrctl list interrupt id CPU0 device name(s) ... openpic irq 39 3967* wdc1 ... ----
|
Revision tags: thorpej-cfargs-base
|
#
1.31 |
|
06-Mar-2021 |
rin |
Include PIC name to interrupt source, instead of just "irq", so that it appears in "interrupt id" field of intrctl(8).
Should be useful when multiple PICs are simultaneously available as in 405EX (where uic[12] are cascaded to uic0).
|
#
1.30 |
|
02-Mar-2021 |
rin |
Turn imask into static.
XXX Other macro etc. in powerpc/intr.h should also be moved into powerpc/pic/intr.c, or protected by __INTR_PRIVATE.
|
Revision tags: thorpej-futex-base
|
#
1.29 |
|
06-Jul-2020 |
rin |
Include missing opt_ppcarch.h.
|
#
1.28 |
|
06-Jul-2020 |
rin |
Style and cosmetic changes. No binary changes intended.
|
Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base is-mlppp-base phil-wifi-20200406 ad-namecache-base3
|
#
1.27 |
|
20-Feb-2020 |
rin |
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
|
Revision tags: netbsd-9-0-RELEASE netbsd-9-0-RC2 ad-namecache-base2 ad-namecache-base1 ad-namecache-base netbsd-9-0-RC1 phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
|
#
1.26 |
|
03-Sep-2018 |
riastradh |
branches: 1.26.4; 1.26.6; Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
|
Revision tags: netbsd-8-2-RELEASE netbsd-8-1-RELEASE netbsd-8-1-RC1 pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
|
#
1.25 |
|
19-Oct-2016 |
nonaka |
branches: 1.25.14; 1.25.16; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
|
Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
|
#
1.24 |
|
26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
|
Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
|
31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
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#
1.22 |
|
07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
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#
1.21 |
|
07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
|
Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
|
01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
|
14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
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Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
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#
1.18 |
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27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
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21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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#
1.16 |
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20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
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#
1.15 |
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17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
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#
1.14 |
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17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
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#
1.13 |
|
16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
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#
1.12 |
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16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
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Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
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#
1.11 |
|
05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
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Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
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#
1.10 |
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20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
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12-May-2010 |
macallan |
make this work again
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Revision tags: uebayasi-xip-base1
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#
1.8 |
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24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
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10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
|
Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
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29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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#
1.5 |
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08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
|
11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
|
03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
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#
1.2 |
|
17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
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Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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#
1.1 |
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02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
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#
1.32 |
|
22-Mar-2021 |
rin |
Brush up previous, or make things more similar to x86:
- Prevent pic_name from appearing vmstat(1) twice. - Restore "irq" in interrupt id fields of intrctl(8).
For these purposes,
- Add is_evname member to struct intr_source. - Bump size of is_source to INTRIDBUF, and rename it to is_intrid for clarity.
Now, outputs from vmstat(1) and intrctl(8) are like:
---- $ vmstat -ev ... openpic irq 39 3967 26 intr ... $ intrctl list interrupt id CPU0 device name(s) ... openpic irq 39 3967* wdc1 ... ----
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Revision tags: thorpej-cfargs-base
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#
1.31 |
|
06-Mar-2021 |
rin |
Include PIC name to interrupt source, instead of just "irq", so that it appears in "interrupt id" field of intrctl(8).
Should be useful when multiple PICs are simultaneously available as in 405EX (where uic[12] are cascaded to uic0).
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#
1.30 |
|
02-Mar-2021 |
rin |
Turn imask into static.
XXX Other macro etc. in powerpc/intr.h should also be moved into powerpc/pic/intr.c, or protected by __INTR_PRIVATE.
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Revision tags: thorpej-futex-base
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#
1.29 |
|
06-Jul-2020 |
rin |
Include missing opt_ppcarch.h.
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#
1.28 |
|
06-Jul-2020 |
rin |
Style and cosmetic changes. No binary changes intended.
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Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base is-mlppp-base phil-wifi-20200406 ad-namecache-base3
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#
1.27 |
|
20-Feb-2020 |
rin |
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
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Revision tags: netbsd-9-0-RELEASE netbsd-9-0-RC2 ad-namecache-base2 ad-namecache-base1 ad-namecache-base netbsd-9-0-RC1 phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
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#
1.26 |
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03-Sep-2018 |
riastradh |
branches: 1.26.4; 1.26.6; Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
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Revision tags: netbsd-8-2-RELEASE netbsd-8-1-RELEASE netbsd-8-1-RC1 pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
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#
1.25 |
|
19-Oct-2016 |
nonaka |
branches: 1.25.14; 1.25.16; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
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Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
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#
1.24 |
|
26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
|
Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
|
31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
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#
1.22 |
|
07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
|
#
1.21 |
|
07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
|
Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
|
01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
|
14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
|
Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
|
#
1.18 |
|
27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
|
21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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#
1.16 |
|
20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
|
#
1.15 |
|
17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
|
#
1.14 |
|
17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
|
#
1.13 |
|
16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
|
#
1.12 |
|
16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
|
Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
|
#
1.11 |
|
05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
|
Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
|
#
1.10 |
|
20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
|
12-May-2010 |
macallan |
make this work again
|
Revision tags: uebayasi-xip-base1
|
#
1.8 |
|
24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
|
10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
|
Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
|
29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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#
1.5 |
|
08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
|
11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
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03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
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#
1.2 |
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17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
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Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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#
1.1 |
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02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
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#
1.31 |
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06-Mar-2021 |
rin |
Include PIC name to interrupt source, instead of just "irq", so that it appears in "interrupt id" field of intrctl(8).
Should be useful when multiple PICs are simultaneously available as in 405EX (where uic[12] are cascaded to uic0).
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#
1.30 |
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02-Mar-2021 |
rin |
Turn imask into static.
XXX Other macro etc. in powerpc/intr.h should also be moved into powerpc/pic/intr.c, or protected by __INTR_PRIVATE.
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Revision tags: thorpej-futex-base
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#
1.29 |
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06-Jul-2020 |
rin |
Include missing opt_ppcarch.h.
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#
1.28 |
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06-Jul-2020 |
rin |
Style and cosmetic changes. No binary changes intended.
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Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base is-mlppp-base phil-wifi-20200406 ad-namecache-base3
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#
1.27 |
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20-Feb-2020 |
rin |
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
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Revision tags: netbsd-9-0-RELEASE netbsd-9-0-RC2 ad-namecache-base2 ad-namecache-base1 ad-namecache-base netbsd-9-0-RC1 phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
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#
1.26 |
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03-Sep-2018 |
riastradh |
branches: 1.26.4; 1.26.6; Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
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Revision tags: netbsd-8-2-RELEASE netbsd-8-1-RELEASE netbsd-8-1-RC1 pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
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#
1.25 |
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19-Oct-2016 |
nonaka |
branches: 1.25.14; 1.25.16; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
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Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
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#
1.24 |
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26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
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Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
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31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
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#
1.22 |
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07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
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#
1.21 |
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07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
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Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
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01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
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14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
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Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
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#
1.18 |
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27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
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21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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#
1.16 |
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20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
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#
1.15 |
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17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
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#
1.14 |
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17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
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#
1.13 |
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16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
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#
1.12 |
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16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
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Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
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#
1.11 |
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05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
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Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
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#
1.10 |
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20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
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12-May-2010 |
macallan |
make this work again
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Revision tags: uebayasi-xip-base1
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#
1.8 |
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24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
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10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
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Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
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29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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#
1.5 |
|
08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
|
11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
|
03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
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#
1.2 |
|
17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
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Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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#
1.1 |
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02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
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#
1.30 |
|
02-Mar-2021 |
rin |
Turn imask into static.
XXX Other macro etc. in powerpc/intr.h should also be moved into powerpc/pic/intr.c, or protected by __INTR_PRIVATE.
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Revision tags: thorpej-futex-base
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#
1.29 |
|
06-Jul-2020 |
rin |
Include missing opt_ppcarch.h.
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#
1.28 |
|
06-Jul-2020 |
rin |
Style and cosmetic changes. No binary changes intended.
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Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base is-mlppp-base phil-wifi-20200406 ad-namecache-base3
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#
1.27 |
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20-Feb-2020 |
rin |
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
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Revision tags: netbsd-9-0-RELEASE netbsd-9-0-RC2 ad-namecache-base2 ad-namecache-base1 ad-namecache-base netbsd-9-0-RC1 phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
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#
1.26 |
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03-Sep-2018 |
riastradh |
branches: 1.26.4; 1.26.6; Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
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Revision tags: netbsd-8-2-RELEASE netbsd-8-1-RELEASE netbsd-8-1-RC1 pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
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#
1.25 |
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19-Oct-2016 |
nonaka |
branches: 1.25.14; 1.25.16; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
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Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
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#
1.24 |
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26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
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Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
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31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
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#
1.22 |
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07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
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#
1.21 |
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07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
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Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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1.20 |
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01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
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14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
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Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
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1.18 |
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27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
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21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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1.16 |
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20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
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1.15 |
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17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
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#
1.14 |
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17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
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1.13 |
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16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
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1.12 |
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16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
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Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
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1.11 |
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05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
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Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
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1.10 |
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20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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1.9 |
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12-May-2010 |
macallan |
make this work again
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Revision tags: uebayasi-xip-base1
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1.8 |
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24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
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10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
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Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
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29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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#
1.5 |
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08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
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11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
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03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
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#
1.2 |
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17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
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Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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1.1 |
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02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
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#
1.29 |
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06-Jul-2020 |
rin |
Include missing opt_ppcarch.h.
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1.28 |
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06-Jul-2020 |
rin |
Style and cosmetic changes. No binary changes intended.
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Revision tags: bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base is-mlppp-base phil-wifi-20200406 ad-namecache-base3
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#
1.27 |
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20-Feb-2020 |
rin |
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
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Revision tags: netbsd-9-0-RELEASE netbsd-9-0-RC2 ad-namecache-base2 ad-namecache-base1 ad-namecache-base netbsd-9-0-RC1 phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
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#
1.26 |
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03-Sep-2018 |
riastradh |
branches: 1.26.4; 1.26.6; Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
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Revision tags: netbsd-8-2-RELEASE netbsd-8-1-RELEASE netbsd-8-1-RC1 pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
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#
1.25 |
|
19-Oct-2016 |
nonaka |
branches: 1.25.14; 1.25.16; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
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Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
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#
1.24 |
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26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
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Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
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31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
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#
1.22 |
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07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
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#
1.21 |
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07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
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Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
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01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
|
14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
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Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
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#
1.18 |
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27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
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21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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#
1.16 |
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20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
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#
1.15 |
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17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
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#
1.14 |
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17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
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#
1.13 |
|
16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
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#
1.12 |
|
16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
|
Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
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#
1.11 |
|
05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
|
Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
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#
1.10 |
|
20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
|
12-May-2010 |
macallan |
make this work again
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Revision tags: uebayasi-xip-base1
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#
1.8 |
|
24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
|
10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
|
Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
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29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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#
1.5 |
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08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
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11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
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03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
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#
1.2 |
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17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
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Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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#
1.1 |
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02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
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#
1.27 |
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20-Feb-2020 |
rin |
eieio is implemented as sync on 40x. Therefore, "sync; eieio" and "eieio; sync" can be replaced by a single sync.
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Revision tags: netbsd-9-0-RELEASE netbsd-9-0-RC2 ad-namecache-base2 ad-namecache-base1 ad-namecache-base netbsd-9-0-RC1 phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
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#
1.26 |
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03-Sep-2018 |
riastradh |
Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
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Revision tags: netbsd-8-1-RELEASE netbsd-8-1-RC1 pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
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#
1.25 |
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19-Oct-2016 |
nonaka |
branches: 1.25.14; 1.25.16; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
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Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
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#
1.24 |
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26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
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Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
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31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
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#
1.22 |
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07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
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#
1.21 |
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07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
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Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
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01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
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14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
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Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
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#
1.18 |
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27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
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21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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#
1.16 |
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20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
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#
1.15 |
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17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
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#
1.14 |
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17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
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#
1.13 |
|
16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
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#
1.12 |
|
16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
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Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
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#
1.11 |
|
05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
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Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
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#
1.10 |
|
20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
|
12-May-2010 |
macallan |
make this work again
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Revision tags: uebayasi-xip-base1
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#
1.8 |
|
24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
|
10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
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Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
|
29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
|
Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
|
#
1.5 |
|
08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
|
Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
|
11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
|
Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
|
03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
|
Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
|
#
1.2 |
|
17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
|
Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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#
1.1 |
|
02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
|
Revision tags: isaki-audio2-base pgoyette-compat-20190127 pgoyette-compat-20190118 pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906
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#
1.26 |
|
03-Sep-2018 |
riastradh |
Rename min/max -> uimin/uimax for better honesty.
These functions are defined on unsigned int. The generic name min/max should not silently truncate to 32 bits on 64-bit systems. This is purely a name change -- no functional change intended.
HOWEVER! Some subsystems have
#define min(a, b) ((a) < (b) ? (a) : (b)) #define max(a, b) ((a) > (b) ? (a) : (b))
even though our standard name for that is MIN/MAX. Although these may invite multiple evaluation bugs, these do _not_ cause integer truncation.
To avoid `fixing' these cases, I first changed the name in libkern, and then compile-tested every file where min/max occurred in order to confirm that it failed -- and thus confirm that nothing shadowed min/max -- before changing it.
I have left a handful of bootloaders that are too annoying to compile-test, and some dead code:
cobalt ews4800mips hp300 hppa ia64 luna68k vax acorn32/if_ie.c (not included in any kernels) macppc/if_gm.c (superseded by gem(4))
It should be easy to fix the fallout once identified -- this way of doing things fails safe, and the goal here, after all, is to _avoid_ silent integer truncations, not introduce them.
Maybe one day we can reintroduce min/max as type-generic things that never silently truncate. But we should avoid doing that for a while, so that existing code has a chance to be detected by the compiler for conversion to uimin/uimax without changing the semantics until we can properly audit it all. (Who knows, maybe in some cases integer truncation is actually intended!)
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Revision tags: pgoyette-compat-0728 netbsd-8-0-RELEASE phil-wifi-base pgoyette-compat-0625 netbsd-8-0-RC2 pgoyette-compat-0521 pgoyette-compat-0502 pgoyette-compat-0422 netbsd-8-0-RC1 pgoyette-compat-0415 pgoyette-compat-0407 pgoyette-compat-0330 pgoyette-compat-0322 pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202 matt-nb8-mediatek-base nick-nhusb-base-20170825 perseant-stdc-iso10646-base netbsd-8-base prg-localcount2-base3 prg-localcount2-base2 prg-localcount2-base1 prg-localcount2-base pgoyette-localcount-20170426 bouyer-socketcan-base1 jdolecek-ncq-base pgoyette-localcount-20170320 nick-nhusb-base-20170204 bouyer-socketcan-base pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104
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#
1.25 |
|
19-Oct-2016 |
nonaka |
branches: 1.25.14; Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
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Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
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#
1.24 |
|
26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
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Revision tags: netbsd-7-2-RELEASE netbsd-7-1-2-RELEASE netbsd-7-1-1-RELEASE netbsd-7-1-RELEASE netbsd-7-1-RC2 netbsd-7-nhusb-base-20170116 netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
|
31-Aug-2012 |
macallan |
branches: 1.23.2; 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
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#
1.22 |
|
07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
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#
1.21 |
|
07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
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Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
|
01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
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#
1.19 |
|
14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
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Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
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#
1.18 |
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27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
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#
1.17 |
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21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
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#
1.16 |
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20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
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#
1.15 |
|
17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
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#
1.14 |
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17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
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#
1.13 |
|
16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
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#
1.12 |
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16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
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Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
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#
1.11 |
|
05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
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Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
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#
1.10 |
|
20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
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Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
|
12-May-2010 |
macallan |
make this work again
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Revision tags: uebayasi-xip-base1
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#
1.8 |
|
24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
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#
1.7 |
|
10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
|
Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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#
1.6 |
|
29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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#
1.5 |
|
08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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#
1.4 |
|
11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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#
1.3 |
|
03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
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#
1.2 |
|
17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
|
Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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#
1.1 |
|
02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
|
Revision tags: nick-nhusb-base-20161204 pgoyette-localcount-20161104
|
#
1.25 |
|
19-Oct-2016 |
nonaka |
Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.
|
Revision tags: nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529
|
#
1.24 |
|
26-May-2016 |
macallan |
branches: 1.24.2; treat IPIs like regular interrupts at IPL_HIGH should fix port-powerpc/44387 tested by chuq
|
Revision tags: netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 netbsd-7-0-RELEASE nick-nhusb-base-20150921 netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150606 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base rmind-smpnet-base agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6 tls-maxphys-base
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#
1.23 |
|
31-Aug-2012 |
macallan |
branches: 1.23.16; when calculating per-IPL virq masks, take into account that shared IRQs may request different IPLs fixes vr(4)-related problems seen on ofppc
|
#
1.22 |
|
07-Jun-2012 |
macallan |
fix same thinko as in previous commit, in have_pending_intr_p()
|
#
1.21 |
|
07-Jun-2012 |
macallan |
look at the right cpu_softints bits in pic_do_pending_int() so we call the right softint handlers
|
Revision tags: jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-base2 netbsd-6-base
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#
1.20 |
|
01-Feb-2012 |
matt |
branches: 1.20.2; Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.
|
#
1.19 |
|
14-Jan-2012 |
phx |
Some PICs have the capability to define the interrupt's polarity (OpenPIC for example). So the accepted interrupt types have been extended to: - IST_EDGE_FALLING (which is the same as IST_EDGE) - IST_EDGE_RISING (new) - IST_LEVEL_LOW (is the same as IST_LEVEL) - IST_LEVEL_HIGH (new) Old code will continue to work without modification.
|
Revision tags: jmcneill-usbmp-pre-base2 jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base
|
#
1.18 |
|
27-Sep-2011 |
jym |
branches: 1.18.2; 1.18.6; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
#
1.17 |
|
21-Jun-2011 |
rjs |
Make it compile when PIC_DEBUG is defined.
|
#
1.16 |
|
20-Jun-2011 |
matt |
Cleanup includes. Explicitly include <powerpc/psl.h>
|
#
1.15 |
|
17-Jun-2011 |
matt |
intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).
|
#
1.14 |
|
17-Jun-2011 |
matt |
Change from level to ipl since we aren't dealing a mask anymore, just a simple value. Fix intr_calculatemasks to deal with ipl isn't a mask. Let establish and disestablish determine the highest ipl for the interrut source being modified. No reason to recompute that for every source when only one changes at a time. Only change idepth while in the loop.
|
#
1.13 |
|
16-Jun-2011 |
matt |
Make sure OEA ports without __HAVE_FAST_SOFTINTS still compile.
|
#
1.12 |
|
16-Jun-2011 |
macallan |
enable FAST_SOFTINTR support for all ports that use powerpc/pic/ This has been successfully tested on macppc TODO: - ibm4xx needs to be adapted - SMP doesn't work yet, 2nd CPU crashes when trying to leave the idle loop
|
Revision tags: rmind-uvmplock-nbase rmind-uvmplock-base
|
#
1.11 |
|
05-Jun-2011 |
matt |
Remove <machine/atomic.h>; use <sys/atomic.h> instead. Add <powerpc/cpuset.h> (for mpc85xx pmap). Add some initial MP code for mpc85xx Rework ipi code to be common across all ppcs Change PPC to keep curlwp in %r13 while in the kernel. Move astpending from cpu_info to mdlwp Improve cpu_need_resched to be more MP friendly.
|
Revision tags: cherry-xenmp-base jym-xensuspend-nbase uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jruoho-x86intr-base matt-mips64-premerge-20101231 jym-xensuspend-base
|
#
1.10 |
|
20-Dec-2010 |
matt |
branches: 1.10.2; 1.10.6; Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
|
Revision tags: uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11 uebayasi-xip-base2 yamt-nfs-mp-base10
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#
1.9 |
|
12-May-2010 |
macallan |
make this work again
|
Revision tags: uebayasi-xip-base1
|
#
1.8 |
|
24-Apr-2010 |
kiyohara |
Support 64-bit imask for powerpc/pic.
|
#
1.7 |
|
10-Mar-2010 |
kiyohara |
branches: 1.7.2; Remove white-spaces.
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Revision tags: netbsd-5-2-3-RELEASE netbsd-5-1-5-RELEASE netbsd-5-2-2-RELEASE netbsd-5-1-4-RELEASE netbsd-5-2-1-RELEASE netbsd-5-1-3-RELEASE netbsd-5-2-RELEASE netbsd-5-2-RC1 netbsd-5-1-2-RELEASE netbsd-5-1-1-RELEASE matt-nb5-mips64-premerge-20101231 matt-nb5-pq3-base netbsd-5-1-RELEASE netbsd-5-1-RC4 matt-nb5-mips64-k15 netbsd-5-1-RC3 netbsd-5-1-RC2 netbsd-5-1-RC1 yamt-nfs-mp-base9 uebayasi-xip-base netbsd-5-0-2-RELEASE matt-nb5-mips64-premerge-20091211 matt-premerge-20091211 yamt-nfs-mp-base8 matt-nb5-mips64-u2-k2-k4-k7-k8-k9 matt-nb4-mips64-k7-u2a-k9b matt-nb5-mips64-u1-k1-k5 yamt-nfs-mp-base7 netbsd-5-0-1-RELEASE jymxensuspend-base yamt-nfs-mp-base6 yamt-nfs-mp-base5 yamt-nfs-mp-base4 yamt-nfs-mp-base3 nick-hppapmap-base4 nick-hppapmap-base3 netbsd-5-0-RELEASE netbsd-5-0-RC4 netbsd-5-0-RC3 nick-hppapmap-base2 netbsd-5-0-RC2 netbsd-5-0-RC1 haad-dm-base2 haad-nbase2 ad-audiomp2-base netbsd-5-base nick-hppapmap-base matt-mips64-base2 haad-dm-base1 wrstuden-revivesa-base-4 wrstuden-revivesa-base-3 wrstuden-revivesa-base-2 haad-dm-base wrstuden-revivesa-base-1 simonb-wapbl-nbase yamt-pf42-base4 simonb-wapbl-base yamt-pf42-base3 hpcarm-cleanup-nbase yamt-pf42-base2 yamt-nfs-mp-base2 wrstuden-revivesa-base mjf-devfs2-base
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1.6 |
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29-Apr-2008 |
martin |
branches: 1.6.20; Convert to new 2 clause license
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Revision tags: yamt-pf42-baseX yamt-nfs-mp-base yamt-pf42-base
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1.5 |
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08-Apr-2008 |
garbled |
branches: 1.5.2; 1.5.4; SMP support for ofppc. (finally) Much thanks to Matt Thomas for help in figuring out all the crazy nuances of getting this working, and to Michael Lorenz for testing/fixing my changes on macppc. Tested with a quad-proc 7044-270. Summary of changes:
Bumped CPU_MAXNUM to 16 on ofppc. Added md_* routines to ofppc/cpu.c, to sync the timebase, and awaken the CPUs. Fixed a bug in the test for a 64bit bridge cpu early in locore.S Added code to set the interrupt priority for all CPUs with an openpic. Change rtas to probe before cpus, to allow use of the rtas freeze/thaw timebase code routines. Fix CPU_INFO_FOREACH macro to iterate through detected cpus, not CPU_MAXNUM. Change most uses of ci_cpuid to ci_index, to deal with CPUs that do not allow writing to SPR_PIR. Don't write SPR_PIR unless the secondary cpu identifies itself as 0. Change the hatchstack/interrupt stack allocations to allocate a 8192byte interrupt stack, and a 4096 byte hatch stack, align them to 16 bytes, and allocate them no lower than 0x10000. Allocate them separately to prevent the hatch stack corrupting the interrupt stack later on. If the CPU is a 64bit cpu, copy SPR_ASR in cpu_hatch() Set the idle stack to ci->ci_data.cpu_idlelwp->l_addr->u_pcb.pcb_sp. Add OF_start_cpu(). Add a routine to ofwoea_initppc to spin up secondary procs early, and place them into a spinloop waiting for the hatch routines to be ready. Modify the ipi routines to deal with openpics that reverse byte order on read from an ipi register. (such as on the 7044) Change the rtas setup to allocate the rtas physical base address above the kernel, to avoid mucking up the hatch/interrupt stacks.
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Revision tags: ad-socklock-base1 yamt-lazymbuf-base15 yamt-lazymbuf-base14 keiichi-mipv6-nbase nick-net80211-sync-base keiichi-mipv6-base vmlocking2-base3 bouyer-xeni386-nbase yamt-kmem-base3 cube-autoconf-base bouyer-xeni386-base matt-armv6-nbase matt-armv6-base mjf-devfs-base hpcarm-cleanup-base
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1.4 |
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11-Dec-2007 |
garbled |
branches: 1.4.8; Fix the endless stream of 7's problem on i8259-like interrupt controllers once and for all. The i8259 does not like to be read in a loop, when an interrupt comes in, it will return a valid value, however, if you keep reading it until there are no outstanding interrupts, it will return 7 (which is the lpt interrupt). Change the pic handler to give an argument to the get_irq functions of mode, which indicates if this is the first time we are asking, or if we are just rechecking in a loop. Non-i8259 handlers can safely ignore this argument.
Tested to fix the stream of 7's problem on prep and ofppc. Got rid of the nasty hack in ofppc with this too, and the prep machine seems to take less interrupts now, which is a good thing.
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Revision tags: yamt-kmem-base2 yamt-kmem-base vmlocking2-base2 reinoud-bufcleanup-nbase reinoud-bufcleanup-base vmlocking2-base1 vmlocking-nbase jmcneill-pm-base
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1.3 |
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03-Dec-2007 |
ad |
branches: 1.3.2; 1.3.4; 1.3.6; Interrupt handling changes, in discussion since February:
- Reduce available SPL levels for hardware devices to none, vm, sched, high. - Acquire kernel_lock only for interrupts at IPL_VM. - Implement threaded soft interrupts.
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Revision tags: jmcneill-base bouyer-xenamd64-base2 yamt-x86pmap-base4 bouyer-xenamd64-base
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1.2 |
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17-Oct-2007 |
garbled |
branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA cpu based PPC ports that focused on sharing as much code as possible between the various ports to eliminate near-identical copies of files in every tree. Additionally there is a new PIC system that unifies the interface to interrupt code for all different OEA ppc arches. The work for this branch was done by a variety of people, too long to list here.
TODO: bebox still needs work to complete the transition to -renovation. ofppc still needs a bunch of work, which I will be looking at. ev64260 still needs to be renovated amigappc was not attempted.
NOTES: pmppc was removed as an arch, and moved to a evbppc target.
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Revision tags: yamt-x86pmap-base3 yamt-x86pmap-base2 yamt-x86pmap-base mjf-ufs-trans-base vmlocking-base ppcoea-renovation-base yamt-idlelwp-base8
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1.1 |
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02-May-2007 |
macallan |
branches: 1.1.2; 1.1.6; 1.1.8; file intr.c was initially added on branch ppcoea-renovation.
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