| #
1.5 |
|
11-Nov-2022 |
jmcneill |
Support PCAL clock control
|
| #
1.4 |
|
05-Nov-2022 |
jmcneill |
Add I2C clocks
|
| #
1.3 |
|
26-Oct-2022 |
jmcneill |
Since this node is a child of a syscon, the reg property doesn't fully
describe the device physical address. Use syscon accessors to read/write
clock registers instead.
|
| #
1.2 |
|
26-Oct-2022 |
jmcneill |
Use generic Arasan SDHCI driver for Zynq-7000.
|
| #
1.1 |
|
25-Oct-2022 |
jmcneill |
Add basic Zynq-7000 PS clock subsystem driver.
PR# kern/57068
|
| #
1.4 |
|
05-Nov-2022 |
jmcneill |
Add I2C clocks
|
| #
1.3 |
|
26-Oct-2022 |
jmcneill |
Since this node is a child of a syscon, the reg property doesn't fully
describe the device physical address. Use syscon accessors to read/write
clock registers instead.
|
| #
1.2 |
|
26-Oct-2022 |
jmcneill |
Use generic Arasan SDHCI driver for Zynq-7000.
|
| #
1.1 |
|
25-Oct-2022 |
jmcneill |
Add basic Zynq-7000 PS clock subsystem driver.
PR# kern/57068
|