#
1.23 |
|
07-Nov-2021 |
jmcneill |
sunxi: ccu: add support for basic "mux" clocks
|
Revision tags: thorpej-i2c-spi-conf2-base thorpej-futex2-base thorpej-cfargs2-base cjep_sun2x-base1 cjep_sun2x-base cjep_staticlib_x-base1 cjep_staticlib_x-base thorpej-i2c-spi-conf-base thorpej-cfargs-base thorpej-futex-base bouyer-xenpvh-base2 phil-wifi-20200421 bouyer-xenpvh-base1 phil-wifi-20200411 bouyer-xenpvh-base is-mlppp-base phil-wifi-20200406 ad-namecache-base3 ad-namecache-base2 ad-namecache-base1 ad-namecache-base
|
#
1.22 |
|
23-Nov-2019 |
jakllsch |
Store the flags passed to SUNXI_CCU_FRACTIONAL macro.
Previously the macro dropped the flags argument entirely, and did not initialize the structure with it.
|
Revision tags: phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base
|
#
1.21 |
|
30-Jan-2019 |
jmcneill |
branches: 1.21.4; Add support for Allwinner A64's display pipeline.
|
Revision tags: pgoyette-compat-20190127
|
#
1.20 |
|
22-Jan-2019 |
jmcneill |
Add sun50i DE clocks.
|
Revision tags: pgoyette-compat-20190118
|
#
1.19 |
|
02-Jan-2019 |
jmcneill |
Add support for cluster 0 and 1 CPUX PLLs.
|
Revision tags: pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906 pgoyette-compat-0728 phil-wifi-base pgoyette-compat-0625 pgoyette-compat-0521
|
#
1.18 |
|
08-May-2018 |
jmcneill |
branches: 1.18.2; Pass set_rate calls on fixed factor clocks through to the parent clock (adjusting accordingly)
|
Revision tags: pgoyette-compat-0502 pgoyette-compat-0422 pgoyette-compat-0415 pgoyette-compat-0407
|
#
1.17 |
|
01-Apr-2018 |
bouyer |
Add a round_rate() callback for the sunxi clock domain. Add a sunxi_ccu_display.c file with helpers for setting up display engine clocks. for fractional clocks, rename frac_en to div_en, I got the logic inverted. Adjust tcon0-ch0, tcon0-ch1, tcon1-ch0 and tcon1-ch1 definitions to automatically select a parent. tcon0 hardcoded to pll3 and tcon1 to pll7. Define a round_rate() callback for these clocks, as well as fractional clocks. Hardcode debe clocks parent to pll5.
|
Revision tags: pgoyette-compat-0330 pgoyette-compat-0322
|
#
1.16 |
|
19-Mar-2018 |
bouyer |
Add some more A10/A20 clocks definitions; related to display engines. The video PLLs requires a new clock type, SUNXI_CCU_FRACTIONAL
|
Revision tags: pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202
|
#
1.15 |
|
28-Oct-2017 |
jmcneill |
branches: 1.15.2; 1.15.4; Add support for A83T eMMC.
|
#
1.14 |
|
09-Oct-2017 |
jmcneill |
Add A10/A20 cpufreq scaling support
|
#
1.13 |
|
06-Oct-2017 |
jmcneill |
Add driver for sun4i (A10) and sun7i (A20) clock controller.
|
#
1.12 |
|
05-Oct-2017 |
jmcneill |
Add support for gated dividers and /1,/2,/4,/6 style divider fields.
|
#
1.11 |
|
30-Sep-2017 |
jmcneill |
Add support for Allwinner H3 PRCM clock controller.
|
Revision tags: nick-nhusb-base-20170825
|
#
1.10 |
|
25-Aug-2017 |
jmcneill |
branches: 1.10.2; Add initial support for Allwinner A13 and R8 SoCs.
|
#
1.9 |
|
13-Aug-2017 |
jmcneill |
Add support for H3 CPUX clock.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.2; 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.22 |
|
23-Nov-2019 |
jakllsch |
Store the flags passed to SUNXI_CCU_FRACTIONAL macro.
Previously the macro dropped the flags argument entirely, and did not initialize the structure with it.
|
Revision tags: phil-wifi-20191119 netbsd-9-base phil-wifi-20190609 isaki-audio2-base
|
#
1.21 |
|
30-Jan-2019 |
jmcneill |
Add support for Allwinner A64's display pipeline.
|
Revision tags: pgoyette-compat-20190127
|
#
1.20 |
|
22-Jan-2019 |
jmcneill |
Add sun50i DE clocks.
|
Revision tags: pgoyette-compat-20190118
|
#
1.19 |
|
02-Jan-2019 |
jmcneill |
Add support for cluster 0 and 1 CPUX PLLs.
|
Revision tags: pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906 pgoyette-compat-0728 phil-wifi-base pgoyette-compat-0625 pgoyette-compat-0521
|
#
1.18 |
|
08-May-2018 |
jmcneill |
branches: 1.18.2; Pass set_rate calls on fixed factor clocks through to the parent clock (adjusting accordingly)
|
Revision tags: pgoyette-compat-0502 pgoyette-compat-0422 pgoyette-compat-0415 pgoyette-compat-0407
|
#
1.17 |
|
01-Apr-2018 |
bouyer |
Add a round_rate() callback for the sunxi clock domain. Add a sunxi_ccu_display.c file with helpers for setting up display engine clocks. for fractional clocks, rename frac_en to div_en, I got the logic inverted. Adjust tcon0-ch0, tcon0-ch1, tcon1-ch0 and tcon1-ch1 definitions to automatically select a parent. tcon0 hardcoded to pll3 and tcon1 to pll7. Define a round_rate() callback for these clocks, as well as fractional clocks. Hardcode debe clocks parent to pll5.
|
Revision tags: pgoyette-compat-0330 pgoyette-compat-0322
|
#
1.16 |
|
19-Mar-2018 |
bouyer |
Add some more A10/A20 clocks definitions; related to display engines. The video PLLs requires a new clock type, SUNXI_CCU_FRACTIONAL
|
Revision tags: pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202
|
#
1.15 |
|
28-Oct-2017 |
jmcneill |
branches: 1.15.2; 1.15.4; Add support for A83T eMMC.
|
#
1.14 |
|
09-Oct-2017 |
jmcneill |
Add A10/A20 cpufreq scaling support
|
#
1.13 |
|
06-Oct-2017 |
jmcneill |
Add driver for sun4i (A10) and sun7i (A20) clock controller.
|
#
1.12 |
|
05-Oct-2017 |
jmcneill |
Add support for gated dividers and /1,/2,/4,/6 style divider fields.
|
#
1.11 |
|
30-Sep-2017 |
jmcneill |
Add support for Allwinner H3 PRCM clock controller.
|
Revision tags: nick-nhusb-base-20170825
|
#
1.10 |
|
25-Aug-2017 |
jmcneill |
branches: 1.10.2; Add initial support for Allwinner A13 and R8 SoCs.
|
#
1.9 |
|
13-Aug-2017 |
jmcneill |
Add support for H3 CPUX clock.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.2; 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
Revision tags: isaki-audio2-base
|
#
1.21 |
|
30-Jan-2019 |
jmcneill |
Add support for Allwinner A64's display pipeline.
|
Revision tags: pgoyette-compat-20190127
|
#
1.20 |
|
22-Jan-2019 |
jmcneill |
Add sun50i DE clocks.
|
Revision tags: pgoyette-compat-20190118
|
#
1.19 |
|
02-Jan-2019 |
jmcneill |
Add support for cluster 0 and 1 CPUX PLLs.
|
Revision tags: pgoyette-compat-1226 pgoyette-compat-1126 pgoyette-compat-1020 pgoyette-compat-0930 pgoyette-compat-0906 pgoyette-compat-0728 phil-wifi-base pgoyette-compat-0625 pgoyette-compat-0521
|
#
1.18 |
|
08-May-2018 |
jmcneill |
Pass set_rate calls on fixed factor clocks through to the parent clock (adjusting accordingly)
|
Revision tags: pgoyette-compat-0502 pgoyette-compat-0422 pgoyette-compat-0415 pgoyette-compat-0407
|
#
1.17 |
|
01-Apr-2018 |
bouyer |
Add a round_rate() callback for the sunxi clock domain. Add a sunxi_ccu_display.c file with helpers for setting up display engine clocks. for fractional clocks, rename frac_en to div_en, I got the logic inverted. Adjust tcon0-ch0, tcon0-ch1, tcon1-ch0 and tcon1-ch1 definitions to automatically select a parent. tcon0 hardcoded to pll3 and tcon1 to pll7. Define a round_rate() callback for these clocks, as well as fractional clocks. Hardcode debe clocks parent to pll5.
|
Revision tags: pgoyette-compat-0330 pgoyette-compat-0322
|
#
1.16 |
|
19-Mar-2018 |
bouyer |
Add some more A10/A20 clocks definitions; related to display engines. The video PLLs requires a new clock type, SUNXI_CCU_FRACTIONAL
|
Revision tags: pgoyette-compat-0315 pgoyette-compat-base tls-maxphys-base-20171202
|
#
1.15 |
|
28-Oct-2017 |
jmcneill |
branches: 1.15.2; 1.15.4; Add support for A83T eMMC.
|
#
1.14 |
|
09-Oct-2017 |
jmcneill |
Add A10/A20 cpufreq scaling support
|
#
1.13 |
|
06-Oct-2017 |
jmcneill |
Add driver for sun4i (A10) and sun7i (A20) clock controller.
|
#
1.12 |
|
05-Oct-2017 |
jmcneill |
Add support for gated dividers and /1,/2,/4,/6 style divider fields.
|
#
1.11 |
|
30-Sep-2017 |
jmcneill |
Add support for Allwinner H3 PRCM clock controller.
|
Revision tags: nick-nhusb-base-20170825
|
#
1.10 |
|
25-Aug-2017 |
jmcneill |
branches: 1.10.2; Add initial support for Allwinner A13 and R8 SoCs.
|
#
1.9 |
|
13-Aug-2017 |
jmcneill |
Add support for H3 CPUX clock.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.2; 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.15 |
|
28-Oct-2017 |
jmcneill |
Add support for A83T eMMC.
|
#
1.14 |
|
09-Oct-2017 |
jmcneill |
Add A10/A20 cpufreq scaling support
|
#
1.13 |
|
06-Oct-2017 |
jmcneill |
Add driver for sun4i (A10) and sun7i (A20) clock controller.
|
#
1.12 |
|
05-Oct-2017 |
jmcneill |
Add support for gated dividers and /1,/2,/4,/6 style divider fields.
|
#
1.11 |
|
30-Sep-2017 |
jmcneill |
Add support for Allwinner H3 PRCM clock controller.
|
Revision tags: nick-nhusb-base-20170825
|
#
1.10 |
|
25-Aug-2017 |
jmcneill |
branches: 1.10.2; Add initial support for Allwinner A13 and R8 SoCs.
|
#
1.9 |
|
13-Aug-2017 |
jmcneill |
Add support for H3 CPUX clock.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.2; 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.14 |
|
09-Oct-2017 |
jmcneill |
Add A10/A20 cpufreq scaling support
|
#
1.13 |
|
06-Oct-2017 |
jmcneill |
Add driver for sun4i (A10) and sun7i (A20) clock controller.
|
#
1.12 |
|
05-Oct-2017 |
jmcneill |
Add support for gated dividers and /1,/2,/4,/6 style divider fields.
|
#
1.11 |
|
30-Sep-2017 |
jmcneill |
Add support for Allwinner H3 PRCM clock controller.
|
Revision tags: nick-nhusb-base-20170825
|
#
1.10 |
|
25-Aug-2017 |
jmcneill |
branches: 1.10.2; Add initial support for Allwinner A13 and R8 SoCs.
|
#
1.9 |
|
13-Aug-2017 |
jmcneill |
Add support for H3 CPUX clock.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.2; 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.10 |
|
25-Aug-2017 |
jmcneill |
Add initial support for Allwinner A13 and R8 SoCs.
|
#
1.9 |
|
13-Aug-2017 |
jmcneill |
Add support for H3 CPUX clock.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.2; 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.9 |
|
13-Aug-2017 |
jmcneill |
Add support for H3 CPUX clock.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.8 |
|
06-Aug-2017 |
jmcneill |
Add support for H3 audio PLL and digital audio part.
|
Revision tags: perseant-stdc-iso10646-base
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
branches: 1.7.4; Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.7 |
|
17-Jul-2017 |
jmcneill |
Add SDMMC[012] sample/output clock phase controls.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.6 |
|
06-Jul-2017 |
jmcneill |
Add support for Allwinner A83T SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.5 |
|
02-Jul-2017 |
jmcneill |
Add basic support for Allwinner A31.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.4 |
|
29-Jun-2017 |
jmcneill |
Add USB stuff. Doesn't quite work yet.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
|
29-Jun-2017 |
jmcneill |
Add H3 MMC support
|
#
1.1 |
|
28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
|
#
1.3 |
|
29-Jun-2017 |
jmcneill |
SD/MMC clock fixes
|
#
1.2 |
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29-Jun-2017 |
jmcneill |
Add H3 MMC support
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#
1.1 |
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28-Jun-2017 |
jmcneill |
Add initial support for Allwinner H3 SoC.
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