s/existance/existence/ in comment.

Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.

The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.

Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.

The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.

gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.

Tested on RPI3, Apple M1, QEMU, and lx2k

Fixes PR port-arm/56264:
diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3

KNF a comment

Trailing whitespace

branches: 1.12.64;
Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.11.4; 1.11.12; 1.11.18;
VFP support.

branches: 1.10.50; 1.10.52; 1.10.72; 1.10.76;
merge ktrace-lwp.

branches: 1.9.12;
Convert the coprocessor defines into an enum to avoid excessive
preprocessor hackery. If supporting Thumb add an 18th undefined
handler for undefined instruction traps taken in Thumb state. Kill
MAX_COPROCS and use NUM_UNKNOWN_HANDLERS instead.

Add support for breakpoints set in Thumb code and hand them off to
GDB as required.

Bah! Fix tyop CORE_UNKOWN_HANDLER -> CORE_UNKNOWN_HANDLER

Add SYSTEM_COPROC (cp15).

FP_COPROC* ->FPA_COPROC*

Don't overload the unknown instruction handling for the core onto CP0.
Instead, add a seventeenth 'co-processor' specifically for the core.
Add support for ARMv5 unknown instructions in the 'NV' space.

branches: 1.4.18;
* Share a common vector page between arm26 and arm32.
* Use a common set of exception handlers for all arm32 platforms.
* New FIQ framework based on discussions with Ben Harris, shared
between arm26 and arm32.

Add prototypes for undefinedinstruction() and resethandler().

branches: 1.2.2; 1.2.4; 1.2.10;
Change undefined instruction handler to use a linked list for each
co-processor. This is necessary so we can have several handlers for
CP0 (used as a catch-all for non-CP instructions).

Handlers are now removed using remove_coproc_handler(), rather than by calling
install_coproc_handler() with a NULL handler.

Because install_coproc_handler() can now allocate memory, there's a version
for use at boot time that doesn't.

branches: 1.1.2;
Big patch for merging common include files of the new hpcarm tree and the old arm32
tree into the new arm substree. All moved files are relinked with a stub that included
the file from the new location; this might be done better later.

Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.

The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.

Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.

The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.

gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.

Tested on RPI3, Apple M1, QEMU, and lx2k

Fixes PR port-arm/56264:
diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3

KNF a comment

Trailing whitespace

branches: 1.12.64;
Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.11.4; 1.11.12; 1.11.18;
VFP support.

branches: 1.10.50; 1.10.52; 1.10.72; 1.10.76;
merge ktrace-lwp.

branches: 1.9.12;
Convert the coprocessor defines into an enum to avoid excessive
preprocessor hackery. If supporting Thumb add an 18th undefined
handler for undefined instruction traps taken in Thumb state. Kill
MAX_COPROCS and use NUM_UNKNOWN_HANDLERS instead.

Add support for breakpoints set in Thumb code and hand them off to
GDB as required.

Bah! Fix tyop CORE_UNKOWN_HANDLER -> CORE_UNKNOWN_HANDLER

Add SYSTEM_COPROC (cp15).

FP_COPROC* ->FPA_COPROC*

Don't overload the unknown instruction handling for the core onto CP0.
Instead, add a seventeenth 'co-processor' specifically for the core.
Add support for ARMv5 unknown instructions in the 'NV' space.

branches: 1.4.18;
* Share a common vector page between arm26 and arm32.
* Use a common set of exception handlers for all arm32 platforms.
* New FIQ framework based on discussions with Ben Harris, shared
between arm26 and arm32.

Add prototypes for undefinedinstruction() and resethandler().

branches: 1.2.2; 1.2.4; 1.2.10;
Change undefined instruction handler to use a linked list for each
co-processor. This is necessary so we can have several handlers for
CP0 (used as a catch-all for non-CP instructions).

Handlers are now removed using remove_coproc_handler(), rather than by calling
install_coproc_handler() with a NULL handler.

Because install_coproc_handler() can now allocate memory, there's a version
for use at boot time that doesn't.

branches: 1.1.2;
Big patch for merging common include files of the new hpcarm tree and the old arm32
tree into the new arm substree. All moved files are relinked with a stub that included
the file from the new location; this might be done better later.

KNF a comment

Trailing whitespace

branches: 1.12.64;
Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.11.4; 1.11.12; 1.11.18;
VFP support.

branches: 1.10.50; 1.10.52; 1.10.72; 1.10.76;
merge ktrace-lwp.

branches: 1.9.12;
Convert the coprocessor defines into an enum to avoid excessive
preprocessor hackery. If supporting Thumb add an 18th undefined
handler for undefined instruction traps taken in Thumb state. Kill
MAX_COPROCS and use NUM_UNKNOWN_HANDLERS instead.

Add support for breakpoints set in Thumb code and hand them off to
GDB as required.

Bah! Fix tyop CORE_UNKOWN_HANDLER -> CORE_UNKNOWN_HANDLER

Add SYSTEM_COPROC (cp15).

FP_COPROC* ->FPA_COPROC*

Don't overload the unknown instruction handling for the core onto CP0.
Instead, add a seventeenth 'co-processor' specifically for the core.
Add support for ARMv5 unknown instructions in the 'NV' space.

branches: 1.4.18;
* Share a common vector page between arm26 and arm32.
* Use a common set of exception handlers for all arm32 platforms.
* New FIQ framework based on discussions with Ben Harris, shared
between arm26 and arm32.

Add prototypes for undefinedinstruction() and resethandler().

branches: 1.2.2; 1.2.4; 1.2.10;
Change undefined instruction handler to use a linked list for each
co-processor. This is necessary so we can have several handlers for
CP0 (used as a catch-all for non-CP instructions).

Handlers are now removed using remove_coproc_handler(), rather than by calling
install_coproc_handler() with a NULL handler.

Because install_coproc_handler() can now allocate memory, there's a version
for use at boot time that doesn't.

branches: 1.1.2;
Big patch for merging common include files of the new hpcarm tree and the old arm32
tree into the new arm substree. All moved files are relinked with a stub that included
the file from the new location; this might be done better later.

Trailing whitespace

Remove all the __P() from sys (excluding sys/dist)
Diff checked with grep and MK1 eyeball.
i386 and amd64 GENERIC and sys still build.

branches: 1.11.4; 1.11.12; 1.11.18;
VFP support.

branches: 1.10.50; 1.10.52; 1.10.72; 1.10.76;
merge ktrace-lwp.

branches: 1.9.12;
Convert the coprocessor defines into an enum to avoid excessive
preprocessor hackery. If supporting Thumb add an 18th undefined
handler for undefined instruction traps taken in Thumb state. Kill
MAX_COPROCS and use NUM_UNKNOWN_HANDLERS instead.

Add support for breakpoints set in Thumb code and hand them off to
GDB as required.

Bah! Fix tyop CORE_UNKOWN_HANDLER -> CORE_UNKNOWN_HANDLER

Add SYSTEM_COPROC (cp15).

FP_COPROC* ->FPA_COPROC*

Don't overload the unknown instruction handling for the core onto CP0.
Instead, add a seventeenth 'co-processor' specifically for the core.
Add support for ARMv5 unknown instructions in the 'NV' space.

branches: 1.4.18;
* Share a common vector page between arm26 and arm32.
* Use a common set of exception handlers for all arm32 platforms.
* New FIQ framework based on discussions with Ben Harris, shared
between arm26 and arm32.

Add prototypes for undefinedinstruction() and resethandler().

branches: 1.2.2; 1.2.4; 1.2.10;
Change undefined instruction handler to use a linked list for each
co-processor. This is necessary so we can have several handlers for
CP0 (used as a catch-all for non-CP instructions).

Handlers are now removed using remove_coproc_handler(), rather than by calling
install_coproc_handler() with a NULL handler.

Because install_coproc_handler() can now allocate memory, there's a version
for use at boot time that doesn't.

branches: 1.1.2;
Big patch for merging common include files of the new hpcarm tree and the old arm32
tree into the new arm substree. All moved files are relinked with a stub that included
the file from the new location; this might be done better later.