Remove unnecessary <sys/malloc.h>.

Merge thorpej-cfargs2.

branches: 1.29.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.28.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.25.2; 1.25.6;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

Major update of algor.
Now uses generic mips bus_space.h bus_dma.h isa_machdep.h pci_machdep.h
Now uses evbmips versions of cpu.c isadma_bounce.c mcclock_isa.c

#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t, struct cfdata * -> cfdata_t
CFATTACH_DECL(*, sizeof(struct device), -> CFATTACH_DECL_NEW(&, 0

branches: 1.21.2;
Merge forward from matt-nb5-mips64.
Adapt to new interrupt/spl framework.

branches: 1.20.18; 1.20.22; 1.20.28; 1.20.30;
Remove clause 3 and 4 from TNF licenses

branches: 1.19.74; 1.19.76; 1.19.78;
merge ktrace-lwp.

s/locdesc_t/int/g

branches: 1.17.2;
adaptions to config_search() change, and minor autoconf fixes, mostly from Havard Eidnes

kill questionable uses of config(8) generated xxxlocnames[]
locator information does belong elsewhere and definitely shouldn't
be in the global namespace

convert remaining autoconf bus "submatch" functions to use the new
signature (passing locators), and remove some which obviously don't
serve any purpose
(untested, sorry)

add __KERNEL_RCSID()

branches: 1.13.2;
Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.

Fix a typo.

Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register. This should be the
size of the largest D-cache line on a system.

branches: 1.6.2;
Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

branches: 1.5.2;
Fix a tyop in a comment.

If PCI_NETBSD_ENABLE_IDE is set, enable the PIIX{3,4} southbridge
IDE channels on the P-5064 and P-6032, since PMON doesn't do it
for us (thus causing the `pciide' driver to ignore them).

branches: 1.3.2;
Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.

Merge thorpej-cfargs2.

branches: 1.29.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.28.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.25.2; 1.25.6;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

Major update of algor.
Now uses generic mips bus_space.h bus_dma.h isa_machdep.h pci_machdep.h
Now uses evbmips versions of cpu.c isadma_bounce.c mcclock_isa.c

#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t, struct cfdata * -> cfdata_t
CFATTACH_DECL(*, sizeof(struct device), -> CFATTACH_DECL_NEW(&, 0

branches: 1.21.2;
Merge forward from matt-nb5-mips64.
Adapt to new interrupt/spl framework.

branches: 1.20.18; 1.20.22; 1.20.28; 1.20.30;
Remove clause 3 and 4 from TNF licenses

branches: 1.19.74; 1.19.76; 1.19.78;
merge ktrace-lwp.

s/locdesc_t/int/g

branches: 1.17.2;
adaptions to config_search() change, and minor autoconf fixes, mostly from Havard Eidnes

kill questionable uses of config(8) generated xxxlocnames[]
locator information does belong elsewhere and definitely shouldn't
be in the global namespace

convert remaining autoconf bus "submatch" functions to use the new
signature (passing locators), and remove some which obviously don't
serve any purpose
(untested, sorry)

add __KERNEL_RCSID()

branches: 1.13.2;
Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.

Fix a typo.

Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register. This should be the
size of the largest D-cache line on a system.

branches: 1.6.2;
Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

branches: 1.5.2;
Fix a tyop in a comment.

If PCI_NETBSD_ENABLE_IDE is set, enable the PIIX{3,4} southbridge
IDE channels on the P-5064 and P-6032, since PMON doesn't do it
for us (thus causing the `pciide' driver to ignore them).

branches: 1.3.2;
Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.

Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.28.4;
Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.25.2; 1.25.6;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

Major update of algor.
Now uses generic mips bus_space.h bus_dma.h isa_machdep.h pci_machdep.h
Now uses evbmips versions of cpu.c isadma_bounce.c mcclock_isa.c

#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t, struct cfdata * -> cfdata_t
CFATTACH_DECL(*, sizeof(struct device), -> CFATTACH_DECL_NEW(&, 0

branches: 1.21.2;
Merge forward from matt-nb5-mips64.
Adapt to new interrupt/spl framework.

branches: 1.20.18; 1.20.22; 1.20.28; 1.20.30;
Remove clause 3 and 4 from TNF licenses

branches: 1.19.74; 1.19.76; 1.19.78;
merge ktrace-lwp.

s/locdesc_t/int/g

branches: 1.17.2;
adaptions to config_search() change, and minor autoconf fixes, mostly from Havard Eidnes

kill questionable uses of config(8) generated xxxlocnames[]
locator information does belong elsewhere and definitely shouldn't
be in the global namespace

convert remaining autoconf bus "submatch" functions to use the new
signature (passing locators), and remove some which obviously don't
serve any purpose
(untested, sorry)

add __KERNEL_RCSID()

branches: 1.13.2;
Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.

Fix a typo.

Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register. This should be the
size of the largest D-cache line on a system.

branches: 1.6.2;
Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

branches: 1.5.2;
Fix a tyop in a comment.

If PCI_NETBSD_ENABLE_IDE is set, enable the PIIX{3,4} southbridge
IDE channels on the P-5064 and P-6032, since PMON doesn't do it
for us (thus causing the `pciide' driver to ignore them).

branches: 1.3.2;
Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.

Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
Provide a new resource provider API:

==> pciconf_resource_init() -- Initialize a PCI configuration resources
container.
==> pciconf_resource_add() -- Add a PCI configuration resource to the
container (I/O, MEM, or prefetchable MEM). Multiple resources of
each type may be added.
==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
container once the bus has been configured.

This is much easier to use than the previous method of providing an
extent map for each kind of resource, and works better for e.g. ACPI
platforms that provide potentially multiple PCI resources in tables
provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.25.2; 1.25.6;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

Major update of algor.
Now uses generic mips bus_space.h bus_dma.h isa_machdep.h pci_machdep.h
Now uses evbmips versions of cpu.c isadma_bounce.c mcclock_isa.c

#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t, struct cfdata * -> cfdata_t
CFATTACH_DECL(*, sizeof(struct device), -> CFATTACH_DECL_NEW(&, 0

branches: 1.21.2;
Merge forward from matt-nb5-mips64.
Adapt to new interrupt/spl framework.

branches: 1.20.18; 1.20.22; 1.20.28; 1.20.30;
Remove clause 3 and 4 from TNF licenses

branches: 1.19.74; 1.19.76; 1.19.78;
merge ktrace-lwp.

s/locdesc_t/int/g

branches: 1.17.2;
adaptions to config_search() change, and minor autoconf fixes, mostly from Havard Eidnes

kill questionable uses of config(8) generated xxxlocnames[]
locator information does belong elsewhere and definitely shouldn't
be in the global namespace

convert remaining autoconf bus "submatch" functions to use the new
signature (passing locators), and remove some which obviously don't
serve any purpose
(untested, sorry)

add __KERNEL_RCSID()

branches: 1.13.2;
Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.

Fix a typo.

Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register. This should be the
size of the largest D-cache line on a system.

branches: 1.6.2;
Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

branches: 1.5.2;
Fix a tyop in a comment.

If PCI_NETBSD_ENABLE_IDE is set, enable the PIIX{3,4} southbridge
IDE channels on the P-5064 and P-6032, since PMON doesn't do it
for us (thus causing the `pciide' driver to ignore them).

branches: 1.3.2;
Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.25.2; 1.25.6;
Allow algor kernels to be built under either algor/algor64 or
evbmips-el/evbmips64-el. Note that MAXMAPARITITONS and majors numbers
differ between the two ports which is why two kernels are still needed.

Major update of algor.
Now uses generic mips bus_space.h bus_dma.h isa_machdep.h pci_machdep.h
Now uses evbmips versions of cpu.c isadma_bounce.c mcclock_isa.c

#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t, struct cfdata * -> cfdata_t
CFATTACH_DECL(*, sizeof(struct device), -> CFATTACH_DECL_NEW(&, 0

branches: 1.21.2;
Merge forward from matt-nb5-mips64.
Adapt to new interrupt/spl framework.

branches: 1.20.18; 1.20.22; 1.20.28; 1.20.30;
Remove clause 3 and 4 from TNF licenses

branches: 1.19.74; 1.19.76; 1.19.78;
merge ktrace-lwp.

s/locdesc_t/int/g

branches: 1.17.2;
adaptions to config_search() change, and minor autoconf fixes, mostly from Havard Eidnes

kill questionable uses of config(8) generated xxxlocnames[]
locator information does belong elsewhere and definitely shouldn't
be in the global namespace

convert remaining autoconf bus "submatch" functions to use the new
signature (passing locators), and remove some which obviously don't
serve any purpose
(untested, sorry)

add __KERNEL_RCSID()

branches: 1.13.2;
Use aprint_normal() for cfprint() routines.

Fix script-o's in last.

Use CFATTACH_DECL().

Declare all cfattach structures const.

Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.

Fix a typo.

Add a "cacheline_size" argument to pci_configure_bus(). It is used
to set the cacheline size in the BHLC register. This should be the
size of the largest D-cache line on a system.

branches: 1.6.2;
Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

branches: 1.5.2;
Fix a tyop in a comment.

If PCI_NETBSD_ENABLE_IDE is set, enable the PIIX{3,4} southbridge
IDE channels on the P-5064 and P-6032, since PMON doesn't do it
for us (thus causing the `pciide' driver to ignore them).

branches: 1.3.2;
Check in work-in-progress of P-6032 support. This is not tested,
but is meant for back-up purposes.

Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".

A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.