Remove ryo@'s mail addresses.

Relax the TLB invalidation from full to by va for writing to kernel text
in db_write_text.

Restore a '\n' I accidentally removed in 1.16

KNF

Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED

Move cpu_Debugger() into a more suitable file, from cpuswitch.S to db_interface.c.

Use the PAR register to check for accessibility in db_(read|write)_bytes().

db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.

- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Relax the TLB invalidation from full to by va for writing to kernel text
in db_write_text.

Restore a '\n' I accidentally removed in 1.16

KNF

Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED

Move cpu_Debugger() into a more suitable file, from cpuswitch.S to db_interface.c.

Use the PAR register to check for accessibility in db_(read|write)_bytes().

db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.

- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Restore a '\n' I accidentally removed in 1.16

KNF

Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED

Move cpu_Debugger() into a more suitable file, from cpuswitch.S to db_interface.c.

Use the PAR register to check for accessibility in db_(read|write)_bytes().

db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.

- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

KNF

Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED

Move cpu_Debugger() into a more suitable file, from cpuswitch.S to db_interface.c.

Use the PAR register to check for accessibility in db_(read|write)_bytes().

db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.

- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Use "non-posted" instead of "strongly ordered" to describe nGnRnE mappings

Rename the following defines:
- _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED to BUS_SPACE_MAP_NONPOSTED
- PMAP_DEV_SO to PMAP_DEV_NP
- LX_BLKPAG_ATTR_DEVICE_MEM_SO to LX_BLKPAG_ATTR_DEVICE_MEM_NP
Rename the following option:
- AARCH64_DEVICE_MEM_STRONGLY_ORDERED to AARCH64_DEVICE_MEM_NONPOSTED

Move cpu_Debugger() into a more suitable file, from cpuswitch.S to db_interface.c.

Use the PAR register to check for accessibility in db_(read|write)_bytes().

db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.

- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Move cpu_Debugger() into a more suitable file, from cpuswitch.S to db_interface.c.

Use the PAR register to check for accessibility in db_(read|write)_bytes().

db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.

- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Use the PAR register to check for accessibility in db_(read|write)_bytes().

db_(read|write)_bytes() uses the TTBR[01] at that time, so it must check
if it is accessible in context at that time, not pmap_extract()
which uses the struct pmap of the process.

- It also checks if the address is writable.
- db_write_bytes() also requires ARMV81_PAN control.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

In ddb, fixed "trace/u" and user process memory read/write to work correctly.

In the softint context, curlwp points the kernel lwp, so to get the pmap
of a user process, we had to use curcpu()->ci_onproc->l_proc instead of
curproc (curlwp->l_proc). Adviced by ad@.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

branches: 1.14.2;
Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Make even more pmap agnostic

Reduce characters to print in db_pte_print and unwrap some short lines.

Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

branches: 1.12.4;
Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Remove unnecssary brackets. Same binary before and after.

Make the ddb for pmap / pte information pmap agnostic

Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

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Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Make the ddb for pmap / pte information pmap agnostic

Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Avoid duplicate definition of ddb_regs in crash(8).

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

branches: 1.10.2;
sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

s:aarch64/cpufunc.h:arm/cpufunc.h:

a baby step in the grand arm header unification challenge

sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

sprinkle LE32TOH to fetch instructions on aarch64eb

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Improve a comment

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Add support for Privileged Access Never (ARMv8.1-PAN).

PAN provides the same functionality as SMAP on x86: it forbids kernel
access to userland pages when PSTATE.PAN=1, and allows such accesses when
PSTATE.PAN=0.

We clear SCTLR_SPAN, to guarantee that PAN=1 each time the kernel is
entered. We catch PAN faults and panic right away without further
processing. In copyin, copyout, etc, we temporarily authorize access to
userland pages.

PAN is a very useful exploit mitigation. Reviewed by ryo@, thanks. Tested
on Qemu. Enabled by default.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

branches: 1.4.2;
PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.

Merge the [pgoyette-compat] branch

fixed to keep PROT_EXECUTE when writing the page/block.
this is required when the L2 block to which the target address belongs
and the L2 block to which this function itself belongs are the same.

set kernel text/rodata readonly by default.
add function db_write_text() for setting ddb breakpoint.

PR/53338: David Binderman: Widen shift to the LHS type.

implement properly branch_taken() and inst_unconditional_flow_transfer().

Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)

- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@)
- add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)

branches: 1.1.4; 1.1.28;
Preliminary files for AARCH64 (64-bit ARM) support.
Enough for a distribution build.