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e42edf9b |
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28-Jul-2021 |
Jordan Niethe <jniethe5@gmail.com> |
selftests: Skip TM tests on synthetic TM implementations Transactional Memory was removed from the architecture in ISA v3.1. For threads running in P8/P9 compatibility mode on P10 a synthetic TM implementation is provided. In this implementation, tbegin. always sets cr0 eq meaning the abort handler is always called. This is not an issue as users of TM are expected to have a fallback non transactional way to make forward progress in the abort handler. The TEXASR indicates if a transaction failure is due to a synthetic implementation. Some of the TM self tests need a non-degenerate TM implementation for their testing to be meaningful so check for a synthetic implementation and skip the test if so. Signed-off-by: Jordan Niethe <jniethe5@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210729041317.366612-2-jniethe5@gmail.com
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c0176429 |
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12-Aug-2020 |
Michael Ellerman <mpe@ellerman.id.au> |
selftests/powerpc: Fix TM tests when CPU 0 is offline Several of the TM tests fail spuriously if CPU 0 is offline, because they blindly try to affinitise to CPU 0. Fix them by picking any online CPU and using that instead. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200813013445.686464-1-mpe@ellerman.id.au
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f50a7f3d |
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28-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 191 Based on 1 normalized pattern(s): licensed under gplv2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 99 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170027.163048684@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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44d947ef |
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12-Sep-2018 |
Breno Leitao <leitao@debian.org> |
selftests/powerpc: Do not fail with reschedule There are cases where the test is not expecting to have the transaction aborted, but, the test process might have been rescheduled, either in the OS level or by KVM (if it is running on a KVM guest machine). The process reschedule will cause a treclaim/recheckpoint which will cause the transaction to doom, aborting the transaction as soon as the process is rescheduled back to the CPU. This might cause the test to fail, but this is not a failure in essence. If that is the case, TEXASR[FC] is indicated with either TM_CAUSE_RESCHEDULE or TM_CAUSE_KVM_RESCHEDULE for KVM interruptions. In this scenario, ignore these two failures and avoid the whole test to return failure. Signed-off-by: Breno Leitao <leitao@debian.org> Reviewed-by: Gustavo Romero <gromero@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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b395e55b |
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05-Mar-2018 |
Gustavo Romero <gromero@linux.vnet.ibm.com> |
selftests/powerpc: Skip tm-unavailable if TM is not enabled Some processor revisions do not support transactional memory, and additionally kernel support can be disabled. In either case the tm-unavailable test should be skipped, otherwise it will fail with a SIGILL. That commit also sets this selftest to be called through the test harness as it's done for other TM selftests. Finally, it avoids using "ping" as a thread name since it's ambiguous and can be confusing when shown, for instance, in a kernel backtrace log. Fixes: 77fad8bfb1d2 ("selftests/powerpc: Check FP/VEC on exception in TM") Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com> Reviewed-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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5783ee6e |
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21-Nov-2017 |
Cyril Bur <cyrilbur@gmail.com> |
selftests/powerpc: Check for pthread errors in tm-unavailable Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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77fad8bf |
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01-Nov-2017 |
Gustavo Romero <gromero@linux.vnet.ibm.com> |
selftests/powerpc: Check FP/VEC on exception in TM Add a self test to check if FP/VEC/VSX registers are sane (restored correctly) after a FP/VEC/VSX unavailable exception is caught during a transaction. This test checks all possibilities in a thread regarding the combination of MSR.[FP|VEC] states in a thread and for each scenario raises a FP/VEC/VSX unavailable exception in transactional state, verifying if vs0 and vs32 registers, which are representatives of FP/VEC/VSX reg sets, are not corrupted. Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com> Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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