#
3bc0f20a |
|
03-Oct-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Use cgroup isolate for CPU 0 From kernel version 6.5, CPU 0 hotplug capability is deprecated. If some SST profile doesn't have CPU 0, then it is no longer possible to offline CPU 0. This means that user space threads will still run on CPU 0. To workaround this issue, use cgroup v2 isolation feature. Whenever there /sys/devices/system/cpu/cpu0/online file is absent or open fails, isolate CPU 0 via CPU cgroup v2 isolation. Also add a command line option to force even if the /sys/devices/system/cpu/cpu0/online is present. The previous commit "01bcb56f059e ("tools/power/x86/intel-speed-select: Prevent CPU 0 offline") was just warning about this issue based on the kernel version 6.5 and above. With this new approach, instead of warning take action to mitigate the issue. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
06bbebdb |
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20-Jul-2023 |
Frank Ramsay <frank.ramsay@hpe.com> |
tools/power/x86/intel-speed-select: Support more than 8 sockets. MAX_PACKAGE_COUNT limits the intel-speed-select to systems with 8 sockets or fewer. On a system with more than 8 sockets intel-speed-select silently ignores everything beyond the 8th socket, rendering the tool useless for those systems. Increase MAX_PACKAGE_COUNT to support systems with up to 32 sockets. Signed-off-by: Frank Ramsay <frank.ramsay@hpe.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
1d54b139 |
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22-Feb-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Identify Emerald Rapids There are some differences compared to Sapphire Rapids. So, add a separate API. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
997074df |
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22-Feb-2023 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Use cgroup v2 isolation On supported systems, it is possiible to isolate CPUs instead of CPU online/offline. This is optional and can be specified using -g option when running as daemon or in combination with -o option for SST-PP level change. CPU isolation doesn't isolate IRQs. So IRQs needs to be moved away from isoolated CPUs. This can be done via IRQ sysfs or irqbalance daemon. The IRQ balance daemon is also capable to parse thermal HFI messages to move IRQs away from CPUS, which are supposed be isolated. But this requires version released after July 2022. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
79554aaa |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce TPMI interface support TPMI (Topology Aware Register and PM Capsule Interface) creates a flexible, extendable and software-PCIe-driver-enumerable MMIO interface for PM features. SST feature is exposed via the TPMI interface on newer Xeon platforms. Kernel TPMI based SST driver provides a series of new IOCTLs for userspace to use. Introduce support for the platforms that do SST control via TPMI interface. Compared with previous platforms, Newer Xeons also supports multi-punit in a package/die, including cpu punit and non-cpu punit. These have already been handled in the generic code. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
887e5be9 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce api_version helper In some cases, the output format may be different with different api_version because of different capabilities or for backward capabilities reason. Introduce api_version() to get the api_version of the platform running. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
20f06c9d |
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16-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Support large clos_min/max clos_min/max in TPMI interface is frequency in MHz, thus clos_min/max needs to support larger values. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
9798768c |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce is_debug_enabled() Platform specific code also needs to give debug output. Introduce is_debug_enabled() for this purpose. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
05aab5b8 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Allow api_version based platform callbacks Different api_version suggests different kernel driver used and different interface is used to communication with the hardware. Allow setting platform specific callbacks based on api_version. Currently, all platforms with api_version 1 uses Mbox/MMIO interfaces. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
73452ccc |
|
02-Feb-2023 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract adjust_uncore_freq Allow platform specific implementation to adjust the uncore frequency. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
8f54104f |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract read_pm_config Allow platform specific implementation to get SST-CP capability and current state. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
a59a6c0c |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract clos_associate Allow platform specific implementation to set per core CLOS setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
b161bbad |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract clos_get_assoc_status Allow platform specific implementation to get per core CLOS setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
33dbf360 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract set_clos Allow platform specific implementation to set CLOS priority setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
43314e79 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract pm_get_clos Allow platform specific implementation to get CLOS priority setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
904d2baa |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract pm_qos_config Allow platform specific implementation to set CLOS config settings. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
a07bdb81 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_clos_information Allow platform specific implementation to get CLOS config setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
4a17b291 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_get_trls Allow platform specific implementation to get turbo ratio limits of each AVX level, for a selected SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
00c26c1f |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_uncore_p0_p1_info Allow platform specific implementation to get uncore frequency info. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
7b5f586d |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_fact_info Allow platform specific implementation to get SST-TF info. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
5843f217 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract set_pbf_fact_status Allow platform specific implementation to enable/disable SST-TF/BF. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
05ece691 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Remove isst_get_pbf_info_complete isst_get_pbf_info_complete does nothing but just free the core_mask. Remove the function and do free core_mask directly and free core mask in the caller. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
7a196290 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_pbf_info Allow platform specific implementation to get SST-BF information. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
f88c3c4b |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract set_tdp_level Allow platform specific implementation to set a SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
1e37f1b2 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_trl_bucket_info Allow platform specific implementation to get buckets info. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
39f768c3 |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_get_trl Allow platform specific implementation to get turbo ratio limit of the selected SST-PP level, and AVX level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
668cc16c |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_coremask_info Allow platform specific implementation to get the core mask for a given SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
e107dec9 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_pwr_info Allow platform specific implementation to get min and max power for a given SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
645b6605 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_tdp_info Allow platform specific implementation to get TDP information. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
bbe32d87 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_ctdp_control Allow platform specific implementation to get SST-TF/BF/CP capabilities and status. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
72438744 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_config_levels Allow platform specific implementation to get SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
143584e8 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract is_punit_valid Allow platform specific implementation to identify a valid punit. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
d0d1a603 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce isst-core-mbox.c isst-core.c should contain generic core APIs only. Platform specific implementations/configurations should be removed from this file. Introduce isst-core-mbox.c and move all mbox/mmio specific functions to this file. Introduce struct isst_platform_ops which contains a series of callbacks that used by the core APIs but need platform specific implementation. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
13b868f8 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce isst_get_disp_freq_multiplier Remove hardcoded DISP_FREQ_MULTIPLIER in the code and use isst_get_disp_freq_multiplier() instead. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
2042c0ab |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Move mbox functions to isst-core.c isst-config.c should only contain generic code. Move mbox functions which are platform specific code to isst-core.c. As there are some platform specific parameters set via generic application options, introduce isst_update_platform_param to pass these parameters to platform specific code. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
c77a8d4a |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Rename for_each_online_package_in_set for_each_online_package_in_set is actually used to invoke callback for each power domain. This is not a problem when there is a single power domain within a package/die, but it does not reflect the truth in multi-punit case. Rename for_each_online_package_in_set to for_each_online_power_domain_in_set. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
57ef2436 |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce isst_is_punit_valid() Introduce isst_is_punit_valid() for checking a valid domain. For current platforms, it requires a punit 0 in a valid Package/Die. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
e157c847 |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce punit to isst_id Punit id can also be retrieved from ISST_IF_GET_PHY_ID. punit id is unique within a Package/Die, and together with Package id and Die id, they can be used to refer to a specific SST power domain. For current platforms, Punit id is always Zero. So no functional changes are expected for the current platforms. While here, prevent issuing IOCTL if the file /dev/isst_interface can't be opened. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
16c18920 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Follow TRL nameing for FACT info SST-TF high priority core count and ratios and low priority core ratios are also per TRL level. Cleanup the code to follow the same nameing convention as TRL. This removes hardcoded TRL level names and variables. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
7c7e7c0d |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Unify TRL levels TRL supports different levels including SSE/AVX2/AVX512. Avoid using hardcoded level name and structure fields, so that a loop can be used to parse each TRL level instead. This reduces several lines of source code. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
0d5eea35 |
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09-Dec-2022 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix display of uncore min frequency Uncore P1 is not uncore minmum frequency. This is uncore base frequency. Correct display from uncore-frequency-min(MHz) to uncore-frequency-base(Mhz). To get uncore min frequency use mailbox command CONFIG_TDP_GET_RATIO_INFO. Use this mailbox to get uncore frequency limits when present. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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#
a05b925a |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Remove unused struct clos_config fields pkg_id/die_id can be retrieved from struct isst_id, remove the redundant clos_config->pkg_id/die_id fields. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
e616059e |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Do not export get_physical_id Now, all the get_physical_pkg/die/core_id() users are inside isst-config.c, so no need to export these APIs. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
00bb07db |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce is_cpu_in_power_domain helper struct isst_id contains cpu, package and die info, and it can represent a specific SST power domain. Introduce is_cpu_in_power_domain() helper to identify if a cpu is in a specified power_domain. And cleanup the code to use the new helper. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
30e0600e |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Convert more function to use isst_id With pkg and die info added into struct isst_id, more functions can be converted to use struct isst_id as parameter. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
32d6ab45 |
|
20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Add pkg and die in isst_id Code uses pkg_id and die_id to refer to a specific power domain. The pkg/die information is already settled at start time. Adding package id and die id information into struct isst_id so that code does not need to retrieve them at runtime. More code cleanups can be done with the package/die info available. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
850337ec |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce struct isst_id SST control is power-domain based rather than cpu based, on all the systems including Sapphire Rapids and ealier. SST core APIs uses cpu id as parameter, and use the underlying pkg_id and die_id information to find a power domain, this is not straight forward and introduces obscure logics in the code. Introduce struct isst_id to represent a SST Power Domain. All core APIs are converted to use struct isst_id as parameter instead of using cpu id. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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190ba965 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Remove dead code Remove dead code. Not functional change in this patch Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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7d440da0 |
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18-Jan-2022 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: HFI support Read HFI (Hardware Feedback Interface) events to process config level changes in oob mode. When HFI is supported there is no need for polling to check config level change. Subscribe to Linux thermal netlink messages and process message: THERMAL_GENL_EVENT_CPU_CAPABILITY_CHANGE. This message contains cpu number, performance and energy efficiency. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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7fd786df |
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18-Jan-2022 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: OOB daemon mode It is possible that some out of band agent changed config level. In this case CPUs need to be online/offline to support this config change. Add a command line option --oob, so that this tool can run as daemon and poll for config level change and take action. The poll interval is configurable in seconds using config option --poll-interval. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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159f130f |
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12-May-2021 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix uncore memory frequency display The uncore memory frequency value from the mailbox command CONFIG_TDP_GET_MEM_FREQ needs to be scaled based on the platform for display. There is no single constant multiplier. This change introduces CPU model specific memory frequency multiplier. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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2c7dc57e |
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22-Dec-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Add new command to get/set TRL Add a new command to get and set TRL (Turbo Ratio Limits). This will help users to get/set TRL, when the direct MSR access is removed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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07f262d8 |
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23-Nov-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Read TRL from mailbox When SST-PP feature is not present, the TRL (Turbo Ratio Limits) is read from MSRs. This is done as the mailbox command will fail on Skylake-X based platform. But for IceLake servers, mailbox commands can still be used. So add a check to allow for non Skylake based platforms to read from mail box commands. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/platform-driver-x86/57d6648282491906e0e1f70fe3b9a44f72cec90d.camel@intel.com/ Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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7566616f |
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30-Sep-2020 |
Jonathan Doman <jonathan.doman@intel.com> |
tools/power/x86/intel-speed-select: Fix missing base-freq core IDs The reported base-freq high-priority-cpu-list was potentially omitting some cpus, due to incorrectly using a logical core count to constrain the size of a physical punit core ID mask. We may need to read both high and low PBF CORE_MASK values regardless of the logical core count. Signed-off-by: Jonathan Doman <jonathan.doman@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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873e391f |
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19-May-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix invalid core mask The core mask display is wrong in some cases. This is showing more cpus than the mask has. This is because mask is 64 bit but it used with BIT() macro to get the presence of CPU which doesn't support unsigned long long. Added a new macro for BIT_ULL and use that to get the presence of a CPU. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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a9fd6ae7 |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Improve error display for turbo-freq feature This change adds improved error display and handling for commands related to turbo-freq feature. The changes include: - Replace perror/fprintf with helpful error message - Error for not specifying TDP level when required - Show error for invalid bucket number - Show message to enable core-power before enabling turbo-freq feature Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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3d1a8579 |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Improve output of perf-profile commands Improve output of perf-profile commands: get-config-enabled get-lock-status Instead of showing 0/1, show meaningful strings. Also show error when command is failed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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87e115b3 |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Add an API for error/information print Add a common API which can be used to print all error and information messages. In this way a common format can be used. For json output an error index in suffixed to make unique error key. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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1ba148ae |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Enhance --info option Add additional information, which will allow user to detect available features. This will allow users to check presence of features before continue to test. A sample output: $sudo ./intel-speed-select --info Intel(R) Speed Select Technology Executing on CPU model:85[0x55] Platform: API version : 1 Platform: Driver version : 1 Platform: mbox supported : 1 Platform: mmio supported : 0 Intel(R) SST-PP (feature perf-profile) is not supported Only performance level 0 (base level) is present TDP level change control is locked Intel(R) SST-TF (feature turbo-freq) is supported Intel(R) SST-BF (feature base-freq) is supported Intel(R) SST-CP (feature core-power) is supported Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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143ad322 |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Enhance core-power info command In addition to CLOS enable status, also show the core-power feature status. This will help why clos enable status didn't give desired results as the core-power feature may be disabled or unsupported. The new display looks as follows: $intel-speed-select core-power info Intel(R) Speed Select Technology .. package-0 die-0 cpu-0 core-power support-status:supported enable-status:enabled clos-enable-status:1 priority-type:0 In the above display "support-status" and "enable-status", shows the status of the core-power feature and "clos-enable-status", shows the status of the clos. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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645feeb2 |
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14-Jan-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Add support for core-power discovery It is possible that BIOS may not enable core-power feature. In this case this additional interface will allow to enable from this utility. Also the information dump, includes the current status of core-power. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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de7f9d3d |
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04-Nov-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Use core count for base-freq mask Some firmware implementation gives error when a command is sent get mask for core count 32-61. So use core count to decide. But there is no function to get core count. So introduce one function to get core count. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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7af5a95b |
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04-Nov-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Support platform with limited Intel(R) Speed Select There are some platforms, where there limited support of Intel(R) SST features. Here perf-profile has only one base configuration and limited support of commands. But still has support for discovery of base-freq and turbo-freq features. So it is important to show minimum features to use base-freq and turbo-freq features. Here the change are: - When there is no support of CONFIG_TDP_GET_LEVELS_INFO, then instead of treating this as fatal error, treat this with number of config levels = 0, that means only base level 0 is present. - There is no support of mail box commands to get base frequencies or turbo frequencies. Here present base frequency by reading cpufreq base freq and turbo frequency by reading MSR 0x1AD. - Don't display any field, which has value == 0. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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062e4aac |
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10-Oct-2019 |
Prarit Bhargava <prarit@redhat.com> |
tools/power/x86/intel-speed-select: Implement 'perf-profile info' on CascadeLake-N Add functionality for "perf-profile info" on CascadeLake-N. Sample output: intel-speed-select perf-profile info Intel(R) Speed Select Technology Executing on CPU model:85[0x55] package-0 die-0 cpu-0 perf-profile-level-0 cpu-count:20 enable-cpu-mask:00000000,000fffff enable-cpu-list:0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19 thermal-design-power-ratio:23 base-frequency(MHz):2300 speed-select-turbo-freq:unsupported speed-select-base-freq:enabled speed-select-base-freq high-priority-base-frequency(MHz):2700000 high-priority-cpu-mask:00000000,0000e8c0 high-priority-cpu-list:6,7,11,13,14,15 low-priority-base-frequency(MHz):2100000 package-1 die-0 cpu-20 perf-profile-level-0 cpu-count:20 enable-cpu-mask:000000ff,fff00000 enable-cpu-list:20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39 thermal-design-power-ratio:23 base-frequency(MHz):2300 speed-select-turbo-freq:unsupported speed-select-base-freq:enabled speed-select-base-freq high-priority-base-frequency(MHz):2700000 high-priority-cpu-mask:0000000e,8c000000 high-priority-cpu-list:26,27,31,33,34,35 low-priority-base-frequency(MHz):2100000 Signed-off-by: Prarit Bhargava <prarit@redhat.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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b3abfd77 |
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17-Sep-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix perf-profile command output commit "c016ae8f9fa04d361efc8629de49ad3af12b5262 "tools/power/x86/intel-speed-select: Output success/failed for command output" introduced a regression in perf-profile outputs. With this the result field is changed to string interpreting every non zero value as errors. But these commands display on zero (>0) result. For example before this commit the display was: package-1 die-0 cpu-14 get-config-levels:4 Here the get-config-levels is interpreted as error and displayed as error with the above commit: package-1 die-0 cpu-14 get-config-levels:failed(error 4) Fix this issue by not using isst_display_result() to display such results, but define a new function which formats this data and prints. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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188afed9 |
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14-Sep-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Extend core-power command set Add additional command to get the clos enable and priority type. The current info option is actually dumping per clos QOS config, so name the command appropriately to get-config. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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e118fbe3 |
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14-Sep-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Format get-assoc information Format the get-assoc command output consistant with other commands. For example: Intel(R) Speed Select Technology Executing on CPU model:142[0x8e] package-0 die-0 cpu-0 get-assoc clos:0 Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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3c64c81a |
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14-Sep-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Allow online/offline based on tdp Using enable core mask, do online offline CPUs. There is a new option --online|-o for set-config-level. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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1233c7b9 |
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08-Sep-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Display core count for bucket Read the bucket and core count relationship via MSR and display when displaying turbo ratio limits. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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3fb4f7cd |
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30-Jun-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86: A tool to validate Intel Speed Select commands The Intel(R) Speed select technologies contains four features. Performance profile:An non architectural mechanism that allows multiple optimized performance profiles per system via static and/or dynamic adjustment of core count, workload, Tjmax, and TDP, etc. aka ISS in the documentation. Base Frequency: Enables users to increase guaranteed base frequency on certain cores (high priority cores) in exchange for lower base frequency on remaining cores (low priority cores). aka PBF in the documenation. Turbo frequency: Enables the ability to set different turbo ratio limits to cores based on priority. aka FACT in the documentation. Core power: An Interface that allows user to define per core/tile priority. There is a multi level help for commands and options. This can be used to check required arguments for each feature and commands for the feature. To start navigating the features start with $sudo intel-speed-select --help For help on a specific feature for example $sudo intel-speed-select perf-profile --help To get help for a command for a feature for example $sudo intel-speed-select perf-profile get-lock-status --help Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Acked-by: Len Brown <len.brown@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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