#
d0e12c46 |
|
13-Sep-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Add cpu id check Some operations applies to cpu-power-domain only. Add check for cpu id for these functions. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
79554aaa |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce TPMI interface support TPMI (Topology Aware Register and PM Capsule Interface) creates a flexible, extendable and software-PCIe-driver-enumerable MMIO interface for PM features. SST feature is exposed via the TPMI interface on newer Xeon platforms. Kernel TPMI based SST driver provides a series of new IOCTLs for userspace to use. Introduce support for the platforms that do SST control via TPMI interface. Compared with previous platforms, Newer Xeons also supports multi-punit in a package/die, including cpu punit and non-cpu punit. These have already been handled in the generic code. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
05aab5b8 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Allow api_version based platform callbacks Different api_version suggests different kernel driver used and different interface is used to communication with the hardware. Allow setting platform specific callbacks based on api_version. Currently, all platforms with api_version 1 uses Mbox/MMIO interfaces. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
2b86ed22 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Move send_mbox_cmd to isst-core-mbox.c After the previous cleanup, there is no user of send_mbox_cmd outside of isst-core-mbox.c. Thus move send_mbox_cmd to isst-core-mbox.c as internal functions. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
73452ccc |
|
02-Feb-2023 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract adjust_uncore_freq Allow platform specific implementation to adjust the uncore frequency. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
8f54104f |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract read_pm_config Allow platform specific implementation to get SST-CP capability and current state. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
a59a6c0c |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract clos_associate Allow platform specific implementation to set per core CLOS setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
b161bbad |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract clos_get_assoc_status Allow platform specific implementation to get per core CLOS setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
33dbf360 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract set_clos Allow platform specific implementation to set CLOS priority setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
43314e79 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract pm_get_clos Allow platform specific implementation to get CLOS priority setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
904d2baa |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract pm_qos_config Allow platform specific implementation to set CLOS config settings. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
a07bdb81 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_clos_information Allow platform specific implementation to get CLOS config setting. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
4a17b291 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_get_trls Allow platform specific implementation to get turbo ratio limits of each AVX level, for a selected SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
85593283 |
|
01-Feb-2023 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Enhance get_tdp_info mbox_get_uncore_p0_p1_info/get_p1_info/get_uncore_mem_freq can be done inside get_tdp_info(). Fold the code into get_tdp_info(). No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
00c26c1f |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_uncore_p0_p1_info Allow platform specific implementation to get uncore frequency info. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
7b5f586d |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_fact_info Allow platform specific implementation to get SST-TF info. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
5843f217 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract set_pbf_fact_status Allow platform specific implementation to enable/disable SST-TF/BF. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
05ece691 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Remove isst_get_pbf_info_complete isst_get_pbf_info_complete does nothing but just free the core_mask. Remove the function and do free core_mask directly and free core mask in the caller. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
7a196290 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_pbf_info Allow platform specific implementation to get SST-BF information. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
f88c3c4b |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract set_tdp_level Allow platform specific implementation to set a SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
1e37f1b2 |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_trl_bucket_info Allow platform specific implementation to get buckets info. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
39f768c3 |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_get_trl Allow platform specific implementation to get turbo ratio limit of the selected SST-PP level, and AVX level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
668cc16c |
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08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_coremask_info Allow platform specific implementation to get the core mask for a given SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
a30cbd22 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_tjmax_info Allow platform specific implementation to get the Tjmax info for a given SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
e4cbd0f1 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Move code right before its caller Some functions are defined far from its only caller. Rearrange the code. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
e107dec9 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_pwr_info Allow platform specific implementation to get min and max power for a given SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
645b6605 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_tdp_info Allow platform specific implementation to get TDP information. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
bbe32d87 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_ctdp_control Allow platform specific implementation to get SST-TF/BF/CP capabilities and status. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
72438744 |
|
08-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract get_config_levels Allow platform specific implementation to get SST-PP level. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
143584e8 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Abstract is_punit_valid Allow platform specific implementation to identify a valid punit. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
d0d1a603 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce isst-core-mbox.c isst-core.c should contain generic core APIs only. Platform specific implementations/configurations should be removed from this file. Introduce isst-core-mbox.c and move all mbox/mmio specific functions to this file. Introduce struct isst_platform_ops which contains a series of callbacks that used by the core APIs but need platform specific implementation. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
13b868f8 |
|
20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce isst_get_disp_freq_multiplier Remove hardcoded DISP_FREQ_MULTIPLIER in the code and use isst_get_disp_freq_multiplier() instead. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
2042c0ab |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Move mbox functions to isst-core.c isst-config.c should only contain generic code. Move mbox functions which are platform specific code to isst-core.c. As there are some platform specific parameters set via generic application options, introduce isst_update_platform_param to pass these parameters to platform specific code. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
57ef2436 |
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17-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce isst_is_punit_valid() Introduce isst_is_punit_valid() for checking a valid domain. For current platforms, it requires a punit 0 in a valid Package/Die. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
16c18920 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Follow TRL nameing for FACT info SST-TF high priority core count and ratios and low priority core ratios are also per TRL level. Cleanup the code to follow the same nameing convention as TRL. This removes hardcoded TRL level names and variables. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
7c7e7c0d |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Unify TRL levels TRL supports different levels including SSE/AVX2/AVX512. Avoid using hardcoded level name and structure fields, so that a loop can be used to parse each TRL level instead. This reduces several lines of source code. No functional changes are expected. Signed-off-by: Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: changelog edits] Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
0d5eea35 |
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09-Dec-2022 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix display of uncore min frequency Uncore P1 is not uncore minmum frequency. This is uncore base frequency. Correct display from uncore-frequency-min(MHz) to uncore-frequency-base(Mhz). To get uncore min frequency use mailbox command CONFIG_TDP_GET_RATIO_INFO. Use this mailbox to get uncore frequency limits when present. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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#
a05b925a |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Remove unused struct clos_config fields pkg_id/die_id can be retrieved from struct isst_id, remove the redundant clos_config->pkg_id/die_id fields. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
56d64692 |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Cleanup get_physical_id usage struct isst_id already contains package and die id information, thus there is no need to get the package and die id information, when struct isst_id is already available. Remove unneeded get_physical_package_id/get_physical_die_id usage. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
30e0600e |
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20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Convert more function to use isst_id With pkg and die info added into struct isst_id, more functions can be converted to use struct isst_id as parameter. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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#
850337ec |
|
20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Introduce struct isst_id SST control is power-domain based rather than cpu based, on all the systems including Sapphire Rapids and ealier. SST core APIs uses cpu id as parameter, and use the underlying pkg_id and die_id information to find a power domain, this is not straight forward and introduces obscure logics in the code. Introduce struct isst_id to represent a SST Power Domain. All core APIs are converted to use struct isst_id as parameter instead of using cpu id. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
190ba965 |
|
20-Aug-2022 |
Zhang Rui <rui.zhang@intel.com> |
tools/power/x86/intel-speed-select: Remove dead code Remove dead code. Not functional change in this patch Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
159f130f |
|
12-May-2021 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Fix uncore memory frequency display The uncore memory frequency value from the mailbox command CONFIG_TDP_GET_MEM_FREQ needs to be scaled based on the platform for display. There is no single constant multiplier. This change introduces CPU model specific memory frequency multiplier. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
#
2c7dc57e |
|
22-Dec-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Add new command to get/set TRL Add a new command to get and set TRL (Turbo Ratio Limits). This will help users to get/set TRL, when the direct MSR access is removed. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
07f262d8 |
|
23-Nov-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Read TRL from mailbox When SST-PP feature is not present, the TRL (Turbo Ratio Limits) is read from MSRs. This is done as the mailbox command will fail on Skylake-X based platform. But for IceLake servers, mailbox commands can still be used. So add a check to allow for non Skylake based platforms to read from mail box commands. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/platform-driver-x86/57d6648282491906e0e1f70fe3b9a44f72cec90d.camel@intel.com/ Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
#
7566616f |
|
30-Sep-2020 |
Jonathan Doman <jonathan.doman@intel.com> |
tools/power/x86/intel-speed-select: Fix missing base-freq core IDs The reported base-freq high-priority-cpu-list was potentially omitting some cpus, due to incorrectly using a logical core count to constrain the size of a physical punit core ID mask. We may need to read both high and low PBF CORE_MASK values regardless of the logical core count. Signed-off-by: Jonathan Doman <jonathan.doman@intel.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|
#
e78fded4 |
|
20-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Change debug to error When turbo-freq is enabled, we can't disable core-power. Currently it prints debug message to warn. Change this to error message. While here remove "\n" from calls to isst_display_error_info_message(), as it will be added again during actual print. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
|
#
fe6fb216 |
|
05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Improve core-power result and error display This change adds improved error display and handling for commands related to core-power feature. The changes include: - Replace perror with helpful error message - Use ordered priority for SKX based platform by default as the proportional priority is not supported - Don't show weight and epp in help and also give error when user tries to set them in SKX based platforms - Range check for epp and weights and display error Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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a9fd6ae7 |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Improve error display for turbo-freq feature This change adds improved error display and handling for commands related to turbo-freq feature. The changes include: - Replace perror/fprintf with helpful error message - Error for not specifying TDP level when required - Show error for invalid bucket number - Show message to enable core-power before enabling turbo-freq feature Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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39bae0fc |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Improve error display for base-freq feature This change adds improved error display and handling for commands related to base-freq feature. The changes include: - Replace perror/fprintf with helpful error message - Error for not specifying TDP level when required - For CLX show help which shows limitation Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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6d1f2dc8 |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Display error for invalid priority type When priority type for core-power enable command is anything more than 1 display error before change to 1, which is ordered priority. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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6c8edba3 |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Check feature status first Before looking for information about the base-freq or turbo-freq details, first check if the feature is supported at that level. If not print error and return. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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ac9d05ea |
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05-Mar-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Improve error display for perf-profile feature This change adds improved error display and handling for commands related to perf-profile feature. The changes include: - When invalid TDP level is passed. display error and exit - Replace perror with helpful error message - Show error when TDP level can't be set - Print error when information can't be read for a level - Validate user options for invalid level - Display error for TDP lock status Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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645feeb2 |
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14-Jan-2020 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Add support for core-power discovery It is possible that BIOS may not enable core-power feature. In this case this additional interface will allow to enable from this utility. Also the information dump, includes the current status of core-power. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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1434a3d3 |
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19-Nov-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Display TRL buckets for just base config level When only base config level is present, this tool is displaying TRL (Turbo-ratio-limits) by reading legacy MSR. In this case, also present core count for TRL by reading MSR 0x1AE. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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20183ccd |
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15-Nov-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Ignore missing config level It is possible that certain config levels are not available, even if the max level includes the level. There can be missing levels in some platforms. So ignore the level when called for information dump for all levels and fail if specifically ask for the missing level. Here the changes is to continue reading information about other levels even if we fail to get information for the current level. But use the "processed" flag to indicate the failure. When the "processed" flag is not set, don't dump information about that level. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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de7f9d3d |
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04-Nov-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Use core count for base-freq mask Some firmware implementation gives error when a command is sent get mask for core count 32-61. So use core count to decide. But there is no function to get core count. So introduce one function to get core count. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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7af5a95b |
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04-Nov-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Support platform with limited Intel(R) Speed Select There are some platforms, where there limited support of Intel(R) SST features. Here perf-profile has only one base configuration and limited support of commands. But still has support for discovery of base-freq and turbo-freq features. So it is important to show minimum features to use base-freq and turbo-freq features. Here the change are: - When there is no support of CONFIG_TDP_GET_LEVELS_INFO, then instead of treating this as fatal error, treat this with number of config levels = 0, that means only base level 0 is present. - There is no support of mail box commands to get base frequencies or turbo frequencies. Here present base frequency by reading cpufreq base freq and turbo frequency by reading MSR 0x1AD. - Don't display any field, which has value == 0. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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263225c9 |
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04-Nov-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Extend command set for perf-profile Add support for uncore P0, uncore P1, P1 for base and AVX levels and memory frequency. These commands are optional, so continue on failure. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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4e26fabf |
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10-Oct-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Refuse to disable core-power when getting used The turbo-freq feature is dependent on the core-power feature. If the core-power feature is disabled while the turbo-freq feature is enabled, this will break the turbo-freq feature. This is a firmware limitation, where they can't return error under this scenario. So when trying to disable core-power, make sure that the turbo-freq feature is not enabled. If it enabled, return error if user is trying to disable the core-power feature. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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188afed9 |
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14-Sep-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Extend core-power command set Add additional command to get the clos enable and priority type. The current info option is actually dumping per clos QOS config, so name the command appropriately to get-config. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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1233c7b9 |
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08-Sep-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86/intel-speed-select: Display core count for bucket Read the bucket and core count relationship via MSR and display when displaying turbo ratio limits. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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010764b8 |
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21-Aug-2019 |
Dan Carpenter <dan.carpenter@oracle.com> |
tools/power/x86/intel-speed-select: Fix a read overflow in isst_set_tdp_level_msr() The isst_send_msr_command() function will read 8 bytes but we are passing an address to an int (4 bytes) so it results in a read overflow. Fixes: 3fb4f7cd472c ("tools/power/x86: A tool to validate Intel Speed Select commands") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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3fb4f7cd |
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30-Jun-2019 |
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> |
tools/power/x86: A tool to validate Intel Speed Select commands The Intel(R) Speed select technologies contains four features. Performance profile:An non architectural mechanism that allows multiple optimized performance profiles per system via static and/or dynamic adjustment of core count, workload, Tjmax, and TDP, etc. aka ISS in the documentation. Base Frequency: Enables users to increase guaranteed base frequency on certain cores (high priority cores) in exchange for lower base frequency on remaining cores (low priority cores). aka PBF in the documenation. Turbo frequency: Enables the ability to set different turbo ratio limits to cores based on priority. aka FACT in the documentation. Core power: An Interface that allows user to define per core/tile priority. There is a multi level help for commands and options. This can be used to check required arguments for each feature and commands for the feature. To start navigating the features start with $sudo intel-speed-select --help For help on a specific feature for example $sudo intel-speed-select perf-profile --help To get help for a command for a feature for example $sudo intel-speed-select perf-profile get-lock-status --help Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Acked-by: Len Brown <len.brown@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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