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52246445 |
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19-Sep-2015 |
poonam aggrwal <poonam.aggrwal@freescale.com> |
powerpc/b4860: Renamed the L2 caches To make provision for more than one L2 caches in the system, change the name from L2 to L2_1; same as in T4 platforms. * Also remove the L2 entry from common file "arch/powerpc/boot/dts/fsl/b4si-post.dtsi" Keep them only in separate files for b4860 and b4420. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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fb326e98 |
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11-Jan-2015 |
Igal Liberman <Igal.Liberman@freescale.com> |
powerpc/dts: Unify B4 mux nodes Signed-off-by: Igal Liberman <Igal.Liberman@freescale.com> Change-Id: Ic5f28f7b492b708f00a5ff74dda723ce5e1da0ba Signed-off-by: Scott Wood <scottwood@freescale.com>
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eaffcb0f |
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06-Nov-2014 |
Emil Medve <Emilian.Medve@freescale.com> |
powerpc/dts: Factorize the clock control node Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I25ce24a25862b4ca460164159867abefe00ccdd1 Signed-off-by: Scott Wood <scottwood@freescale.com>
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f2e7bfbb |
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05-May-2014 |
Diana Craciun <Diana.Craciun@freescale.com> |
powerpc/fsl: Updated device trees for platforms with corenet version 2 Updated the device trees according to the corenet-cf binding definition. Signed-off-by: Diana Craciun <Diana.Craciun@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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5d1a566e |
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20-Jan-2014 |
Tang Yuantian <yuantian.tang@freescale.com> |
powerpc/mpc85xx: Update clock nodes in device tree The following SoCs will be affected: p2041, p3041, p4080, p5020, p5040, b4420, b4860, t4240 Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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965fcb4d |
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04-Apr-2013 |
Shaveta Leekha <shaveta@freescale.com> |
powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420 B4860 and B4420 are similar that share some commonalities * common features have been added in b4si-pre.dtsi and b4si-post.dtsi * differences are added in respective silicon files of B4860 and B4420 There are several things missing from the device trees of B4860 and B4420: * DPAA related nodes (Qman, Bman, Fman, Rman) * DSP related nodes/information * serdes, sfp(security fuse processor), thermal, gpio, maple, cpri, quad timers nodes Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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