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8258cf0d |
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08-Jan-2024 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename i2c?-gpio to i2c?-gpio-grp Anything ending with gpio/gpios is taken as gpio phande/description which is reported as the issue coming from gpio-consumer.yaml schema. That's why rename the gpio suffix to gpio-grp to avoid name collision. Link: https://lore.kernel.org/r/94f633e26b7b16cabddb8c7210c2e79208c364da.1704728353.git.michal.simek@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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ee6c637f |
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08-Jun-2023 |
Manikanta Guntupalli <manikanta.guntupalli@amd.com> |
arm64: zynqmp: Fix open drain warning on ZynqMP Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT binding. Similar change was done by commit 8df80c1801c9 ("ARM: dts: exynos: Convert to new i2c-gpio bindings"). Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com
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1d831cad |
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22-May-2023 |
Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> |
arm64: zynqmp: Set qspi tx-buswidth to 4 All ZynqMP boards are setting up tx-buswidth to 1. Due to this the framework only issues 1-1-1 write commands to the GQSPI driver. But the GQSPI controller is capable of handling 1-4-4 write commands, so updated the tx-buswidth to 4. Using all 4 lines will increase the tx data transfer rate, as now the tx data will be transferred on four lines instead on single line. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
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f8673fd5 |
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22-May-2023 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
arm64: zynqmp: Fix usb node drive strength and slew rate As per design, all input/rx pins should have fast slew rate and 12mA drive strength. Rest all pins should be slow slew rate and 4mA drive strength. Fix usb nodes as per this and remove setting of slow slew rate for all the usb group pins. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com
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c720a1f5 |
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22-May-2023 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Describe TI phy as ethernet-phy-id TI DP83867 is using strapping based on MIO pins. Tristate setup can influence PHY address. That's why switch description with ethernet-phy-id compatible string which enable calling reset. PHY itself setups phy address after power up or reset. Phy reset is done via gpio. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
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4e4ddd3d |
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29-May-2023 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Switch to amd.com emails Update my and DPs email address to match current setup. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com
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255118de |
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02-May-2023 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Enable AMS on SOM and other zcu10x boards AMS is used for monitoring system. Used for measuring voltages and especially temperatures. Origin interface is IIO but via iio-hwmon it can be moved to hwmon framework too (done for SOM and zcu100). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e1e1621ac1cee7f36ef20606bb3795e130de9609.1683034376.git.michal.simek@amd.com
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37e78949 |
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21-Mar-2023 |
Parth Gajjar <parth.gajjar@amd.com> |
arm64: zynqmp: Add mali-400 gpu node for zynqmp Add mali-400 gpu node for zynqmp. Enabled gpu node for xilinx boards. Signed-off-by: Parth Gajjar <parth.gajjar@amd.com> Signed-off-by: Vishal Sagar <vishal.sagar@amd.com> Link: https://lore.kernel.org/r/20230321070619.29440-3-parth.gajjar@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
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b61c4ff9 |
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05-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Enable xlnx,zynqmp-dwc3 driver for xilinx boards The commit 84770f028fab ("usb: dwc3: Add driver for Xilinx platforms") finally add proper support for Xilinx dwc3 driver. This patch is adding DT description for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Michael Tretter <m.tretter@pengutronix.de> Link: https://lore.kernel.org/r/640a3bc0dc3e32560d3e84c2f78b5ae561396eb0.1628244703.git.michal.simek@xilinx.com
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31533c21 |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Remove description for 8T49N287 and si5382 chips Based on commit 73d677e9f379 ("arm64: dts: zynqmp: Remove si5328 device nodes") also remove description for clock chips which don't have Linux driver yet. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/7557288230567fa136ba3edc004d5bfe4f4c6590.1623684253.git.michal.simek@xilinx.com
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360a8783 |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Move rtc to different location on zcu104-revA Move it the same location as is on zcu104-revC for easier comparison. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/fe6c3f96fbd359409b7fef85d2c2ada584b3d0cc.1623684253.git.michal.simek@xilinx.com
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56e54601 |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Wire qspi on multiple boards Couple of boards have qspi on the board that's why enable controller and describe them. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/01a69ee6590245b5bee70a2553f6faac0d31ca76.1623684253.git.michal.simek@xilinx.com
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d65ec93f |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add nvmem alises for eeproms Use nvmem alias to point to eeprom memory which contains information about board. The change is done based on discussion in the link below. Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9b860b47ec3ca64340b4d29317e92b667236d7d1.1623684253.git.michal.simek@xilinx.com
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8b698f1b |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add phy description for usb3.0 usb3.0 requires serdes setting that's why also wire it up. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/cd856e5f87bc967373691d04e79de3d0022ef424.1623684253.git.michal.simek@xilinx.com
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c821045f |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add pinctrl description for all boards The commit 1dccb5ec0123 ("dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver") and commit 8b242ca700f8 ("pinctrl: Add Xilinx ZynqMP pinctrl driver support") add support for Xilinx ZynqMP pinctrl driver that's why describe pins configuration for current boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/d8bc42600da85f5a23d977d4b61e6528720573e5.1623684253.git.michal.simek@xilinx.com
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d8e4bc0b |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Fix irps5401 device nodes - Add compatible string for irps5401 chip. - Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/10bf5f9e7a18579626fb1850e3a8a7476ba6f2ed.1623684253.git.michal.simek@xilinx.com
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4c65436e |
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14-Jun-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Enable fpd_dma for zcu104 platforms Enable fpd_dma for this board. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/76d330bf2b2414efa2e98965a3ca7f7c43e3645f.1623684253.git.michal.simek@xilinx.com
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55563399 |
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21-Jan-2021 |
Laurent Pinchart <laurent.pinchart@ideasonboard.com> |
arm64: dts: zynqmp: Wire up the DisplayPort subsystem Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to the DisplayPort connector. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com
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63481699 |
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21-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis Add missing xlnx,mio-bank property to sdhci nodes. Also add properties with 0 value to have it listed in case that files are copied to different projects where default case doesn't need to be handled in the same way. That's why explicitly list them too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/dbdfcc1b25af8b28fc658a37ce18902978cb410d.1611224800.git.michal.simek@xilinx.com
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51733f16 |
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21-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 Enable psgtr driver and write clocks property to get sata to work. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/80b52ef97501968ee97fc152363bc4b9b7bb2cff.1611224800.git.michal.simek@xilinx.com
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8cfb5a11 |
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08-Jan-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Fix address for tca6416_u97 chip on zcu104 I2c address is not 0x21 but 0x20. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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13d21eba |
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07-Aug-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Use ethernet-phy as node name for ethernet phys Ethernet phys based on devicetree specification should be using ethernet-phy@ node name instead of pure phy@. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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9c8a47b4 |
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07-Nov-2019 |
Rajan Vaja <rajan.vaja@xilinx.com> |
arm64: dts: xilinx: Add the clock nodes for zynqmp Add clock nodes for zynqmp based on CCF. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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df906cf5 |
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10-Sep-2019 |
Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> |
arm64: zynqmp: Add dr_mode property to usb node This patch adds dr_mode property to the usb node for zynqmp boards. Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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78c484a5 |
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09-Mar-2019 |
Harini Katakam <harini.katakam@xilinx.com> |
arm64: zynqmp: dt: Add TI PHY quirk Add TI PHY strap ctrl quirk for all the HW where applicable. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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612eac3b |
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18-Jan-2018 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for Xilinx zcu104-revA Xilinx zcu104 is another customer board. It is sort of zcu102 clone with some differences. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org>
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