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eaa5907b |
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22-Feb-2024 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2l-smarc: Enable DU and link with DSI Enable DU and link with DSI on RZ/{G2L,G2LC,V2L} SMARC EVK. Move DSI port properties from board dtsi to SoC dtsi and then link with DU and after that enable DU on the board dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240222132117.137729-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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feab6a13 |
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25-Aug-2023 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rz-smarc: Use versa3 clk for audio mclk Currently audio mclk uses a fixed clk of 11.2896MHz (multiple of 44.1kHz). Replace this fixed clk with the programmable versa3 clk that can provide the clocking to support both 44.1kHz (with a clock of 11.2896MHz) and 48kHz (with a clock of 12.2880MHz), based on audio sampling rate for playback and record. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230825090518.87394-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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5d7de61f |
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07-Jul-2023 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Add support for enabling MTU3 Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2LC SMARC EVK. The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when PMOD_MTU3 macro is enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230707155849.86649-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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961eed28 |
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11-Apr-2023 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Link DSI with ADV7535 Enable DSI and ADV7535 and link DSI with ADV7535 on RZ/G2LC SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230411100346.299768-9-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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29df86bb |
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19-Sep-2022 |
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Include SoM DTSI into board DTS Move including the rzg2lc-smarc-som.dtsi from the carrier board rzg2lc-smarc.dtsi to the actual RZ/G2LC SMARC EVK board dts r9a07g044c2-smarc.dts. Also move the SW1 related macros along with PMOD1_SER0 to board dts so that we have all the configuration options in the same file. This patch is to keep consistency with other SMARC EVKs (RZ/G2L, RZ/G2UL) and it makes sense not include the SoM into the carrier board as we might in future have a different carrier board with the same SoM. Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220919092130.93074-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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290cedec |
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03-Jun-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
arm64: dts: renesas: rzg2l-smarc: Use proper bool operator When checking for defined macros, we want the boolean AND not the binary one. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220603232940.21736-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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c62af12c |
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29-Apr-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2l-smarc: Move ssi0 and cpu sound_dai nodes from common dtsi On RZ/G2{L,LC} SoM module, the wm8978 audio codec is connected to ssi0, whereas on RZ/G2UL it is connected to ssi1. So move ssi0 and cpu sound_dai nodes from common dtsi to board specific dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220429072400.23729-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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f40846e7 |
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01-Apr-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi On RZ/G2{L,LC} SoM module, gpio for power selection is connected to P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property of vccq_sdhi1 regulator from common dtsi to soc specific dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220401175427.19078-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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061ba41c |
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01-Apr-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the carrier board. This patch adds pinmux and spi1 nodes to the carrier board dtsi file and drops deleting pinctl* properties from DTS file. RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220401145702.17954-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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4fa1edc8 |
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03-Mar-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2} Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective entries from board dts and adding pincontrol entries to the soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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0a7c1c88 |
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03-Mar-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2l-smarc: Move out i2c3 and Audio codec from common dtsi On RZ/G2L SoM module, the Audio codec is connected to i2c3 bus whereas on RZ/G2LC, it is connected to i2c2 bus. So move out i2c3 and wm8978 nodes from common dtsi to soc specific dtsi. While at it add wm8978 node to RZ/G2LC SoC specific dtsi to fix the build error. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220303164155.7706-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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5c65ad12 |
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04-Feb-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Use SW_SD0_DEV_SEL macro for eMMC/SDHI device selection This patch replaces EMMC/SDHI macros with SW_SD0_DEV_SEL DIP-Switch macro for eMMC/SDHI device selection. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220204143132.3608-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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46da6327 |
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03-Feb-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1 On RZ/G2LC SMARC EVK, CAN0 is not populated. CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4]. This patch adds support for the CAN1 interface on RZ/G2LC SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220203170636.7747-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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fa00d6dc |
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03-Feb-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board SCIF1 interface is available on PMOD1 connector (CN7) on carrier board. This patch adds pinmux and scif1 node to carrier board dtsi file for RZ/G2LC SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220203170636.7747-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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2ed3b5d9 |
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03-Feb-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Add macros for DIP-Switch settings RZ/G2LC SoM uses DIP-SWitch SW1 for various pin multiplexing functions. This patch describes DIP-SWitch SW1 settings on SoM and adds the corresponding macros for enabling pinmux functionality on RZ/G2LC SMARC EVK. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220203170636.7747-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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