History log of /linux-master/scripts/dtc/include-prefixes/arm64/renesas/r8a774c0.dtsi
Revision Date Author Comments
# c53866cb 15-Jan-2024 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Improve TMU interrupt descriptions

Add the input capture interrupt on Timer Unit instances that have it.
Add "interrupt-names" properties for clarity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5c70ad8c2ea14333616c5add31a4a958f4a47081.1705325654.git.geert+renesas@glider.be


# f2802c62 21-Aug-2023 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

arm64: dts: renesas: Handle ADG bit for sound clk_i

Renesas Sound has been using CPG_AUDIO_CLK_I on CPG_CORE for clock,
but this was wrong. Instead, it needs to use CPG_MOD, so clk_i can
handle the "ADG" bit in SMSTPCR9.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Vincenzo De Michele <vincenzo.michele@davinci.de> [r8a77965]
Tested-by: Patrick Keil <patrick.keil@conti-engineering.com> [r8a77965]
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87y1i3sjoc.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87wmxnsjo7.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87v8d7sjo2.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87ttsrsjnx.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87sf8bsjns.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87r0nvsjnn.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87pm3fsjni.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87o7izsjnd.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87msyjsjn9.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87lee3sjn4.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87jztnsjmy.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87il97sjmu.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87h6orsjmp.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87fs4bsjml.wl-kuninori.morimoto.gx@renesas.com
Link: https://lore.kernel.org/r/87edjvsjmg.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 86d904b6 10-May-2023 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

arm64: dts: renesas: Add IOMMU related properties into PCIe host nodes

Add iommu-map and iommu-map-mask properties to the PCIe host nodes.
Note that iommu-map-mask should be zero because the IPMMU assigns
one micro TLB ID only, to the PCIe host.

Also change the dma-ranges arguments for IOMMU. Note that dma-ranges
can be used if the IOMMU is disabled.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230510090358.261266-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 554edc3e 16-Feb-2023 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table

According to the RZ/G Series, 2nd Generation Hardware User’s Manual
Rev. 1.11, the System CPU cores on RZ/G2E do not have their own power
supply, but use the common internal power supply (typical 1.03V).

Hence remove the "opp-microvolt" properties from the Operating
Performance Points table. They are optional, and unused, when none of
the CPU nodes is tied to a regulator using the "cpu-supply" property.

Fixes: 231d8908a66fa98f ("arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/8348e18a011ded94e35919cd8e17c0be1f9acf2f.1676560856.git.geert+renesas@glider.be


# 9e72606c 12-Jan-2023 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

arm64: dts: renesas: #sound-dai-cells is used when simple-card

Current sound comment is indicating that #sound-dai-cells is required,
but it is needed only if board is using "simple-card".
Hence tidy up the comments.

As ulcb.dtsi and salvator-common.dtsi are already using "audio-graph",
the unneeded #sound-dai-cells are removed.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/87cz7ji418.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# c77543ae 29-Aug-2022 Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

arm64: dts: renesas: Drop clock-names property from RPC node

With 'unevaluatedProperties' support implemented, there are a number of
warnings when running dtbs_check:

arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: spi@ee200000: Unevaluated properties are not allowed ('clock-names' was unexpected)
From schema: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml

The main problem is that the DT bindings do not allow clock-names.
So just drop the clock-names properties from the SoC DTSI files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220829215128.5983-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 62e8a534 15-Jun-2022 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Fix thermal-sensors on single-zone sensors

"make dtbs_check":

arch/arm64/boot/dts/renesas/r8a774c0-cat874.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[74], [0]] is too long
arch/arm64/boot/dts/renesas/r8a774c0-ek874.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[79], [0]] is too long
arch/arm64/boot/dts/renesas/r8a774c0-ek874-idk-2121wr.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[82], [0]] is too long
arch/arm64/boot/dts/renesas/r8a774c0-ek874-mipi-2.1.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[87], [0]] is too long
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dtb: thermal-zones: cpu-thermal:thermal-sensors: [[105], [0]] is too long
From schema: Documentation/devicetree/bindings/thermal/thermal-zones.yaml

Indeed, the thermal sensors on R-Car E3 and RZ/G2E support only a single
zone, hence #thermal-sensor-cells = <0>.

Fix this by dropping the bogus zero cell from the thermal sensor
specifiers.

Fixes: 8fa7d18f9ee2dc20 ("arm64: dts: renesas: r8a77990: Create thermal zone to support IPA")
Fixes: 8438bfda9d768157 ("arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/28b812fdd1fc3698311fac984ab8b91d3d655c1c.1655301684.git.geert+renesas@glider.be


# 86aefa0d 08-Jun-2022 Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

arm64: dts: renesas: Add missing space after remote-endpoint

Add the missing space after remote-endpoint in r8a774c0.dtsi and
r8a77990.dtsi before the typo spreads to other files.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20220608175728.1012550-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 6af663af 02-May-2022 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Add interrupt-names to CANFD nodes

The Renesas R-Car CAN-FD Controller on R-Car Gen3 and RZ/G2 SoCs has two
interrupts. Add interrupt-names properties to all CAN-FD device nodes
to identify the individual interrupts, so we can make this property a
required property in the DT bindings.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/10eef1e20372af4a156b06df8e5124666ec7c6b6.1651512451.git.geert+renesas@glider.be


# 747bbcd3 24-Apr-2022 Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

arm64: dts: renesas: Remove empty rgb output endpoints

Endpoints node must have a remote-endpoint property, as endpoints only
exist to model a link between ports. Drop the empty rgb output endpoints
from SoC dtsi files, and declare them in the board dts instead.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20220424161228.8147-2-laurent.pinchart+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# b7423e39 24-Apr-2022 Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

arm64: dts: renesas: Remove empty lvds endpoints

Endpoints node must have a remote-endpoint property, as endpoints only
exist to model a link between ports. Drop the empty lvds endpoints from
SoC dtsi files, they should be instead declared in the board dts or in
overlays.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20220424161228.8147-1-laurent.pinchart+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 7ac8afba 22-Mar-2022 Wolfram Sang <wsa+renesas@sang-engineering.com>

arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodes

Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 953b392a 18-Jan-2022 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Miscellaneous whitespace fixes

Make whitespace and indentation more consistent.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3f2bcae1253c7a31d3eb6755185092a1f2b99b09.1642524439.git.geert+renesas@glider.be


# 7744b393 24-Nov-2021 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Fix operating point table node names

Align the node names of device nodes representing operating point v2
tables with the expectations of the DT bindings in
Documentation/devicetree/bindings/opp/opp-v2.yaml.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/ac885456ffb00fa4cc4069b9967761df2c98c3d8.1637764588.git.geert+renesas@glider.be


# 52e844ee 10-Nov-2021 Wolfram Sang <wsa+renesas@sang-engineering.com>

arm64: dts: reneas: rzg2: Add SDnH clocks

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-9-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-10-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-11-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-12-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# a636d803 18-Jun-2021 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: rzg2: Rename i2c_dvfs to iic_pmic

As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to
"iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware
Rev. 1.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/3fee803a7464a3243e62a943a6a5dce8f1c65a2d.1624016811.git.geert+renesas@glider.be


# 57e47b78 18-Jun-2021 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: r8a774c0: Add generic compatible string to IIC node

According to the Hardware User's Manual, automatic transmission for PMIC
control (DVFS) is not available" on the RZ/G2E SoC. This really means
that support for automatic DVFS is not present, while the IIC automatic
transmission feature itself is still available, albeit not super useful.

Hence there is no longer a reason not to declare compatibility with the
R-Car Gen3-specific and generic versions. Accordingly, extend the reg
property to cover the automatic transmission registers.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/d222c2faa63f95d672efa07e55e8d01bddd17e65.1624013699.git.geert+renesas@glider.be


# 56ed0b3b 24-Feb-2021 Adam Ford <aford173@gmail.com>

arm64: dts: renesas: Add fck to etheravb-rcar-gen3 clock-names list

The bindings have been updated to support two clocks.
Add a clock-names list in the device tree with fck in it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20210224115146.9131-3-aford173@gmail.com
[geert: Update new r8a779a0.dtsi]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 0a96c059 21-Apr-2021 Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi

The port@0 is a mandatory port, add or move the declaration to the CSI-2
nodes top declared in dtsi files instead of depending on dts files
adding them when describing the external connection.

This fixes validation warnings for DTB outputs that do not connect all
CSI-2 receivers to transmitters and thus declaring all port@0 nodes in
dts files.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210421150221.3202955-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 8811955d 02-Jan-2021 Adam Ford <aford173@gmail.com>

arm64: dts: renesas: rzg2: Add RPC-IF Support

The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF).
Add the nodes, but make them disabled by default.

Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# a5200e63 19-Aug-2020 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: rzg2: Convert EtherAVB to explicit delay handling

Some EtherAVB variants support internal clock delay configuration, which
can add larger delays than the delays that are typically supported by
the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
properties).

Historically, the EtherAVB driver configured these delays based on the
"rgmii-*id" PHY mode. This was wrong, as these are meant solely for the
PHY, not for the MAC. Hence properties were introduced for explicit
configuration of these delays.

Convert the RZ/G2 DTS files from the old to the new scheme:
- Add default "rx-internal-delay-ps" and "tx-internal-delay-ps"
properties to the SoC .dtsi files, to be overridden by board files
where needed,
- Convert board files from "rgmii-*id" PHY modes to "rgmii", adding
the appropriate "rx-internal-delay-ps" and/or "tx-internal-delay-ps"
overrides.

Notes:
- RZ/G2E does not support TX internal delay handling.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200819134344.27813-8-geert+renesas@glider.be


# c91dfc98 17-Sep-2020 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels

According to Technical Update TN-RCT-S0352A/E, MSIOF1 DMA can only be
used with SYS-DMAC0 on R-Car E3.

Fixes: 62c0056f1c3eb15d ("arm64: dts: renesas: r8a774c0: Add MSIOF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200917132117.8515-3-geert+renesas@glider.be


# a2053990 21-Aug-2020 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Fix pin controller node names

According to Devicetree Specification v0.2 and later, Section "Generic
Names Recommendation", the node name for a pin controller device node
should be "pinctrl".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200821112433.5652-1-geert+renesas@glider.be


# 0c77ecdc 14-Aug-2020 Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add PCIe EP node

Add PCIe EP node to R8A774C0 (RZ/G2E) SoC dtsi.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20200814173037.17822-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# a6cb262a 10-Jul-2020 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

arm64: dts: renesas: Fix SD Card/eMMC interface device node names

Fix the device node names as "mmc@".

Fixes: 663386c3e1aa ("arm64: dts: renesas: r8a774a1: Add SDHI nodes")
Fixes: 9b33e3001b67 ("arm64: dts: renesas: Initial r8a774b1 SoC device tree")
Fixes: 77223211f44d ("arm64: dts: renesas: r8a774c0: Add SDHI nodes")
Fixes: d9d67010e0c6 ("arm64: dts: r8a7795: Add SDHI support to dtsi")
Fixes: a513cf1e6457 ("arm64: dts: r8a7796: add SDHI nodes")
Fixes: 111cc9ace2b5 ("arm64: dts: renesas: r8a77961: Add SDHI nodes")
Fixes: f51746ad7d1f ("arm64: dts: renesas: Add Renesas R8A77961 SoC support")
Fixes: df863d6f95f5 ("arm64: dts: renesas: initial R8A77965 SoC device tree")
Fixes: 9aa3558a02f0 ("arm64: dts: renesas: ebisu: Add and enable SDHI device nodes")
Fixes: 83f18749c2f6 ("arm64: dts: renesas: r8a77995: Add SDHI (MMC) support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1594382634-13714-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# cf8ae446 21-Apr-2020 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

arm64: dts: renesas: Fix IOMMU device node names

Fix IOMMU device node names as "iommu@".

Fixes: 8f507babc617 ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes")
Fixes: 63093a8e58be ("arm64: dts: renesas: r8a774b1: Add IPMMU device nodes")
Fixes: 6c7e02178e8f ("arm64: dts: renesas: r8a774c0: Add IPMMU device nodes")
Fixes: 3b7e7848f0e8 ("arm64: dts: renesas: r8a7795: Add IPMMU device nodes")
Fixes: e4b9a493df45 ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes")
Fixes: 389baa409617 ("arm64: dts: renesas: r8a7796: Add IPMMU device nodes")
Fixes: 55697cbb44e4 ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes")
Fixes: ce3b52a1595b ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes")
Fixes: a3901e7398e1 ("arm64: dts: renesas: r8a77995: Add IPMMU device nodes")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1587461775-13369-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 721b7619 18-Feb-2020 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: rzg2: Add reset control properties for display

Add reset control properties to the device nodes for the Display Units
on all supported RZ/G2 SoCs. Note that on these SoCs, there is only a
single reset for each pair of DU channels.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-5-geert+renesas@glider.be


# 03abfdd3 05-Nov-2019 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: rcar-gen3: Replace "vsps" by "renesas,vsps"

The Renesas-specific "vsps" property lacks a vendor prefix.
Add a "renesas," prefix to comply with DT best practises.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20191105183504.21447-4-geert+renesas@glider.be


# 9504a9f2 13-Dec-2019 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Group tuples in pci ranges and dma-ranges properties

To improve human readability and enable automatic validation, the tuples
in the "ranges" and "dma-ranges" properties of PCI device nodes should
be grouped.

Fix this by grouping the tuples of the "ranges" and "dma-ranges"
properties using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-8-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>


# 0aab5b91 13-Dec-2019 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: Group tuples in interrupt properties

To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped. While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property.

Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-7-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>


# 652fd0f4 13-Sep-2019 Biju Das <biju.das@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add dynamic power coefficient

Describe the dynamic power coefficient of A53 CPUs.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-2-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 8438bfda 13-Sep-2019 Biju Das <biju.das@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Create thermal zone to support IPA

Setup a thermal zone driven by SoC temperature sensor.
Create passive trip points and bind them to CPUFreq cooling
device that supports power extension.

Based on the work done by Dien Pham <dien.pham.ry@renesas.com>
and others for r8a77990 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Link: https://lore.kernel.org/r/1568364608-46548-1-git-send-email-biju.das@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 38290431 06-Jul-2019 Jacopo Mondi <jacopo+renesas@jmondi.org>

arm64: dts: renesas: Update 'vsps' properties for readability

Update the 'vsps' property in the R-Car Gen3 SoC device tree files to
match what's in the documentation example.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 23ad2b46 21-Aug-2019 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: r8a774c0: Fix register range of display node

Since the R8A774C0 SoC uses DU{0,1} only, the register block length
should be 0x40000.

Based on commit 06585ed38b6698bc ("arm64: dts: renesas: r8a77990: Fix
register range of display node") for R-Car E3.

Fixes: 8ed3a6b223159df3 ("arm64: dts: renesas: r8a774c0: Add display output support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>


# e376df94 19-Aug-2019 Yoshihiro Kaneko <ykaneko0929@gmail.com>

arm64: dts: renesas: r8a774c0: Sort nodes

Sort nodes.

If node address is present
* Sort by node address, grouping all nodes with the same compat string
and sorting the group alphabetically.
Else
* Sort alphabetically

This should not have any run-time effect.

Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# a2fe2cd2 02-Aug-2019 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Point LVDS0 to its companion LVDS1

Add the new renesas,companion property to the LVDS0 node to point to the
companion LVDS encoder LVDS1.
Based on similar work from Laurent Pinchart for the r8a7799[05].

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# e8efd2a8 13-Jun-2019 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add missing assigned-clocks for CAN[01]

Define "assigned-clocks" and "assigned-clock-rates" properties
for CAN[01] DT nodes, as required by the dt-bindings.

Fixes: 036bc85c1d06ef0a ("arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes")
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


# 7794bd7e 23-May-2019 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

arm64: dts: renesas: Revise usb2_phy nodes and phys properties

Since the commit 233da2c9ec22 ("dt-bindings: phy: rcar-gen3-phy-usb2:
Revise #phy-cells property") revised the #phy-cells, this patch follows
the updated document for R-Car Gen3 and RZ/A2 SoCs.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 11290c09 21-May-2019 Robin Murphy <robin.murphy@arm.com>

arm64: dts: renesas: r8a774c0: Clean up CPU compatibles

Apparently this DTS crossed over with commit 31af04cd60d3 ("arm64: dts:
Remove inconsistent use of 'arm,armv8' compatible string") and missed
out on the cleanup, so put it right.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 036bc85c 16-Jan-2019 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add clkp2 clock to CAN nodes

According to the latest information, clkp2 is available on RZ/G2.
Modify CAN0 and CAN1 nodes accordingly.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 80bc6dbb 01-Mar-2019 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add CANFD support

The CANFD implementation on the RZ/G2E (a.k.a. r8a774c0) is
identical to the one found on the r8a77990.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 82ec0092 10-Mar-2019 Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

arm64: dts: renesas: r8a774c0: Remove invalid compatible value for CSI40

The compatible value renesas,rcar-gen3-csi2 was used while prototyping
the R-Car CSI-2 driver but was removed before the driver was merged.

Fixes: e961ab42e034d469 ("arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 12ce412b 14-Feb-2019 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Fix cpu nodes style

We usually leave a space between "=" and the value of device
tree properties, but unfortunately that was overlooked for the
"clocks" property of cpu@0 and cpu@1.
This patch fixes the spacing with the "clocks" property of
cpu@0 and cpu@1.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# c21cd4ae 21-Feb-2019 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: r8a774c0: Fix SCIF5 DMA channels

Correct the DMA channels for SCIF5 from 16..47 to 0..15, as was done for
R-Car E3.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Fixes: 2660a6af690ebbb4 ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 2262798c 04-Feb-2019 Biju Das <biju.das@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add TMU device nodes

This patch adds TMU{0|1|2|3|4} device nodes for r8a774c0 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# fa930bb6 04-Feb-2019 Biju Das <biju.das@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add CMT device nodes

This patch adds CMT{0|1|2|3} device nodes for r8a774c0 SoC.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 231d8908 31-Jan-2019 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices

This patch defines OOP tables for all CPUs, similarly to
what done by Takeshi Kihara and Yoshihiro Kaneko for the
R8A77990.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# d9fd4e58 10-Jan-2019 Geert Uytterhoeven <geert+renesas@glider.be>

arm64: dts: renesas: r8a774c0: Enable DMA for SCIF2

SCIF2 on RZ/G2E can be used with both DMAC1 and DMAC2.

Fixes: 1b24f9e8ea3ff95f ("arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# e961ab42 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add VIN and CSI-2 device nodes

Add device nodes for VIN4, VIN5 and CSI40 to RZ/G2E (a.k.a. R8A774C0)
SoC specific device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# f0c2aa16 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add PCIe device node

This patch adds PCI express channel 0 device tree node to the
RZ/G2E (a.k.a. R8A774C0) SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 52a20e64 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Connect RZ/G2E Audio-DMAC to IPMMU

Hook up the RZ/G2E Audio-DMAC device to IPMMU-MP as stated by the
RZ/G2 User's manual.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 4035f91a 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Connect RZ/G2E AVB to IPMMU

Hook up the RZ/G2E AVB device to IPMMU-DS0 as stated by the
RZ/G2 User's manual.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 3cdc999d 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Connect RZ/G2E SYS-DMAC to IPMMU

Hook up SYS-DMAC0, SYS-DMAC1, and SYS-DMAC2 to IPMMU-DS0 and
IPMMU-DS1, according to what reported by the RZ/G2 User's manual.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 3a6addca 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add USB3.0 device nodes

Add usb3.0 host and function device nodes to the RZ/G2E SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 19777736 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add USB-DMAC and HSUSB device nodes

Add usb dmac and hsusb device nodes on RZ/G2E SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 89893580 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add USB2.0 phy and host device nodes

Add USB2.0 phy and host (EHCI/OHCI) device tree nodes to the RZ/G2E
SoC dtsi.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 8ed3a6b2 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add display output support

The RZ/G2E (a.k.a. R8A774C0) has one RGB output and two LVDS
outputs connected to DU.
This patch add support for DU, LVDS encoders, VSP and FCP.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 47f63867 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add PWM support

Add PWM support to the RZ/G2E (a.k.a. R8A774C0) SoC specific
device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# cf8f74d6 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add audio support

Add sound support for the RZ/G2E SoC (a.k.a. R8A774C0).

This work is based on similar work done on the R8A77990 SoC
by Yoshihiro Kaneko <ykaneko0929@gmail.com>.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 62c0056f 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add MSIOF nodes

Add the device nodes for all MSIOF SPI controllers on RZ/G2E SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 6e9dd34e 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add thermal support

This patch adds the thermal device node and the thermal-zones
node to the SoC specific dtsi for the RZ/G2E.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 59c3a00d 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add CAN nodes

Add the device nodes for both RZ/G2E CAN channels.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 6c7e0217 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add IPMMU device nodes

Add r8a774c0 IPMMU nodes.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# abf8cc35 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add I2C and IIC-DVFS support

Add the I2C[0-7] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774c0 device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 77223211 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add SDHI nodes

Add SDHI nodes to the DT of the r8a774c0 SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 9b55a05e 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add secondary CA53 CPU core

Add a device node for the second Cortex-A53 CPU core on the Renesas
RZ/G2E (a.k.a r8a774c0) SoC, and adjust the interrupt delivery masks
for the ARM Generic Interrupt Controller and Architectured Timer.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 8d68821c 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add watchdog support

Add watchdog support to the RZ/G2E (a.k.a. R8A774C0) SoC
specific device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 2f71109e 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add Ethernet AVB node

This patch adds the SoC specific part of the Ethernet AVB
device tree node.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# fccd45bd 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add GPIO device nodes

Add GPIO device nodes to the DT of the r8a774c0 SoC.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 788e55b6 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add PFC support

Add PFC support to the RZ/G2E (a.k.a. r8a774c0) SoC specific
device tree.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 13fd6932 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add INTC-EX device node

Add support for the Interrupt Controller for External Devices
(INTC-EX) on RZ/G2E.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# 2660a6af 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add SCIF and HSCIF nodes

Add the device nodes for all RZ/G2E SCIF and HSCIF serial ports,
including clocks, power domains and DMAs.
According to the HW user manual, SCIF[015] and HSCIF[012] are
connected to both SYS-DMAC1 and SYS-DMAC2, while SCIF[34] and
HSCIF[34] are connected to SYS-DMAC0.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# e2088cf8 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: r8a774c0: Add SYS-DMAC controller nodes

Add sys-dmac[012] device nodes for the RZ/G2E SoC (a.k.a. r8a774c0).

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>


# c257628d 14-Dec-2018 Fabrizio Castro <fabrizio.castro@bp.renesas.com>

arm64: dts: renesas: Initial device tree for r8a774c0

Basic support for the RZ/G2E SoC (a.k.a. r8a774c0).

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>