History log of /linux-master/include/soc/tegra/bpmp-abi.h
Revision Date Author Comments
# bde3ce72 12-Sep-2023 Deming Wang <wangdeming@inspur.com>

firmware: tegra: Fix a typo

successfully, not 'succesfully'

Signed-off-by: Deming Wang <wangdeming@inspur.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>


# b204b92b 27-Oct-2022 Peter De Schrijver <pdeschrijver@nvidia.com>

firmware: tegra: Update BPMP ABI

Update the BPMP ABI to align with the the latest version.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>


# fcfaff50 07-Feb-2022 Tom Rix <trix@redhat.com>

soc/tegra: bpmp: cleanup double word in comment

Remove the second 'or'.

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>


# 4e871899 12-Jul-2020 Jon Hunter <jonathanh@nvidia.com>

firmware: tegra: Update BPMP ABI

Update the BPMP ABI to align with the the latest version.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>


# 5e37b9c1 12-Jul-2020 Jon Hunter <jonathanh@nvidia.com>

firmware: tegra: Add support for in-band debug

Add support for retrieving BPMP debug information via in-band messaging
as opposed to using shared-memory which older BPMP firmware used. Note
that it is possible to detect at runtime whether the BPMP firmware being
used supports the in-band messaging for retrieving the debug
informaation. Therefore, if the BPMP firmware supports the in-band
messaging for debug use this and otherwise fall-back to using shared
memory.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>


# ee22d0c5 03-Mar-2020 Vidya Sagar <vidyas@nvidia.com>

soc/tegra: bpmp: Update ABI header

Update the firmware header to support uninitialization of UPHY PLL
when the PCIe controller is operating in endpoint mode and host cuts
the PCIe reference clock.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>


# 9952f691 28-May-2019 Thomas Gleixner <tglx@linutronix.de>

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201

Based on 1 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms and conditions of the gnu general public license
version 2 as published by the free software foundation this program
is distributed in the hope it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details you should have received a copy of the gnu general
public license along with this program if not see http www gnu org
licenses

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 228 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>


# 4bef358c 22-Oct-2018 Timo Alho <talho@nvidia.com>

soc/tegra: bpmp: Update ABI header

Update the firmware header file to a more recent version. The major
changes in the new version are:

* add a new MRQ for firmware version query ABI and deprecates the old
* add ABI to query Tegra194 CPU frequency limits
* add ABI to control subset of PCIE UPHY state

The new header contains also some editorial changes to the
documentation.

Signed-off-by: Timo Alho <talho@nvidia.com>
Acked-by: Sivaram Nair <sivaramn@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>


# 52b8b803 29-Mar-2017 Thierry Reding <treding@nvidia.com>

soc/tegra: bpmp: Update ABI header

Update the BPMP ABI header to a more recent version. The new version
adds support for a new powergating ABI as well as access to the ring
buffer console, which allows debug messages to be output to the BPMP
debug console.

Some of the previously undocumented fields have been documented and
missing bitmasks have been added. Furthermore the MRQ_RESET request
now has a sub-command that allows to determine the maximum ID which
in turn allows the resets to be enumerated, thereby allowing drivers
to become agnostic of the Tegra generation.

Signed-off-by: Thierry Reding <treding@nvidia.com>


# 983de5f9 19-Aug-2016 Thierry Reding <treding@nvidia.com>

firmware: tegra: Add BPMP support

The Boot and Power Management Processor (BPMP) is a co-processor found
on Tegra SoCs. It is designed to handle the early stages of the boot
process and offload power management tasks (such as clocks, resets,
powergates, ...) as well as system control services.

Compared to the ARM SCPI, the services provided by BPMP are message-
based rather than method-based. The BPMP firmware driver provides the
services to transmit data to and receive data from the BPMP. Users can
also register a Message ReQuest (MRQ), for which a service routine will
be run when a corresponding event is received from the firmware.

A set of messages, called the BPMP ABI, are specified for a number of
different services provided by the BPMP (such as clocks or resets).

Based on work by Sivaram Nair <sivaramn@nvidia.com> and Joseph Lo
<josephl@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>