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b3f9581a |
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08-Aug-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
dt-bindings: clock: samsung: remove define with number of clocks Number of clocks supported by Linux drivers might vary - sometimes we add new clocks, not exposed previously. Therefore these numbers of clocks should not be in the bindings, as that prevents changing them. Remove it entirely from the bindings, once Linux drivers stopped using them. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20230808082738.122804-12-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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d68f50e6 |
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18-Oct-2021 |
Marek Szyprowski <m.szyprowski@samsung.com> |
dt-bindings: clock: samsung: add IDs for some core clocks Add IDs for some core clocks referenced during the boot process. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20211018125456.8292-1-m.szyprowski@samsung.com Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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7ef91224 |
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18-Jun-2019 |
Krzysztof Kozlowski <krzk@kernel.org> |
clk: samsung: Add bus clock for GPU/G3D on Exynos4412 Add ID and gate for bus clock for GPU (Mali 400) on Exynos4412. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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cd9102e9 |
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27-Sep-2018 |
Krzysztof Kozlowski <krzk@kernel.org> |
dt-bindings: clock: samsung: Add SPDX license identifiers Replace GPL license statements with SPDX license identifiers (GPL-2.0). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
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9dbcfe1a |
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27-Sep-2018 |
Krzysztof Kozlowski <krzk@kernel.org> |
dt-bindings: clock: samsung: Add SPDX license identifiers Replace GPL license statements with SPDX license identifiers (GPL-2.0). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
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fa34efff |
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11-Oct-2017 |
Marek Szyprowski <m.szyprowski@samsung.com> |
clk: samsung: Remove obsolete code for Exynos4412 ISP clocks Exynos4412 ISP clock are provided by separate Exynos4412 ISP clock driver, so support for them in Exynos4-clk driver can be removed. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
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8ca8ac10 |
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11-Oct-2017 |
Marek Szyprowski <m.szyprowski@samsung.com> |
clk: samsung: Add dt bindings for Exynos4412 ISP clock controller Some registers for the Exynos 4412 ISP (Camera subsystem) clocks are located in the ISP power domain. Because those registers are also located in a different memory region than the main clock controller, support for them can be provided by a separate clock controller. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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94af7a3c |
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18-Oct-2015 |
Krzysztof Kozlowski <krzk@kernel.org> |
clk: samsung: exynos4: Add SSS gate clock Add a gate clock for controlling all clocks of Security Sub System (SSS). Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
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e64fb42d |
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14-Jan-2015 |
Chanwoo Choi <cw00.choi@samsung.com> |
clk: samsung: exynos4: Add divider clock id for memory bus frequency This patch adds the divider clock id for Exynos4 memory bus frequency. The clock id is used for DVFS (Dynamic Voltage/Frequency Scaling) feature of the exynos memory bus. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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4676f0aa |
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01-Jul-2014 |
Marek Szyprowski <m.szyprowski@samsung.com> |
clk: samsung: exynos4: add support for MOUT_HDMI and MOUT_MIXER clocks This patch adds support for exporting mout_hdmi and mout_mixer to device tree. Access to those clocks is required to correctly setup HDMI module on Exynos 4210 and 4x12 SoCs. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> CC: Mike Turquette <mturquette@linaro.org> CC: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
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c1425430 |
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16-Sep-2014 |
Marek Szyprowski <m.szyprowski@samsung.com> |
clk: samsung: exynos4: add missing smmu_g2d clock and update comments This patch adds missing smmu_g2d clock implementation and updates comment about Exynos4 clocks from 278-282 range. Those clocks are available on all Exynos4 SoC series, so the misleading comment has been removed. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
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f65d5189 |
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25-Jul-2014 |
Tomasz Figa <t.figa@samsung.com> |
clk: samsung: trivial: Correct typo in author's name This patch corrects mistyped author's name in four header files. While at it, a copy/paste error in author's e-mail in one of the headers is also fixed. Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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01f7ec26 |
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24-Jun-2014 |
Tomasz Figa <t.figa@samsung.com> |
clk: samsung: exynos4: Add CLKOUT clock hierarchy This patch adds definitions of clocks that are used to drive clock output signals of particular CMU sub-blocks that are then fed to PMU and handled by Exynos CLKOUT driver added in further patch. Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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17d3f1d2 |
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27-May-2014 |
Jonghwa Lee <jonghwa3.lee@samsung.com> |
clk: exynos4: Add PPMU IP block source clocks. Exynos4 has saveral PPMUs and each of them has operation clock which can be gated through CMU's SFR control. New clocks are listed below. All clocks are added as a gate-typed clock. CLK_PPMULEFT, CLK_PPMURIGHT, CLK_PPMUCAMIF, CLK_PPMUTV, CLK_PPMUMFC_L, CLK_PPMUMFC_R, CLK_G3D, CLK_PPMUIMAGE, CLK_PPMULCD0, CLK_PPMULCD1, CLK_PPMUFILE, CLK_PPMUGPS, CLK_PPMUDMC0, CLK_PPMUDMC1, CLK_PPMUCPU, CLK_PPMUACP, Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Myungjoo Ham <myungjoo.ham@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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a5b219b4 |
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04-Apr-2014 |
Tomasz Stanislawski <t.stanislaws@samsung.com> |
clk: samsung: exynos4: export sclk_hdmiphy clock Export sclk_hdmiphy clock to be usable from DT. Signed-off-by: Tomasz Stanislawski <t.stanislaws@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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04bc7d96 |
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15-Apr-2014 |
Sylwester Nawrocki <s.nawrocki@samsung.com> |
clk: samsung: exynos4: Use single clock ID for CLK_MDMA gate clocks Exynos4210 and Exynos4x12 SoCs have the PL330 MDMA IP block clock defined exactly in same way in documentation. Using different names for these clocks is a bit misleading. Since there is no users of CLK_MDMA2 in existing dts files this patch drops CLK_MDMA2 and replaces it with CLK_MDMA in the driver. This ensures PL330 MDMA has correct clock assigned on Exynos4x12 SoCs. Suggested-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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26460bc5 |
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07-Jan-2014 |
Andrzej Hajda <a.hajda@samsung.com> |
ARM: exynos4: create a DT header defining CLK IDs The patch adds header file defining clock IDs. This allows to use macros instead of magic numbers in DT bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
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