History log of /linux-master/include/drm/amd_asic_type.h
Revision Date Author Comments
# eddb24a8 06-Mar-2024 Jani Nikula <jani.nikula@intel.com>

drm/amdgpu: make amd_asic_type.h self-contained

Include <linux/types.h> for u8.

Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/115327b880b69b1c8ad157e5ff7f6b419868fab0.1709749576.git.jani.nikula@intel.com


# dbab6356 31-Oct-2023 Ma Jun <Jun.Ma2@amd.com>

drm/amdgpu: Optimize the asic type fix code

Use a new struct array to define the asic information which
asic type needs to be fixed.

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 3ae695d6 09-Aug-2021 Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: add new asic_type for IP discovery

Add a new asic type for asics where we don't have an
explicit entry in the PCI ID list. We don't need
an asic type for these asics, other than something higher
than the existing ones, so just use this for all new
asics.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# d0f56dc2 13-Jul-2021 Tao Zhou <tao.zhou1@amd.com>

drm/amdgpu: add cyan_skillfish asic type

Add cyan_skillfish asic family.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# ee9236b7 03-Nov-2020 Aaron Liu <aaron.liu@amd.com>

drm/amdgpu: add yellow carp asic_type enum

This patch adds yellow carp to amd_asic_type enum and amdgpu_asic_name[].

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 6f169591 13-Oct-2020 Chengming Gui <Jack.Gui@amd.com>

drm/amd/amdgpu: add beige_goby asic type

Add chip type for beige_goby

v2: fix enum count (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# d46b417a 11-Nov-2019 Le Ma <le.ma@amd.com>

drm/amdgpu: add aldebaran asic type

Add aldebaran in amdgpu_asic_name array and amdgpu_asic_type enum

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# a2468e04 02-Oct-2020 Tao Zhou <tao.zhou1@amd.com>

drm/amdgpu: add dimgrey_cavefish asic type

Add chip type for dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 4f1e9a76 27-Aug-2020 Huang Rui <ray.huang@amd.com>

drm/amdgpu: add van gogh asic_type enum (v2)

This patch adds van gogh to amd_asic_type enum and amdgpu_asic_name[].

v2: add missing comma

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# ddd8fbe7 09-Feb-2020 Jiansong Chen <Jiansong.Chen@amd.com>

drm/amdgpu: add navy_flounder asic type

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# ccaf72d3 18-Mar-2019 Likun Gao <Likun.Gao@amd.com>

drm/amdgpu: add sienna_cichlid asic type

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 4e66d7d2 30-Aug-2019 Yong Zhao <Yong.Zhao@amd.com>

drm/amdgpu: Add a kernel parameter for specifying the asic type

As more and more new asics start to reuse the old device IDs before
launch, there is a need to quickly override the existing asic type
corresponding to the reused device ID through a kernel parameter. With
this, engineers no longer need to rely on local hack patches,
facilitating cooperation across teams.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 050091ab 03-Sep-2019 Yong Zhao <Yong.Zhao@amd.com>

drm/amdkfd: Query kfd device info by CHIP id instead of pci device id

This optimizes out the pci device id usage in KFD and makes the code
more maintainable.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 1eee4228 24-Jul-2019 Huang Rui <ray.huang@amd.com>

drm/amdgpu: add renoir asic_type enum

This patch adds renoir to amd_asic_type enum and amdgpu_asic_name[].

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 9802f5d7 17-Dec-2018 Xiaojie Yuan <xiaojie.yuan@amd.com>

drm/amdgpu: add navi12 asic type

Add asic type.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# d6c3b24e 09-Jul-2019 Le Ma <le.ma@amd.com>

drm/amdgpu: add Arcturus asic type

Add asic type for Arcturus.

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 87dbad02 17-Dec-2018 Xiaojie Yuan <xiaojie.yuan@amd.com>

drm/amdgpu: add navi14 asic type

Add CHIP_NAVI14 to the list of asic types.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 852a6626 18-Jul-2017 Huang Rui <ray.huang@amd.com>

drm/amdgpu: add navi10 asic type

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 741deade 13-Sep-2018 Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: simplify Raven, Raven2, and Picasso handling

Treat them all as Raven rather than adding a new picasso
asic type. This simplifies a lot of code and also handles the
case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu
fw handling for picasso.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# be9699e3 10-Jul-2018 Likun Gao <Likun.Gao@amd.com>

drm/amdgpu: add picasso to asic_type enum

Add picasso to amd_asic_type enum and amdgpu_asic_name[].

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 956fcddc 19-Apr-2018 Feifei Xu <Feifei.Xu@amd.com>

drm/amdgpu: Add vega20 to asic_type enum.

Add vega20 to amd_asic_type enum and amdgpu_asic_name[].

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 48ff108d 09-Nov-2017 Leo Liu <leo.liu@amd.com>

drm/amdgpu: add VEGAM ASIC type

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>


# 8fab806a 19-Oct-2017 Feifei Xu <Feifei.Xu@amd.com>

drm/amdgpu: add vega12 to asic_type enum

Add vega12 to amd_asic_type enum and amdgpu_asic_name[].

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>


# f674bd28 28-Jun-2017 Akshu Agrawal <akshu.agrawal@amd.com>

drm/amdgpu Moving amdgpu asic types to a separate file

Amdgpu asic types will be required for other drivers too.
Hence, its better to keep it in a separate include file.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>