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882cdb06 |
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07-Aug-2023 |
Peter Zijlstra <peterz@infradead.org> |
x86/cpu: Fix Gracemont uarch Alderlake N is an E-core only product using Gracemont micro-architecture. It fits the pre-existing naming scheme perfectly fine, adhere to it. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230807150405.686834933@infradead.org
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4e3ecc28 |
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19-Dec-2022 |
Zhang Rui <rui.zhang@intel.com> |
thermal/intel/intel_tcc_cooling: Use Intel TCC library Cleanup the code by using Intel TCC library for TCC (Thermal Control Circuitry) MSR access. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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e77f069f |
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08-Nov-2022 |
Zhang Rui <rui.zhang@intel.com> |
thermal: intel: intel_tcc_cooling: Add TCC cooling support for RaptorLake-S Add RaptorLake to the list of processor models supported by the Intel TCC cooling driver. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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be6abd3e |
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08-Nov-2022 |
Zhang Rui <rui.zhang@intel.com> |
thermal: intel: intel_tcc_cooling: Detect TCC lock bit When MSR_IA32_TEMPERATURE_TARGET is locked, TCC Offset can not be updated even if the PROGRAMMABE Bit is set. Yield the driver on platforms with MSR_IA32_TEMPERATURE_TARGET locked. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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312c1a44 |
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28-Jul-2022 |
Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> |
thermal: intel: Add TCC cooling support for Alder Lake-N and Raptor Lake-P Add Alder Lake-N and Raptor Lake-P to the list of processor models supported by the Intel TCC cooling driver. Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Acked-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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62f46fc7 |
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06-May-2022 |
Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> |
thermal: intel_tcc_cooling: Add TCC cooling support for RaptorLake Add RaptorLake to the list of processor models supported by the Intel TCC cooling driver. Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> [ rjw: Subject edits, new changelog ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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a414a08a |
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09-Aug-2021 |
Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> |
drivers/thermal/intel: Add TCC cooling support for AlderLake platform Add tcc cooling support for the AlderLake platform. Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210809115635.10100-1-sumeet.r.pawnikar@intel.com
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2eb87d75 |
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12-Apr-2021 |
Zhang Rui <rui.zhang@intel.com> |
thermal/drivers/intel: Introduce tcc cooling driver On Intel processors, the core frequency can be reduced below OS request, when the current temperature reaches the TCC (Thermal Control Circuit) activation temperature. The default TCC activation temperature is specified by MSR_IA32_TEMPERATURE_TARGET. However, it can be adjusted by specifying an offset in degrees C, using the TCC Offset bits in the same MSR register. This patch introduces a cooling devices driver that utilizes the TCC Offset feature. The bigger the current cooling state is, the lower the effective TCC activation temperature is, so that the processors can be throttled earlier before system critical overheats. Note that, on different platforms, the behavior might be different on how fast the setting takes effect, and how much the CPU frequency is reduced. This patch has been tested on a KabyLake mobile platform from me, and also on a CometLake platform from Doug. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Tested by: Doug Smythies <dsmythies@telus.net> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210412125901.12549-1-rui.zhang@intel.com
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