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cff49d58 |
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28-Nov-2023 |
Chia-Lin Kao (AceLan) <acelan.kao@canonical.com> |
spi: Unify error codes by replacing -ENOTSUPP with -EOPNOTSUPP This commit updates the SPI subsystem, particularly affecting "SPI MEM" drivers and core parts, by replacing the -ENOTSUPP error code with -EOPNOTSUPP. The key motivations for this change are as follows: 1. The spi-nor driver currently uses EOPNOTSUPP, whereas calls to spi-mem might return ENOTSUPP. This update aims to unify the error reporting within the SPI subsystem for clarity and consistency. 2. The use of ENOTSUPP has been flagged by checkpatch as inappropriate, mainly being reserved for NFS-related errors. To align with kernel coding standards and recommendations, this change is being made. 3. By using EOPNOTSUPP, we provide more specific context to the error, indicating that a particular operation is not supported. This helps differentiate from the more generic ENOTSUPP error, allowing drivers to better handle and respond to different error scenarios. Risks and Considerations: While this change is primarily intended as a code cleanup and error code unification, there is a minor risk of breaking user-space applications that rely on specific return codes for unsupported operations. However, this risk is considered low, as such use-cases are unlikely to be common or critical. Nevertheless, developers and users should be aware of this change, especially if they have scripts or tools that specifically handle SPI error codes. This commit does not introduce any functional changes to the SPI subsystem or the affected drivers. Signed-off-by: "Chia-Lin Kao (AceLan)" <acelan.kao@canonical.com> Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Michael Walle <michael@walle.cc> Link: https://lore.kernel.org/r/20231129064311.272422-1-acelan.kao@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
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4d70dd0a |
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17-Mar-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
spi: atmel-quadspi: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230317084232.142257-4-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
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9448bc1d |
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17-Mar-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
spi: atmel-quadspi: Free resources even if runtime resume failed in .remove() An early error exit in atmel_qspi_remove() doesn't prevent the device unbind. So this results in an spi controller with an unbound parent and unmapped register space (because devm_ioremap_resource() is undone). So using the remaining spi controller probably results in an oops. Instead unregister the controller unconditionally and only skip hardware access and clk disable. Also add a warning about resume failing and return zero unconditionally. The latter has the only effect to suppress a less helpful error message by the spi core. Fixes: 4a2f83b7f780 ("spi: atmel-quadspi: add runtime pm support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230317084232.142257-3-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
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c18bbac3 |
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17-Mar-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
spi: atmel-quadspi: Don't leak clk enable count in pm resume The pm resume call is supposed to enable two clocks. If the second enable fails the callback reports failure but doesn't undo the first enable. So call clk_disable() for the first clock when clk_enable() for the second one fails. Fixes: 4a2f83b7f780 ("spi: atmel-quadspi: add runtime pm support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20230317084232.142257-2-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
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ccbc6554 |
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10-Jan-2023 |
Yang Yingliang <yangyingliang@huawei.com> |
spi: atmel-quadspi: switch to use modern name Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20230110131805.2827248-4-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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f732646d |
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16-Nov-2022 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Add support for configuring CS timing The at91 QSPI IP uses a default value of half of the period of the QSPI clock period for the cs-setup time, which is not always enough, an example being the sst26vf064b SPI NOR flash which requires a minimum cs-setup time of 5 ns. It was observed that none of the at91 SoCs can fulfill the minimum CS setup time for the aforementioned flash, as they operate at high frequencies and half a period does not suffice for the required CS setup time. Add support for configuring the CS timing in the controller. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20221117105249.115649-5-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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af7c2d41 |
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09-Jun-2022 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
spi: atmel-quadspi: align condition to parenthesis Align condition to parenthesis. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220609084246.1795419-4-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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f11ec1cc |
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09-Jun-2022 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
spi: atmel-quadspi: use pm_ptr() Use pm_ptr() for atmel_quadspi_pm_ops. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220609084246.1795419-3-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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4a2f83b7 |
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09-Jun-2022 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
spi: atmel-quadspi: add runtime pm support Add runtime PM support for atmel-quadspi which will disable/enable QSPI clocks on proper runtime_suspend/runtime_resume ops. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220609084246.1795419-2-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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f4cf11df |
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06-Apr-2022 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Remove duplicated DTR checks Remove the DTR checks as they are already handled in spi_mem_default_supports_op(). This code removal was intentionally not done in the previous patch that introduced the use of the spi_mem_default_supports_op() core helper and fixed the buswidth adjustment between SPIMEM and the SPI controller, so that the fix can be easily backported to stable kernels. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220406133604.455356-2-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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8c235cc2 |
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06-Apr-2022 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Fix the buswidth adjustment between spi-mem and controller Use the spi_mem_default_supports_op() core helper in order to take into account the buswidth specified by the user in device tree. Cc: <stable@vger.kernel.org> Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20220406133604.455356-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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09134c53 |
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07-Sep-2021 |
Yoshitaka Ikeda <ikeda@nskint.co.jp> |
spi: Fixed division by zero warning The reason for dividing by zero is because the dummy bus width is zero, but if the dummy n bytes is zero, it indicates that there is no data transfer, so there is no need for calculation. Fixes: 7512eaf54190 ("spi: cadence-quadspi: Fix dummy cycle calculation when buswidth > 1") Signed-off-by: Yoshitaka Ikeda <ikeda@nskint.co.jp> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/OSZPR01MB70049C8F56ED8902852DF97B8BD49@OSZPR01MB7004.jpnprd01.prod.outlook.com Signed-off-by: Mark Brown <broonie@kernel.org>
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df6978b7 |
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10-Feb-2021 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Disable the QSPI IP at suspend() It is safer to disable the QSPI IP at suspend, in order to avoid possible impact of glitches on the internal FSMs. This is a theoretical fix, there were no problems seen as of now. Tested on sama5d2 and sam9x60 versions of the IP. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210210135428.204134-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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c7b88456 |
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07-Dec-2020 |
Lukas Wunner <lukas@wunner.de> |
spi: atmel-quadspi: Fix use-after-free on unbind atmel_qspi_remove() accesses the driver's private data after calling spi_unregister_controller() even though that function releases the last reference on the spi_controller and thereby frees the private data. Fix by switching over to the new devm_spi_alloc_master() helper which keeps the private data accessible until the driver has unbound. Fixes: 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver") Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: <stable@vger.kernel.org> # v5.0+: 5e844cc37a5c: spi: Introduce device-managed SPI controller allocation Cc: <stable@vger.kernel.org> # v5.0+ Cc: Piotr Bugalski <bugalski.piotr@gmail.com> Link: https://lore.kernel.org/r/4b05c65cf6f1ea3251484fe9a00b4c65478a1ae3.1607286887.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
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c066efb0 |
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07-Dec-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Move common code outside of if else QSPI_IFR is set as the last QSPI Instruction Frame register regardless of the sama5d2 or sam9x60 version of the IP. Move the writing of QSPI_IFR outside of the IP specific code. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20201207135959.154124-5-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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d00364b6 |
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07-Dec-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Write QSPI_IAR only when needed The address must be written in QSPI_IAR only when we have a instruction frame with address but no data. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20201207135959.154124-4-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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a6ff3a78 |
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07-Dec-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Drop superfluous set of QSPI_IFR_APBTFRTYP_READ That bit describes the APB transfer type. We are writing serial memory registers via AHB acesses, that bit does not make sense in the current context. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20201207135959.154124-3-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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cac8c821 |
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07-Dec-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Fix AHB memory accesses Following error was seen when mounting a 16MByte ubifs: UBIFS error (ubi0:0 pid 1893): check_lpt_type.constprop.6: invalid type (15) in LPT node type QSPI_IFR.TFRTYP was not set correctly. When data transfer is enabled and one wants to access the serial memory through AHB in order to: - read in the serial memory, but not a memory data, for example a JEDEC-ID, QSPI_IFR.TFRTYP must be written to '0' (both sama5d2 and sam9x60). - read in the serial memory, and particularly a memory data, TFRTYP must be written to '1' (both sama5d2 and sam9x60). - write in the serial memory, but not a memory data, for example writing the configuration or the QSPI_SR, TFRTYP must be written to '2' for sama5d2 and to '0' for sam9x60. - write in the serial memory in particular to program a memory data, TFRTYP must be written to '3' for sama5d2 and to '1' for sam9x60. Fix the setting of the QSPI_IFR.TFRTYP field. Fixes: 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver") Cc: <stable@vger.kernel.org> # v5.0+ Reported-by: Tom Burkart <tom@aussec.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20201207135959.154124-2-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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0e685017 |
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08-Nov-2020 |
Lukas Wunner <lukas@wunner.de> |
spi: atmel-quadspi: Disable clock in probe error path If the call to of_device_get_match_data() fails on probe of the Atmel QuadSPI driver, the clock "aq->pclk" is erroneously not unprepared and disabled. Fix it. Fixes: 2e5c88887358 ("spi: atmel-quadspi: add support for sam9x60 qspi controller") Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: <stable@vger.kernel.org> # v5.1+ Cc: Tudor Ambarus <tudor.ambarus@microchip.com> Cc: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/8f8dc2815aa97b2378528f08f923bf81e19611f0.1604874488.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
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b780c3f3 |
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15-Jul-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Use optimezed memcpy_fromio()/memcpy_toio() Optimezed mem*io operations are defined for LE platforms, use them. The ARM and !ARCH_EBSA110 dependencies for COMPILE_TEST were added only for the _memcpy_fromio()/_memcpy_toio() functions. Drop these dependencies. Tested unaligned accesses on both sama5d2 and sam9x60 QSPI controllers using SPI NOR flashes, everything works ok. The following performance improvement can be seen when running mtd_speedtest: sama5d2_xplained (mx25l25635e) - before: mtd_speedtest: eraseblock write speed is 983 KiB/s mtd_speedtest: eraseblock read speed is 6150 KiB/s - after: mtd_speedtest: eraseblock write speed is 1055 KiB/s mtd_speedtest: eraseblock read speed is 20144 KiB/s sam9x60ek (sst26vf064b) - before: mtd_speedtest: eraseblock write speed is 4770 KiB/s mtd_speedtest: eraseblock read speed is 8062 KiB/s - after: mtd_speedtest: eraseblock write speed is 4524 KiB/s mtd_speedtest: eraseblock read speed is 21186 KiB/s Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200716043139.565734-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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5c81c275 |
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23-Jun-2020 |
Pratyush Yadav <p.yadav@ti.com> |
spi: atmel-quadspi: reject DTR ops Double Transfer Rate (DTR) ops are added in spi-mem. But this controller doesn't support DTR transactions. Since we don't use the default supports_op(), which rejects all DTR ops, do that explicitly in our supports_op(). Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-4-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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c528ecfb |
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20-Mar-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: Add verbose debug facilities to monitor register accesses This feature should not be enabled in release but can be useful for developers who need to monitor register accesses at some specific places. Helped me identify a bug in u-boot, by comparing the register accesses from the linux driver with the ones from its u-boot variant. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200320065058.891221-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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8e093ea4 |
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28-Feb-2020 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: fix possible MMIO window size overrun The QSPI controller memory space is limited to 128MB: 0x9000_00000-0x9800_00000/0XD000_0000--0XD800_0000. There are nor flashes that are bigger in size than the memory size supported by the controller: Micron MT25QL02G (256 MB). Check if the address exceeds the MMIO window size. An improvement would be to add support for regular SPI mode and fall back to it when the flash memories overrun the controller's memory space. Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200228155437.1558219-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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6b8ac10e |
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30-Jul-2019 |
Stephen Boyd <swboyd@chromium.org> |
spi: Remove dev_err() usage after platform_get_irq() We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-42-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
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ab735611 |
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28-Jun-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: fix resume call When waking up from the Suspend-to-RAM state, the following error was seen: m25p80 spi2.0: flash operation timed out The flash remained in an undefined state, returning 0xFFs. Fix it by setting the Serial Clock Baud Rate, as it was set before the conversion to SPIMEM. Tested with sama5d2_xplained and mx25l25673g spi-nor in Backup + Self-Refresh and Suspend modes. Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Reported-by: Mark Deneen <mdeneen@gmail.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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5b74e9a3 |
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28-Jun-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: void return type for atmel_qspi_init() commit 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver") removed the error path from atmel_qspi_init(), but not changed the function's return type. Set void return type for atmel_qspi_init(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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e5c27498 |
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24-Apr-2019 |
Claudiu Beznea <claudiu.beznea@microchip.com> |
spi: atmel-quadspi: fix crash while suspending atmel_qspi objects are kept in spi_controller objects, so, first get pointer to spi_controller object and then get atmel_qspi object from spi_controller object. Fixes: 2d30ac5ed633 ("mtd: spi-nor: atmel-quadspi: Use spi-mem interface for atmel-quadspi driver") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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55e3daca |
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21-Mar-2019 |
YueHaibing <yuehaibing@huawei.com> |
spi: atmel-quadspi: Make atmel_qspi_get_name static Fix sparse warning: drivers/spi/atmel-quadspi.c:369:12: warning: symbol 'atmel_qspi_get_name' was not declared. Should it be static? Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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2e5c8888 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: add support for sam9x60 qspi controller The sam9x60 qspi controller uses 2 clocks, one for the peripheral register access, the other for the qspi core and phy. Both are mandatory. It uses different transfer type bits in IFR register. It has dedicated registers to specify a read or a write instruction: Read Instruction Code Register (RICR) and Write Instruction Code Register (WICR). ICR/RICR/WICR have identical fields. Tested with sst26vf064b jedec,spi-nor flash. Backward compatibility test done on sama5d2 qspi controller and mx25l25635e jedec,spi-nor flash. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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bd7905e2 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: add support for named peripheral clock Naming clocks is a good practice. Keep supporting unnamed peripheral clock, to be backward compatible with old DTs. While here, rename clk to pclk, to indicate that it is a peripheral clock. Suggested-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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b456fd18 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: rework transfer macros Split the TFRTYP_TRSFR_ bitfields in 2: one bit encoding the mem/reg transfer type and one bit encoding the direction of the transfer (read/write). Remove NOP when setting read transfer type. Remove useless setting of write transfer type when op->data.dir == SPI_MEM_DATA_IN && !op->data.nbytes. QSPI_IFR_TFRTYP_TRSFR_WRITE is specific just to sama5d2 qspi, rename it to QSPI_IFR_SAMA5D2_WRITE_TRSFR. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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cae417b2 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: switch to SPDX license identifiers Adopt the SPDX license identifiers to ease license compliance management. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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2aaa8dd0 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: return appropriate error code Return -ENOTSUPP when atmel_qspi_find_mode() fails. Propagate the error in atmel_qspi_exec_op(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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9ce4c512 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: remove unnecessary cast The cast is done implicitly. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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1db6de22 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: fix naming scheme Let general names to core drivers. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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18b6f6e1 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: drop wrappers for iomem accesses The wrappers hid that the accesses are relaxed. Drop them. Suggested-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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3ae012e9 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: order header files inclusion alphabetically Cosmetic change, no functional change. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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9958c8c3 |
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05-Feb-2019 |
Tudor Ambarus <tudor.ambarus@microchip.com> |
spi: atmel-quadspi: cache MR value to avoid a write access Set the controller by default in Serial Memory Mode (SMM) at probe. Cache Mode Register (MR) value to avoid write access when setting the controller in serial memory mode at exec_op(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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0e6aae08 |
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05-Nov-2018 |
Piotr Bugalski <bugalski.piotr@gmail.com> |
spi: Add QuadSPI driver for Atmel SAMA5D2 Kernel contains QSPI driver strongly tied to MTD and nor-flash memory. New spi-mem interface allows usage also other memory types, especially much larger NAND with SPI interface. This driver works as SPI controller and is not related to MTD, however can work with NAND-flash or other peripherals using spi-mem interface. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Piotr Bugalski <bugalski.piotr@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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