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0256b6ae |
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08-Mar-2023 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Annotate sentinels in tables It does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel. Hence drop all such commas. Add comments to clarify the purpose of the empty elements. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/845f1d8285dd44522af1b0f429d4c6bd4759eb9e.1678272180.git.geert+renesas@glider.be
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a3ca1e18 |
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08-Mar-2023 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: rcar: Phase out old SH_PFC_PIN_CFG_IO_VOLTAGE flag Commit 537db25ca330dce0 ("pinctrl: renesas: Add I/O voltage level flag") introduced new flags to support pins that can switch their voltage levels between either 1.8V and 3.3V, or between 2.5V and 3.3V. The old SH_PFC_PIN_CFG_IO_VOLTAGE flag was retained to avoid having to change existing drivers. Replace SH_PFC_PIN_CFG_IO_VOLTAGE by SH_PFC_PIN_CFG_IO_VOLTAGE_18_33, to make the voltage configuration explicit, and to prepare for the advent of support for more voltage levels. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/ae5f879c093f3e3cd50ba1495975bccfad81237b.1678271030.git.geert+renesas@glider.be
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9bfb06a3 |
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13-Apr-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Use shorthands for reserved fields Replace the full descriptions of reserved register fields by shorthands with a negative field width, and merge adjacent reserved fields. This reduces kernel size by 445 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/842d8060422a9b67dfac4af6d9325d0d99cf50dc.1649865241.git.geert+renesas@glider.be
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b67fc1c6 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Remove unused pfc parameter from .pin_to_pocctrl() The pfc parameter of the .pin_to_pocctrl() method was never used. It is a relic of the old I/O voltage handling before commit 8775306dcf48092f ("pinctrl: sh-pfc: refactor voltage setting"). Remove the parameter, as it prevents the checker from calling this function for validating consistency of the pin control tables. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/822133086f32618c7fc920123c6a96f5d4ea7ad6.1640270559.git.geert+renesas@glider.be
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7e37f104 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Share more VIN pin group data Pin group vin2_g8 is a subset of vin2_data24. This reduces kernel size by 64 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/a4f6a70344654456abea1f15539219d1e02a74fe.1640269757.git.geert+renesas@glider.be
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f3806b46 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Share USB1 pin group data Pin group usb0_ovc_vbus is a subset of usb0. Pin group usb1_pwen is a subset of usb1. This reduces kernel size by 16 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/b9f37cf00064293b4b6f9068bda8c1ab819090f5.1640269757.git.geert+renesas@glider.be
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aee52eba |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Share SDHI pin group data Pin groups sdhi[0-3]_data1 are subsets of sdhi[0-3]_data4. This reduces kernel size by 32 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/88a3c2b09d34f2a528ecaa1bd55b6a96e156f5b1.1640269757.git.geert+renesas@glider.be
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bf5da1c0 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Share QSPI pin group data Pin group qspi_data2 is a subset of qspi_data4. This reduces kernel size by 16 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5bf6a5bd35e619c5d5da4a49878a88f48bb62a30.1640269757.git.geert+renesas@glider.be
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d30ab291 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Share MMC pin group data Pin groups mmc[01]_data[14] are subsets of mmc[01]_data8. This reduces kernel size by 80 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/0990a63016ab87d16c19097bc43d79595c0c8b87.1640269757.git.geert+renesas@glider.be
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496da100 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Add generic support for resizable buses The VIN_DATA_PIN_GROUP() macro and vin_data{12,16,} unions are used to define multiple VIN data groups with different numbers of lanes, while referring to a single array of data pins, thus saving memory. However, the same feature would be useful for other resizable buses, like MMC, SDHI, QSPI, LCD, BSC, ... Rework the mechanism for generic use: - Use the new SH_PFC_PIN_GROUP_SUBSET() helper to remove the need for bus-specific unions, - Rename VIN_DATA_PIN_GROUP() to BUS_DATA_PIN_GROUP(), - Rename the macro parameters to better reflect their purposes, - Move the macro up, where it belongs. Update all individual pin control drivers for the above changes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/cccfcfd01eb8ab7a587b084c4ddbf97293bd7291.1640269757.git.geert+renesas@glider.be
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c614d12c |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: Rename sh_pfc_soc_operations instances Some instances of struct sh_pfc_soc_operations are called "<soc>_pfc_ops", others are called "<soc>_pinmux_ops" or just "pinmux_ops". Settle on the first variant, to avoid confusion with "struct pinmux_ops" in the pinctrl core, and to increase consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/2ab33ad1d6a20a57d16922678b78810fa55b7fc0.1640269757.git.geert+renesas@glider.be
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8313b5e7 |
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26-Jan-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Restore pin function sort order Move the du* pin function where it belongs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f4eb545cedcd1a72f0f80ef85daf03e2e423e90f.1643199959.git.geert+renesas@glider.be
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c038a988 |
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23-Dec-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Remove INTC_IRQx_N The INTC_IRQx_N pin functions were only documented in preliminary versions of the R-Car H2 Hardware User's Manual, and were never used. This reduces kernel size by 40 bytes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/5b3fb0c025eaca037a53120fee811cf13e08b55f.1640269218.git.geert+renesas@glider.be
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2be3d602 |
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30-Apr-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: renesas: r8a7790: Add bias pinconf support Implement support for pull-up (most pins) and pull-down (ASEBRK#/ACK) handling for R-Car H2 and RZ/G1H SoCs, using the common R-Car bias handling. Note that on RZ/G1H, the "ASEBRK#/ACK" pin is called "ACK", but the code doesn't handle that naming difference. Hence users should use the R-Car naming in DTS files. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/dde6e0b36a4e4494039a3466df208b5ec5c594ee.1619785375.git.geert+renesas@glider.be
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529b8eec |
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19-Oct-2020 |
Biju Das <biju.das.jz@bp.renesas.com> |
pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742 This driver supports both RZ/G1H and R-Car H2 SoCs. Optimize pinctrl image size for RZ/G1H, when support for R-Car H2 (R8A7790) is not enabled. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20201019124258.4574-6-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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81f652af |
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17-Sep-2020 |
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> |
pinctrl: renesas: r8a7790: Add VIN1-B and VIN2-G pins, groups and functions Add pins, groups and functions for the VIN1-B [data/sync/field/clkenb/clk] and VIN2-G8. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20200917195924.20384-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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077365a9 |
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09-Sep-2020 |
Geert Uytterhoeven <geert+renesas@glider.be> |
pinctrl: Rename sh-pfc to renesas The drivers/pinctrl/sh-pfc subdirectory was originally created to group pin control drivers for various Renesas SuperH and SH-Mobile platforms. However, the name "sh-pfc" no longer reflects its contents, as the directory now contains pin control drivers for Renesas SuperH, ARM32, and ARM64 SoCs. Hence rename the subdirectory from drivers/pinctrl/sh-pfc to drivers/pinctrl/renesas, and the related Kconfig symbol from PINCTRL_SH_PFC to PINCTRL_RENESAS. Rename the git branch in MAINTAINERS, too, for consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be
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