pinctrl: gemini: Add missing header(s)

Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.

While at it, sort headers alphabetically.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

pinctrl: gemini: fix typos

Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
Link: https://lore.kernel.org/r/1633879405-11658-1-git-send-email-dhu@hodcarrier.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Fix up TVC clock group

The previous fix made the TVC clock get muxed in on the
D-Link DIR-685 instead of giving nagging warnings of this
not working. Not good. We didn't want that, as it breaks
video.

Create a specific group for the TVC CLK, and break out
a specific GPIO group for it on the SL3516 so we can use
that line as GPIO if we don't need the TVC CLK.

Fixes: d17f477c5bc6 ("pinctrl: gemini: Mask and set properly")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Drop noisy debug prints

The dev_info() in the pin control driver is really just good
for debug, so drop it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Mask and set properly

The code was written under the assumption that the
regmap_update_bits() would mask the bits in the mask and
set the bits in the value.

It missed the points that it will not set bits in the value
unless these are also masked in the mask. Set value bits
that are not in the mask will simply be ignored.

Fixes: 06351d133dea ("pinctrl: add a Gemini SoC pin controller")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Mask properly

Some logical error in the gemini pin control driver made
it not mask and write properly for the GMAC.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Support drive strength setting

The Gemini pin controller can set drive strength for a few
select groups of pins (not individually). Implement this
for GMAC0 and 1 (ethernet ports), IDE and PCI.

Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Fix usage of 3512 groups

The pin config lookup function was still hardcoding the
3516 pin set, which is obviously wrong. Use the pointer
in the state container.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Add two missing GPIO groups

The 3512 has two more GPIO groups on GPIO area 0, so let's
make it possible to combine these with the function.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Fix missing pad descriptions

A pretty clever static checker found a bug in my patch: I added more
bits to a bitmask but didn't extend the array indexed to the same
bitmask.

Fixes: 756a024f3983 ("pinctrl: gemini: Fix GMAC groups")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Fix GMAC groups

The GMII groups need to be split across GMAC0 and GMAC1 since
GMAC0 is always available but GMAC1 masks GPIO2 lines 0-7
so we might want just one interface out.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Implement clock skew/delay config

This enabled pin config on the Gemini driver and implements
pin skew/delay so that the ethernet pins clocking can be
properly configured.

Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Use generic DT parser

We can just use the generic Device Tree parser code
in this driver and save some code.

Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: gemini: Add missing functions

Some two functions were missing from the Gemini pin control
driver. Noticed when trying to use ethernet. Fix it up by
adding them.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

pinctrl: add a Gemini SoC pin controller

This adds a pin control (only multiplexing) driver for the Gemini
SoC so we can sort out this complex platform in an orderly manner.

This driver will detect the chip/package version as SL3512 or SL3516
(also known as CS3512 and CS3516 etc) and register the apropriate
pin set.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>