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877e8d28 |
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29-Oct-2021 |
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
phy: uniphier-usb3: Add compatible string for NX1 SoC Add basic support for UniPhier NX1 SoC. This includes a compatible string and the same SoC-dependent data as LD20/PXs3 SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1635503947-18250-3-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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25858c52 |
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29-Jan-2020 |
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failure In case of using default parameters, communication failure might occur in rare cases. This sets Rx sync mode parameter to avoid the issue. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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e68c2a8a |
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29-Jan-2020 |
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
phy: uniphier-usb3hs: Add legacy SoC support for Pro5 Add legacy SoC support that needs to manage gio clock and reset. This supports Pro5. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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40d76346 |
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29-Jan-2020 |
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
phy: socionext: Use devm_platform_ioremap_resource() Use devm_platform_ioremap_resource() to simplify the code. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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752d31a3 |
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10-Apr-2019 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
phy: socionext: get optional clock by devm_clk_get_optional() Use devm_clk_get_optional() to get optional clock Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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5ab43d0f |
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21-Aug-2018 |
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> |
phy: socionext: add USB3 PHY driver for UniPhier SoC Add a driver for PHY interface built into USB3 controller implemented in UniPhier SoCs. This driver supports High-Speed PHY and Super-Speed PHY. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Motoya Tanigawa <tanigawa.motoya@socionext.com> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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