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7559e757 |
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14-Jul-2023 |
Rob Herring <robh@kernel.org> |
phy: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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d1ea4239 |
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15-Jun-2023 |
Alex Bee <knaerzche@gmail.com> |
phy/rockchip: inno-hdmi: add more supported pre-pll rates This adds a bunch of new pixel clock- and tmds rates to the pre-pll table which are required to get more VESA and some DMT rates working. It has been completely re-calculated to match the min- and max-vco of (750 MHz - 3.2 GHz) requirements. If more than one configuration would have been possible the lowest fbdiv and refdiv (and therefore lowest vco rate) has been preferred. It's important to note, that RK3228 version of the phy does not support fractional dividers. To support the most possible rates for this version also in both 8-bit and 10-bit variant, some rates are not exact. The maximum deviation of the pixel clock is 0.26, which perfectly fits into VESA DMT recommendation of 0.5%. I tested all possible rates on several screens from different manufacturers with both RK3228 and RK3328. Both pre- and post-PLL locking are slighlty faster now. Signed-off-by: Alex Bee <knaerzche@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-7-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
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f79b812b |
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15-Jun-2023 |
Huicong Xu <xhc@rock-chips.com> |
phy/rockchip: inno-hdmi: force set_rate on power_on Regular 8-bit and Deep Color video formats mainly differ in TMDS rate and not in pixel clock rate. When the hdmiphy clock is configured with the same pixel clock rate using clk_set_rate() the clock framework do not signal the hdmi phy driver to set_rate when switching between 8-bit and Deep Color. This result in pre/post pll not being re-configured when switching between regular 8-bit and Deep Color video formats. Fix this by calling set_rate in power_on to force pre pll re-configuration. Signed-off-by: Huicong Xu <xhc@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-6-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
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19a1d46b |
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15-Jun-2023 |
Jonas Karlman <jonas@kwiboo.se> |
phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg write inno_write is used to configure 0xaa reg, that also hold the POST_PLL_POWER_DOWN bit. When POST_PLL_REFCLK_SEL_TMDS is configured the power down bit is not taken into consideration. Fix this by keeping the power down bit until configuration is complete. Also reorder the reg write order for consistency. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-5-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
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b001c27d |
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15-Jun-2023 |
Jonas Karlman <jonas@kwiboo.se> |
phy/rockchip: inno-hdmi: remove unused no_c from rk3328 recalc_rate no_c is not used in any calculation, lets remove it. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-4-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
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d5ef343c |
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15-Jun-2023 |
Zheng Yang <zhengyang@rock-chips.com> |
phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rate inno_hdmi_phy_rk3328_clk_recalc_rate() is returning a rate not found in the pre pll config table when the fractal divider is used. This can prevent proper power_on because a tmdsclock for the new rate is not found in the pre pll config table. Fix this by saving and returning a rounded pixel rate that exist in the pre pll config table. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Zheng Yang <zhengyang@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-3-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
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644c06df |
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15-Jun-2023 |
Jonas Karlman <jonas@kwiboo.se> |
phy/rockchip: inno-hdmi: use correct vco_div_5 macro on rk3328 inno_hdmi_phy_rk3328_clk_set_rate() is using the RK3228 macro when configuring vco_div_5 on RK3328. Fix this by using correct vco_div_5 macro for RK3328. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-2-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
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cb1161c0 |
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06-Mar-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
phy: rockchip: phy-rockchip-inno-hdmi: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230307115900.2293120-22-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
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de82b841 |
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08-Jun-2021 |
Colin Ian King <colin.king@canonical.com> |
phy: rockchip: remove redundant initialization of pointer cfg The pointer cfg is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20210609113901.185230-1-colin.king@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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6824ebc0 |
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05-Nov-2020 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
phy: rockchip: convert to devm_platform_ioremap_resource Use devm_platform_ioremap_resource to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1604642930-29019-13-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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4f510aa1 |
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23-Dec-2019 |
Jonas Karlman <jonas@kwiboo.se> |
phy/rockchip: inno-hdmi: round clock rate down to closest 1000 Hz Commit 287422a95fe2 ("drm/rockchip: Round up _before_ giving to the clock framework") changed what rate clk_round_rate() is called with, an additional 999 Hz added to the requsted mode clock. This has caused a regression on RK3328 and presumably also on RK3228 because the inno-hdmi-phy clock requires an exact match of the requested rate in the pre pll config table. When an exact match is not found the parent clock rate (24MHz) is returned to the clk_round_rate() caller. This cause wrong pixel clock to be used and result in no-signal when configuring a mode on RK3328. Fix this by rounding the rate down to closest 1000 Hz in round_rate func, this allows an exact match to be found in pre pll config table. Fixes: 287422a95fe2 ("drm/rockchip: Round up _before_ giving to the clock framework") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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64ea5957 |
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07-Aug-2019 |
Nathan Chancellor <nathan@kernel.org> |
phy-rockchip-inno-hdmi: Fix RK3328_TERM_RESISTOR_CALIB_SPEED_7_0's third value After commit "linux/bits.h: Add compile time sanity check of GENMASK inputs" [1], arm64 defconfig builds started failing: In file included from ../include/linux/bits.h:22, from ../include/linux/bitops.h:5, from ../include/linux/kernel.h:12, from ../include/linux/clk.h:13, from ../drivers/phy/rockchip/phy-rockchip-inno-hdmi.c:9: ../drivers/phy/rockchip/phy-rockchip-inno-hdmi.c: In function 'inno_hdmi_phy_rk3328_power_on': ../include/linux/build_bug.h:16:45: error: negative width in bit-field '<anonymous>' 16 | #define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); })) | ^ ../include/linux/bits.h:24:18: note: in expansion of macro 'BUILD_BUG_ON_ZERO' 24 | ((unsigned long)BUILD_BUG_ON_ZERO(__builtin_choose_expr( \ | ^~~~~~~~~~~~~~~~~ ../include/linux/bits.h:39:3: note: in expansion of macro 'GENMASK_INPUT_CHECK' 39 | (GENMASK_INPUT_CHECK(high, low) + __GENMASK(high, low)) | ^~~~~~~~~~~~~~~~~~~ ../drivers/phy/rockchip/phy-rockchip-inno-hdmi.c:24:42: note: in expansion of macro 'GENMASK' 24 | #define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l))) | ^~~~~~~ ../drivers/phy/rockchip/phy-rockchip-inno-hdmi.c:201:50: note: in expansion of macro 'UPDATE' 201 | #define RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(x) UPDATE(x, 7, 9) | ^~~~~~ ../drivers/phy/rockchip/phy-rockchip-inno-hdmi.c:1046:26: note: in expansion of macro 'RK3328_TERM_RESISTOR_CALIB_SPEED_7_0' 1046 | inno_write(inno, 0xc6, RK3328_TERM_RESISTOR_CALIB_SPEED_7_0(v)); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ As pointed out by Robin and Guenter, inno_write's val argument is an 8-bit value so having a mask larger than that doesn't make sense. This also matches the rest of the *_7_0 macros in this driver. [1]: https://lore.kernel.org/lkml/20190801230358.4193-2-rikard.falkeborn@gmail.com/ Reported-by: Andrzej Hajda <a.hajda@samsung.com> Reported-by: Guenter Roeck <linux@roeck-us.net> Reported-by: kernelci.org bot <bot@kernelci.org> Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org> Suggested-by: Guenter Roeck <linux@roeck-us.net> Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de>
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53706a11 |
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06-Sep-2018 |
Zheng Yang <zhengyang@rock-chips.com> |
phy: add Rockchip Innosilicon hdmi phy Add a driver for the Innosilicon hdmi phy used on rk3228/rk3229 and rk3328 socs from Rockchip. Signed-off-by: Zheng Yang <zhengyang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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