#
ae874027 |
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31-Jan-2024 |
Philipp Stanner <pstanner@redhat.com> |
PCI: Move pci_iomap.c to drivers/pci/ The entirety of pci_iomap.c is guarded by an #ifdef CONFIG_PCI. It, consequently, does not belong to lib/ because it is not generic infrastructure. Move pci_iomap.c to drivers/pci/ and implement the necessary changes to Makefiles and Kconfigs. Update MAINTAINERS file. Update Documentation. Link: https://lore.kernel.org/r/20240131090023.12331-3-pstanner@redhat.com [bhelgaas: squash in https://lore.kernel.org/r/20240212150934.24559-1-pstanner@redhat.com] Suggested-by: Danilo Krummrich <dakr@redhat.com> Signed-off-by: Philipp Stanner <pstanner@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
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#
43b0294a |
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20-Jul-2022 |
Liu Song <liusong@linux.alibaba.com> |
PCI: Replace unnecessary UTF-8 in Kconfig The CONFIG_PCI_P2PDMA Kconfig help text contains a Cyrillic small "Dze" (ѕ). When menuconfig renders it, it looks like "Enable ~U drivers" instead of "Enables drivers". Replace it by a plain "s" so the help text is displayed correctly by menuconfig. Uwe Kleine-König <u.kleine-koenig@pengutronix.de> later posted the same patch at https://lore.kernel.org/r/20231006150209.87666-1-u.kleine-koenig@pengutronix.de Link: https://lore.kernel.org/r/1658301723-111283-1-git-send-email-liusong@linux.alibaba.com Tested-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Liu Song <liusong@linux.alibaba.com> [bhelgaas: commit log, add Uwe's report] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Randy Dunlap <rdunlap@infradead.org>
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#
26641b3f |
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31-Aug-2023 |
Lizhi Hou <lizhi.hou@amd.com> |
PCI: Fix CONFIG_PCI_DYNAMIC_OF_NODES kconfig dependencies Generating interrupt-map property depends on of_irq_parse_raw() which is enabled by CONFIG_OF_IRQ. Change CONFIG_PCI_DYNAMIC_OF_NODES dependency from CONFIG_OF to CONFIG_OF_IRQ. Closes: https://lore.kernel.org/linux-devicetree/2187619d-55bc-41bb-bbb4-6059399db997@roeck-us.net/ Fixes: 407d1a51921e ("PCI: Create device tree node for bridge") Link: https://lore.kernel.org/r/1693505947-29786-1-git-send-email-lizhi.hou@amd.com Reported-by: Guenter Roeck <groeck7@gmail.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
407d1a51 |
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15-Aug-2023 |
Lizhi Hou <lizhi.hou@amd.com> |
PCI: Create device tree node for bridge The PCI endpoint device such as Xilinx Alveo PCI card maps the register spaces from multiple hardware peripherals to its PCI BAR. Normally, the PCI core discovers devices and BARs using the PCI enumeration process. There is no infrastructure to discover the hardware peripherals that are present in a PCI device, and which can be accessed through the PCI BARs. Apparently, the device tree framework requires a device tree node for the PCI device. Thus, it can generate the device tree nodes for hardware peripherals underneath. Because PCI is self discoverable bus, there might not be a device tree node created for PCI devices. Furthermore, if the PCI device is hot pluggable, when it is plugged in, the device tree nodes for its parent bridges are required. Add support to generate device tree node for PCI bridges. Add an of_pci_make_dev_node() interface that can be used to create device tree node for PCI devices. Add a PCI_DYNAMIC_OF_NODES config option. When the option is turned on, the kernel will generate device tree nodes for PCI bridges unconditionally. Initially, add the basic properties for the dynamically generated device tree nodes which include #address-cells, #size-cells, device_type, compatible, ranges, reg. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://lore.kernel.org/r/1692120000-46900-3-git-send-email-lizhi.hou@amd.com Signed-off-by: Rob Herring <robh@kernel.org>
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#
af2880ec |
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12-Jun-2023 |
Robin Murphy <robin.murphy@arm.com> |
scatterlist: add dedicated config for DMA flags The DMA flags field will be useful for users beyond PCI P2P, so upgrade to its own dedicated config option. [catalin.marinas@arm.com: use #ifdef CONFIG_NEED_SG_DMA_FLAGS in scatterlist.h] [catalin.marinas@arm.com: update PCI_P2PDMA dma_flags comment in scatterlist.h] Link: https://lkml.kernel.org/r/20230612153201.554742-13-catalin.marinas@arm.com Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Tested-by: Isaac J. Manjarres <isaacmanjarres@google.com> Cc: Alasdair Kergon <agk@redhat.com> Cc: Ard Biesheuvel <ardb@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: Jerry Snitselaar <jsnitsel@redhat.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Jonathan Cameron <jic23@kernel.org> Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Logan Gunthorpe <logang@deltatee.com> Cc: Marc Zyngier <maz@kernel.org> Cc: Mark Brown <broonie@kernel.org> Cc: Mike Snitzer <snitzer@kernel.org> Cc: "Rafael J. Wysocki" <rafael@kernel.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: Will Deacon <will@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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#
13e7accb |
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11-Nov-2022 |
Thomas Gleixner <tglx@linutronix.de> |
genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN Adjust to reality and remove another layer of pointless Kconfig indirection. CONFIG_GENERIC_MSI_IRQ is good enough to serve all purposes. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20221111122014.524842979@linutronix.de
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#
a474d3fb |
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11-Nov-2022 |
Thomas Gleixner <tglx@linutronix.de> |
PCI/MSI: Get rid of PCI_MSI_IRQ_DOMAIN What a zoo: PCI_MSI select GENERIC_MSI_IRQ PCI_MSI_IRQ_DOMAIN def_bool y depends on PCI_MSI select GENERIC_MSI_IRQ_DOMAIN Ergo PCI_MSI enables PCI_MSI_IRQ_DOMAIN which in turn selects GENERIC_MSI_IRQ_DOMAIN. So all the dependencies on PCI_MSI_IRQ_DOMAIN are just an indirection to PCI_MSI. Match the reality and just admit that PCI_MSI requires GENERIC_MSI_IRQ_DOMAIN. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20221111122014.467556921@linutronix.de
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#
9d24322e |
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19-Jul-2022 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
PCI/DOE: Add DOE mailbox support functions Introduced in a PCIe r6.0, sec 6.30, DOE provides a config space based mailbox with standard protocol discovery. Each mailbox is accessed through a DOE Extended Capability. Each DOE mailbox must support the DOE discovery protocol in addition to any number of additional protocols. Define core PCIe functionality to manage a single PCIe DOE mailbox at a defined config space offset. Functionality includes iterating, creating, query of supported protocol, and task submission. Destruction of the mailboxes is device managed. Cc: "Li, Ming" <ming4.li@intel.com> Cc: Bjorn Helgaas <helgaas@kernel.org> Cc: Matthew Wilcox <willy@infradead.org> Acked-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Co-developed-by: Ira Weiny <ira.weiny@intel.com> Signed-off-by: Ira Weiny <ira.weiny@intel.com> Link: https://lore.kernel.org/r/20220719205249.566684-4-ira.weiny@intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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#
42399301 |
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08-Jul-2022 |
Logan Gunthorpe <logang@deltatee.com> |
lib/scatterlist: add flag for indicating P2PDMA segments in an SGL Introduce a dma_flags field in struct scatterlist. These flags will be used by dma_[un]map_sg_p2pdma() to determine when a given SGL segments dma_address points to a PCI bus address. dma_unmap_sg_p2pdma() will need to perform different cleanup when a segment is marked as a bus address. The dma_flags field will fit in the existing padding on 64BIT systems (assuming CONFIG_NEED_SG_DMA_LENGTH is also set). The new bit will only be used when CONFIG_PCI_P2PDMA is set; this means PCI P2PDMA will require CONFIG_64BIT. This should be acceptable as the majority of P2PDMA use cases are restricted to newer root complexes and roughly require the extra address space for memory BARs used in the transactions. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
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#
1d38fe6e |
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24-Feb-2022 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI/VGA: Move vgaarb to drivers/pci The VGA arbiter is really PCI-specific and doesn't depend on any GPU things. Move it to the PCI subsystem. Note that misc_init() must be called before vga_arb_device_init(). These are both subsys_initcalls, so this ordering depends on the link order, which is determined by drivers/Makefile: obj-y += pci/ obj-y += char/ <-- misc_init() obj-y += gpu/ <-- vga_arb_device_init() (before this commit) The drivers/pci/ subsys_initcalls are called *before* misc_init(), so convert vga_arb_device_init() to subsys_initcall_sync(), which is called after *all* subsys_initcalls. Link: https://lore.kernel.org/r/20220224224753.297579-2-helgaas@kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
d9932b46 |
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05-Jan-2022 |
Sunil Muthuswamy <sunilmut@microsoft.com> |
PCI: hv: Add arm64 Hyper-V vPCI support Add arm64 Hyper-V vPCI support by implementing the arch specific interfaces. Introduce an IRQ domain and chip specific to Hyper-v vPCI that is based on SPIs. The IRQ domain parents itself to the arch GIC IRQ domain for basic vector management. [bhelgaas: squash in fix from Yang Li <yang.lee@linux.alibaba.com>: https://lore.kernel.org/r/20220112003324.62755-1-yang.lee@linux.alibaba.com] Link: https://lore.kernel.org/r/1641411156-31705-3-git-send-email-sunilmut@linux.microsoft.com Signed-off-by: Sunil Muthuswamy <sunilmut@microsoft.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Michael Kelley <mikelley@microsoft.com>
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#
e243ae95 |
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16-Sep-2021 |
Jan Beulich <jbeulich@suse.com> |
PCI: only build xen-pcifront in PV-enabled environments The driver's module init function, pcifront_init(), invokes xen_pv_domain() first thing. That construct produces constant "false" when !CONFIG_XEN_PV. Hence there's no point building the driver in non-PV configurations. Drop the (now implicit and generally wrong) X86 dependency: At present, XEN_PV can only be set when X86 is also enabled. In general an architecture supporting Xen PV (and PCI) would want to have this driver built. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/3a7f6c9b-215d-b593-8056-b5fe605dafd7@suse.com Signed-off-by: Juergen Gross <jgross@suse.com>
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#
b0e85c3c |
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28-Sep-2020 |
Jim Quinlan <james.quinlan@broadcom.com> |
PCI: Add Kconfig options for MPS/MRRS strategy Add Kconfig options for changing the default pcie_bus_config, i.e., the strategy for configuration MPS and MRRS, in the same manner as the CONFIG_PCIEASPM_XXXX choice. The pci_bus_config setting may still be overridden by kernel command-line parameters, e.g., "pci=pcie_bus_tune_off". [bhelgaas: depend on EXPERT, tweak help texts] Link: https://lore.kernel.org/r/20200928194651.5393-2-james.quinlan@broadcom.com Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
077ee78e |
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26-Aug-2020 |
Thomas Gleixner <tglx@linutronix.de> |
PCI/MSI: Make arch_.*_msi_irq[s] fallbacks selectable The arch_.*_msi_irq[s] fallbacks are compiled in whether an architecture requires them or not. Architectures which are fully utilizing hierarchical irq domains should never call into that code. It's not only architectures which depend on that by implementing one or more of the weak functions, there is also a bunch of drivers which relies on the weak functions which invoke msi_controller::setup_irq[s] and msi_controller::teardown_irq. Make the architectures and drivers which rely on them select them in Kconfig and if not selected replace them by stub functions which emit a warning and fail the PCI/MSI interrupt allocation. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20200826112333.992429909@linutronix.de
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#
191d6f91 |
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25-Oct-2019 |
Palmer Dabbelt <palmer@sifive.com> |
PCI: Remove PCI_MSI_IRQ_DOMAIN architecture whitelist The only apparent reason for the PCI_MSI_IRQ_DOMAIN architecture whitelist was that it requires msi.h. Now that msi.h is mandatory in asm-generic/Kbuild, every arch should have at least the default version, so remove the whitelist. Built for all the architectures that play nice with make.cross, but not boot tested anywhere. Link: https://lore.kernel.org/r/514e7b040be8ccd69088193aba260da1b89e919c.1571983829.git.michal.simek@xilinx.com Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Waiman Long <longman@redhat.com>
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#
36533f35 |
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20-Nov-2019 |
Krzysztof Kozlowski <krzk@kernel.org> |
PCI: Fix indentation Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig [bhelgaas: do same in vmd.c] Link: https://lore.kernel.org/r/20191120134036.14502-1-krzk@kernel.org Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
d1bbf38a |
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30-Jul-2019 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI: Fix typos and whitespace errors Fix typos in drivers/pci. Comment and whitespace changes only. Link: https://lore.kernel.org/r/20190819115306.27338-1-kw@linux.com Signed-off-by: Krzysztof Wilczynski <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> # armada8k
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#
348dd93e |
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21-Aug-2019 |
Haiyang Zhang <haiyangz@microsoft.com> |
PCI: hv: Add a Hyper-V PCI interface driver for software backchannel interface This interface driver is a helper driver allows other drivers to have a common interface with the Hyper-V PCI frontend driver. Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
f58ba5e3 |
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12-Jul-2019 |
Randy Dunlap <rdunlap@infradead.org> |
PCI: pci-hyperv: Fix build errors on non-SYSFS config Fix build errors when building almost-allmodconfig but with SYSFS not set (not enabled). Fixes these build errors: ERROR: "pci_destroy_slot" [drivers/pci/controller/pci-hyperv.ko] undefined! ERROR: "pci_create_slot" [drivers/pci/controller/pci-hyperv.ko] undefined! drivers/pci/slot.o is only built when SYSFS is enabled, so pci-hyperv.o has an implicit dependency on SYSFS. Make that explicit. Also, depending on X86 && X86_64 is not needed, so just change that to depend on X86_64. Fixes: a15f2c08c708 ("PCI: hv: support reporting serial number as slot information") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Haiyang Zhang <haiyangz@microsoft.com> Cc: Matthew Wilcox <willy@infradead.org> Cc: Jake Oshins <jakeo@microsoft.com> Cc: "K. Y. Srinivasan" <kys@microsoft.com> Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Stephen Hemminger <stephen@networkplumber.org> Cc: Sasha Levin <sashal@kernel.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Cc: linux-hyperv@vger.kernel.org Cc: Dexuan Cui <decui@microsoft.com>
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#
2a9af027 |
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25-Jul-2019 |
Wesley Terpstra <wesley@sifive.com> |
PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for RISC-V Add RISC-V as an arch that supports PCI_MSI_IRQ_DOMAIN. The related change to generate asm/msi.h is 251a44888183 ("riscv: include generic support for MSI irqdomains"). Link: https://lore.kernel.org/r/alpine.DEB.2.21.9999.1907251426450.32766@viisi.sifive.com Signed-off-by: Wesley Terpstra <wesley@sifive.com> [paul.walmsley@sifive.com: wrote patch description; split this patch from the arch/riscv patch] Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
2e8cb2cf |
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14-Jan-2019 |
Rob Herring <robh@kernel.org> |
PCI: Fix PCI kconfig menu organization After commit eb01d42a7778 ("PCI: consolidate PCI config entry in drivers/pci"), all the PCI kconfig options appear below "PCI support" rather than within a sub-menu. This is because menuconfig expects all kconfig entries to be enclosed in an if/endif section. Add the missing if/endif. With this, "depends on PCI" is redundant in the sub-menu entries and can be removed. Fixes: eb01d42a7778 ("PCI: consolidate PCI config entry in drivers/pci") Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
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#
20f1b79d |
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15-Nov-2018 |
Christoph Hellwig <hch@lst.de> |
PCI: consolidate the PCI_SYSCALL symbol Let architectures select the syscall support instead of duplicating the kconfig entry. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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#
2eac9c2d |
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15-Nov-2018 |
Christoph Hellwig <hch@lst.de> |
PCI: consolidate the PCI_DOMAINS and PCI_DOMAINS_GENERIC config options Move the definitions to drivers/pci and let the architectures select them. Two small differences to before: PCI_DOMAINS_GENERIC now selects PCI_DOMAINS, cutting down the churn for modern architectures. As the only architectured arm did previously also offer PCI_DOMAINS as a user visible choice in addition to selecting it from the relevant configs, this is gone now. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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#
eb01d42a |
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15-Nov-2018 |
Christoph Hellwig <hch@lst.de> |
PCI: consolidate PCI config entry in drivers/pci There is no good reason to duplicate the PCI menu in every architecture. Instead provide a selectable HAVE_PCI symbol that indicates availability of PCI support, and a FORCE_PCI symbol to for PCI on and the handle the rest in drivers/pci. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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#
4a57f58f |
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05-Nov-2018 |
Randy Dunlap <rdunlap@infradead.org> |
PCI: Expand the "PF" acronym in Kconfig help text Tell users what a PCI PF is in the PCI_PF_STUB config help text. Fixes: a8ccf8a66663 ("PCI/IOV: Add pci-pf-stub driver for PFs that only enable VFs") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Alexander Duyck <alexander.h.duyck@linux.intel.com>
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#
23a5fba4 |
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18-Oct-2018 |
Thomas Petazzoni <thomas.petazzoni@bootlin.com> |
PCI: Introduce PCI bridge emulated config space common logic Some PCI host controllers do not expose a configuration space for the root port PCI bridge. Due to this, the Marvell Armada 370/38x/XP PCI controller driver (pci-mvebu) emulates a root port PCI bridge configuration space, and uses that to (among other things) dynamically create the memory windows that correspond to the PCI MEM and I/O regions. Since we now need to add a very similar logic for the Marvell Armada 37xx PCI controller driver (pci-aardvark), instead of duplicating the code, we create in this commit a common logic called pci-bridge-emul. The idea of this logic is to emulate a root port PCI bridge configuration space by providing configuration space read/write operations, and faking behind the scenes the configuration space of a PCI bridge. A PCI host controller driver simply has to call pci_bridge_emul_conf_read() and pci_bridge_emul_conf_write() to read/write the configuration space of the bridge. By default, the PCI bridge configuration space is simply emulated by a chunk of memory, but the PCI host controller can override the behavior of the read and write operations on a per-register basis to do additional actions if needed. We take care of complying with the behavior of the PCI configuration space registers in terms of bits that are read-write, read-only, reserved and write-1-to-clear. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
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#
52916982 |
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04-Oct-2018 |
Logan Gunthorpe <logang@deltatee.com> |
PCI/P2PDMA: Support peer-to-peer memory Some PCI devices may have memory mapped in a BAR space that's intended for use in peer-to-peer transactions. To enable such transactions the memory must be registered with ZONE_DEVICE pages so it can be used by DMA interfaces in existing drivers. Add an interface for other subsystems to find and allocate chunks of P2P memory as necessary to facilitate transfers between two PCI peers: struct pci_dev *pci_p2pmem_find[_many](); int pci_p2pdma_distance[_many](); void *pci_alloc_p2pmem(); The new interface requires a driver to collect a list of client devices involved in the transaction then call pci_p2pmem_find() to obtain any suitable P2P memory. Alternatively, if the caller knows a device which provides P2P memory, they can use pci_p2pdma_distance() to determine if it is usable. With a suitable p2pmem device, memory can then be allocated with pci_alloc_p2pmem() for use in DMA transactions. Depending on hardware, using peer-to-peer memory may reduce the bandwidth of the transfer but can significantly reduce pressure on system memory. This may be desirable in many cases: for example a system could be designed with a small CPU connected to a PCIe switch by a small number of lanes which would maximize the number of lanes available to connect to NVMe devices. The code is designed to only utilize the p2pmem device if all the devices involved in a transfer are behind the same PCI bridge. This is because we have no way of knowing whether peer-to-peer routing between PCIe Root Ports is supported (PCIe r4.0, sec 1.3.1). Additionally, the benefits of P2P transfers that go through the RC is limited to only reducing DRAM usage and, in some cases, coding convenience. The PCI-SIG may be exploring adding a new capability bit to advertise whether this is possible for future hardware. This commit includes significant rework and feedback from Christoph Hellwig. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> [bhelgaas: fold in fix from Keith Busch <keith.busch@intel.com>: https://lore.kernel.org/linux-pci/20181012155920.15418-1-keith.busch@intel.com, to address comment from Dan Carpenter <dan.carpenter@oracle.com>, fold in https://lore.kernel.org/linux-pci/20181017160510.17926-1-logang@deltatee.com] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
6e0832fa |
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30-May-2018 |
Shawn Lin <shawn.lin@rock-chips.com> |
PCI: Collect all native drivers under drivers/pci/controller/ Native PCI drivers for root complex devices were originally all in drivers/pci/host/. Some of these devices can also be operated in endpoint mode. Drivers for endpoint mode didn't seem to fit in the "host" directory, so we put both the root complex and endpoint drivers in per-device directories, e.g., drivers/pci/dwc/, drivers/pci/cadence/, etc. These per-device directories contain trivial Kconfig and Makefiles and clutter drivers/pci/. Make a new drivers/pci/controllers/ directory and collect all the device-specific drivers there. No functional change intended. Link: https://lkml.kernel.org/r/1520304202-232891-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
8e639079 |
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03-Apr-2018 |
Christoph Hellwig <hch@lst.de> |
PCI: remove CONFIG_PCI_BUS_ADDR_T_64BIT This symbol is now always identical to CONFIG_ARCH_DMA_ADDR_T_64BIT, so remove it. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
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#
a8ccf8a6 |
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24-Apr-2018 |
Alexander Duyck <alexander.h.duyck@intel.com> |
PCI/IOV: Add pci-pf-stub driver for PFs that only enable VFs Some SR-IOV PF devices provide no functionality other than acting as a means of enabling VFs. For these devices, we want to enable the VFs and assign them to guest virtual machines, but there's no need to have a driver for the PF itself. Add a new pci-pf-stub driver to claim those PF devices and provide the generic VF enable functionality. An administrator can use the sysfs "sriov_numvfs" file to enable VFs, then assign them to guests. For now I only have one example ID provided by Amazon in terms of devices that require this functionality. The general idea is that in the future we will see other devices added as vendors come up with devices where the PF is more or less just a lightweight shim used to allocate VFs. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> [bhelgaas: changelog] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Greg Rose <gvrose8192@gmail.com> Reviewed-by: Christoph Hellwig <hch@lst.de>
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#
37dddf14 |
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30-Jan-2018 |
Cyrille Pitchen <cyrille.pitchen@free-electrons.com> |
PCI: cadence: Add EndPoint Controller driver for Cadence PCIe controller This patch adds support to the Cadence PCIe controller in endpoint mode. Since pieces of source code are shared with the host driver (Root Complex mode), we create a new directory under drivers/pci dedicated to the Cadence PCIe controller. The common code is placed into drivers/pci/cadence/pcie-cadence.c and used by both the host and endpoint controller drivers. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
9de0eec2 |
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30-Jan-2018 |
Cyrille Pitchen <cyrille.pitchen@free-electrons.com> |
PCI: Regroup all PCI related entries into drivers/pci/Makefile Clean up drivers/Makefile by moving the pci/endpoint and pci/dwc entries from drivers/Makefile into drivers/pci/Makefile. Since we don't want to introduce any dependency between CONFIG_PCI and CONFIG_PCI_ENDPOINT, we now always execute drivers/pci/Makefile. Hence all Makefiles in drivers/pci/ were updated accordingly so no file is compiled when CONFIG_PCI is not defined. Also, we add a comment to reinforce that EPC and EPF libraries must be initialized before their users. Hence built-in EPC drivers, such as those of Designware, are linked after the endpoint core libraries. Finally, we add another comment to explain why obj-y has been chosen instead of obj-$(CONFIG_PCIE_DW) to parse the dwc/ sub-folder. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@free-electrons.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
7328c8f4 |
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26-Jan-2018 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI: Add SPDX GPL-2.0 when no license was specified b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to files with no license") added SPDX GPL-2.0 to several PCI files that previously contained no license information. Add SPDX GPL-2.0 to all other PCI files that did not contain any license information and hence were under the default GPL version 2 license of the kernel. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
fd2fa6c1 |
|
22-Nov-2017 |
Bjorn Helgaas <bhelgaas@google.com> |
x86/PCI: Remove unused HyperTransport interrupt support There are no in-tree callers of ht_create_irq(), the driver interface for HyperTransport interrupts, left. Remove the unused entry point and all the supporting code. See 8b955b0dddb3 ("[PATCH] Initial generic hypertransport interrupt support"). Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Andi Kleen <ak@linux.intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-pci@vger.kernel.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Link: https://lkml.kernel.org/r/20171122221337.3877.23362.stgit@bhelgaas-glaptop.roam.corp.google.com
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#
03ea2263 |
|
02-Nov-2017 |
Randy Dunlap <rdunlap@infradead.org> |
PCI: Move PCI_QUIRKS to the PCI bus menu Localize PCI_QUIRKS in the PCI bus menu. Move PCI_QUIRKS to the PCI bus menu instead of the (often broken) General Setup EXPERT menu. The prompt still depends on EXPERT. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
ad581f86 |
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20-Sep-2017 |
Sascha El-Sharkawy <elscha@sse.uni-hildesheim.de> |
PCI: Add Kconfig PCI_IOV dependency for PCI_REALLOC_ENABLE_AUTO Ensure only valid Kconfig configurations for PCI_REALLOC_ENABLE_AUTO. This is done by selecting PCI_IOV, which is required by PCI_REALLOC_ENABLE_AUTO to work. Signed-off-by: Sascha El-Sharkawy <elscha@sse.uni-hildesheim.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
714fe383 |
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16-Mar-2017 |
Thomas Gleixner <tglx@linutronix.de> |
PCI: Provide Kconfig option for lockless config space accessors The generic PCI configuration space accessors are globally serialized via pci_lock. On larger systems this causes massive lock contention when the configuration space has to be accessed frequently. One such access pattern is the Intel Uncore performance counter unit. Provide a kernel config option which can be selected by an architecture when the low level PCI configuration space accessors in the architecture use their own serialization or can operate completely lockless. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Bjorn Helgaas <helgaas@kernel.org> Cc: Andi Kleen <ak@linux.intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Borislav Petkov <bp@alien8.de> Cc: linux-pci@vger.kernel.org Link: http://lkml.kernel.org/r/20170316215057.205961140@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
5e8cb403 |
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10-Apr-2017 |
Kishon Vijay Abraham I <kishon@ti.com> |
PCI: endpoint: Add EP core layer to enable EP controller and EP functions Introduce a new EP core layer in order to support endpoint functions in linux kernel. This comprises the EPC library (Endpoint Controller Library) and EPF library (Endpoint Function Library). EPC library implements functions specific to an endpoint controller and EPF library implements functions specific to an endpoint function. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
080b47de |
|
06-Mar-2017 |
Logan Gunthorpe <logang@deltatee.com> |
MicroSemi Switchtec management interface driver Microsemi's "Switchtec" line of PCI switch devices is already well supported by the kernel with standard PCI switch drivers. However, the Switchtec device advertises a special management endpoint with a separate PCI function address and class code. This endpoint enables some additional functionality which includes: * Packet and Byte Counters * Switch Firmware Upgrades * Event and Error logs * Querying port link status * Custom user firmware commands Add a switchtec kernel module which provides PCI driver that exposes a char device. The char device provides userspace access to this interface through read, write and (optionally) poll calls. A userspace tool and library which utilizes this interface is available at [1]. This tool takes inspiration (and borrows some code) from nvme-cli [2]. The tool is largely complete at this time but additional features may be added in the future. [1] https://github.com/sbates130272/switchtec-user [2] https://github.com/linux-nvme/nvme-cli [Dan Carpenter <dan.carpenter@oracle.com>: don't invert error codes] [Christophe JAILLET <christophe.jaillet@wanadoo.fr>: fix switchtec_dev_open() error handling] Tested-by: Krishna Dhulipala <krishnad@fb.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Stephen Bates <stephen.bates@microsemi.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Wei Zhang <wzhang@fb.com> Reviewed-by: Jens Axboe <axboe@fb.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
950bf638 |
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06-Jan-2017 |
Kishon Vijay Abraham I <kishon@ti.com> |
PCI: Move DesignWare IP support to new drivers/pci/dwc/ directory Group all the PCI drivers that use DesignWare core in dwc directory. dwc IP is capable of operating in both host mode and device mode and keeping it inside the *host* directory is misleading. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jingoo Han <jingoohan1@gmail.com> Acked-By: Joao Pinto <jpinto@synopsys.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Minghuan Lian <minghuan.Lian@freescale.com> Cc: Mingkai Hu <mingkai.hu@freescale.com> Cc: Roy Zang <tie-fei.zang@freescale.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Pratyush Anand <pratyush.anand@gmail.com> Cc: Niklas Cassel <niklas.cassel@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: Zhou Wang <wangzhou1@hisilicon.com> Cc: Gabriele Paoloni <gabriele.paoloni@huawei.com> Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
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#
f8430eae |
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09-Aug-2016 |
Joao Pinto <Joao.Pinto@synopsys.com> |
PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for ARC Add ARC as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the ARC arch. Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Vineet Gupta <vgupta@synopsys.com>
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#
3ee80364 |
|
15-Jun-2016 |
Arnd Bergmann <arnd@arndb.de> |
PCI/MSI: irqchip: Fix PCI_MSI dependencies The PCI_MSI symbol is used inconsistently throughout the tree, with some drivers using 'select' and others using 'depends on', or using conditional selects. This keeps causing problems; the latest one is a result of ARCH_ALPINE using a 'select' statement to enable its platform-specific MSI driver without enabling MSI: warning: (ARCH_ALPINE) selects ALPINE_MSI which has unmet direct dependencies (PCI && PCI_MSI) drivers/irqchip/irq-alpine-msi.c:104:15: error: variable 'alpine_msix_domain_info' has initializer but incomplete type static struct msi_domain_info alpine_msix_domain_info = { ^~~~~~~~~~~~~~~ drivers/irqchip/irq-alpine-msi.c:105:2: error: unknown field 'flags' specified in initializer .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | ^ drivers/irqchip/irq-alpine-msi.c:105:11: error: 'MSI_FLAG_USE_DEF_DOM_OPS' undeclared here (not in a function) .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | ^~~~~~~~~~~~~~~~~~~~~~~~ There is little reason to enable PCI support for a platform that uses MSI but then leave MSI disabled at compile time. Select PCI_MSI from irqchips that implement MSI, and make PCI host bridges that use MSI on ARM depend on PCI_MSI_IRQ_DOMAIN. For all three architectures that support PCI_MSI_IRQ_DOMAIN (ARM, ARM64, X86), enable it by default whenever MSI is enabled. [bhelgaas: changelog, omit crypto config change] Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
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#
35ff9477 |
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10-May-2016 |
Jayachandran C <c.jayachandran@gmail.com> |
PCI: Provide common functions for ECAM mapping Add config option PCI_ECAM and file drivers/pci/ecam.c to provide generic functions for accessing memory-mapped PCI config space. The API is defined in drivers/pci/ecam.h and is written to replace the API in drivers/pci/host/pci-host-common.h. The file defines a new 'struct pci_config_window' to hold the information related to a PCI config area and its mapping. This structure is expected to be used as sysdata for controllers that have ECAM based mapping. Helper functions are provided to setup the mapping, free the mapping and to implement the map_bus method in 'struct pci_ops' Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
30b5b880 |
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21-Mar-2016 |
Tero Roponen <tero.roponen@gmail.com> |
PCI: Restore inclusion of pci/hotplug Kconfig Commit e7e127e3c767 ("PCI: Include pci/hotplug Kconfig directly from pci/Kconfig") added one line to pci/Kconfig. However, for some mysterious reason it isn't there now, even though there are no traces of removing it in the git log. I detected this issue when 'make oldconfig' removed all the options that depended on HOTPLUG_PCI. [bhelgaas: I botched the cfeb8139a1fb ("Merge branch 'pci/host-hv' into next") merge. "git diff cfeb8139a1fb^ cfeb8139a1fb" shows a conflict in drivers/pci/Kconfig, and I mistakenly dropped the hotplug/Kconfig piece.] Signed-off-by: Tero Roponen <tero.roponen@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
e7e127e3 |
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08-Mar-2016 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI: Include pci/hotplug Kconfig directly from pci/Kconfig Include pci/hotplug/Kconfig directly from pci/Kconfig, so arches don't have to source both pci/Kconfig and pci/hotplug/Kconfig. Note that this effectively adds pci/hotplug/Kconfig to the following arches, because they already sourced drivers/pci/Kconfig but they previously did not source drivers/pci/hotplug/Kconfig: alpha arm avr32 frv m68k microblaze mn10300 sparc unicore32 Inspired-by-patch-from: Bogicevic Sasa <brutallesale@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
5f8fc432 |
|
03-Feb-2016 |
Bogicevic Sasa <brutallesale@gmail.com> |
PCI: Include pci/pcie/Kconfig directly from pci/Kconfig Include pci/pcie/Kconfig directly from pci/Kconfig, so arches don't have to source both pci/Kconfig and pci/pcie/Kconfig. Note that this effectively adds pci/pcie/Kconfig to the following arches, because they already sourced drivers/pci/Kconfig but they previously did not source drivers/pci/pcie/Kconfig: alpha avr32 blackfin frv m32r m68k microblaze mn10300 parisc sparc unicore32 xtensa [bhelgaas: changelog, source pci/pcie/Kconfig at top of pci/Kconfig, whitespace] Signed-off-by: Sasa Bogicevic <brutallesale@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
4daace0d |
|
16-Feb-2016 |
Jake Oshins <jakeo@microsoft.com> |
PCI: hv: Add paravirtual PCI front-end for Microsoft Hyper-V VMs Add a new driver which exposes a root PCI bus whenever a PCI Express device is passed through to a guest VM under Hyper-V. The device can be single- or multi-function. The interrupts for the devices are managed by an IRQ domain, implemented within the driver. [bhelgaas: fold in race condition fix (http://lkml.kernel.org/r/1456340196-13717-1-git-send-email-jakeo@microsoft.com)] Signed-off-by: Jake Oshins <jakeo@microsoft.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
e02a653e |
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02-Sep-2015 |
Helge Deller <deller@gmx.de> |
PCI,parisc: Enable 64-bit bus addresses on PA-RISC Commit 3a9ad0b ("PCI: Add pci_bus_addr_t") unconditionally introduced usage of 64-bit PCI bus addresses on all 64-bit platforms which broke PA-RISC. It turned out that due to enabling the 64-bit addresses, the PCI logic decided to use the GMMIO instead of the LMMIO region. This commit simply disables registering the GMMIO and thus we fall back to use the LMMIO region as before. Reverts commit 45ea2a5fed6dacb9bb0558d8b21eacc1c45d5bb4 ("PCI: Don't use 64-bit bus addresses on PA-RISC") To: linux-parisc@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Meelis Roos <mroos@linux.ee> Cc: stable@vger.kernel.org # v3.19+ Signed-off-by: Helge Deller <deller@gmx.de>
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#
45ea2a5f |
|
19-Aug-2015 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI: Don't use 64-bit bus addresses on PA-RISC Meelis and Helge reported that 3a9ad0b4fdcd ("PCI: Add pci_bus_addr_t") caused HPMCs on A500 and hangs on rp5470. PA-RISC does not set ARCH_DMA_ADDR_T_64BIT, even for 64-bit kernels, so prior to 3a9ad0b4fdcd, we always used 32-bit PCI addresses. After 3a9ad0b4fdcd, we do use 64-bit PCI addresses in 64-bit kernels, and apparently there's some PA-RISC problem related to them. Fixes: 3a9ad0b4fdcd ("PCI: Add pci_bus_addr_t") Link: http://lkml.kernel.org/r/alpine.LRH.2.11.1507260929000.30065@math.ut.ee Reported-by: Meelis Roos <mroos@linux.ee> Reported-by: Helge Deller <deller@gmx.de> Tested-by: Helge Deller <deller@gmx.de> Based-on-idea-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org> CC: stable@vger.kernel.org # v3.19+
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#
3a9ad0b4 |
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27-May-2015 |
Yinghai Lu <yinghai@kernel.org> |
PCI: Add pci_bus_addr_t David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows") fails to boot on sparc/T5-8: pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000) The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA addresses, i.e., bus addresses returned via the DMA API (dma_map_single(), etc.), while the PCI core assumed dma_addr_t could hold *any* bus address, including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that tripped over this mismatch. Add pci_bus_addr_t, which is wide enough to hold any PCI bus address, including both raw BAR values and DMA addresses. This will be 64 bits on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then dma_addr_t only needs to be wide enough to hold addresses from the DMA API. [bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at least as wide as dma_addr_t, documentation] Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows") Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB") Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231 Reported-by: David Ahern <david.ahern@oracle.com> Tested-by: David Ahern <david.ahern@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David S. Miller <davem@davemloft.net> CC: stable@vger.kernel.org # v3.19+
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#
2f600025 |
|
27-Oct-2014 |
Jiang Liu <jiang.liu@linux.intel.com> |
x86, irq: Make MSI and HT_IRQ indepenent of X86_IO_APIC Now we have splitted functions to support MSI and HT_IRQ into vector.c, and they have no dependency on IOAPIC any more. So change Kconfig files to make MSI and HT_IRQ independent of X86_IO_APIC. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Link: http://lkml.kernel.org/r/1414397531-28254-16-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
5db66334 |
|
26-Oct-2014 |
Jiang Liu <jiang.liu@linux.intel.com> |
PCI: Remove PCI ioapic driver To support IOAPIC hotplug on x86 and IA64 platforms, OS needs to figure out global interrupt source number(GSI) and IOAPIC enumeration ID through ACPI interfaces. So BIOS must implement an ACPI IOAPIC device with _GSB/_UID or _MAT method to support IOAPIC hotplug. OS also needs to figure out base physical address to access IOAPIC registers. OS may get the base physical address through PCI BARs if IOAPIC device is visible in PCI domain, otherwise OS may get the address by ACPI _CRS method if IOAPIC device is hidden from PCI domain by BIOS. When adding a PCI subtree, we need to add IOAPIC devices before enabling all other PCI devices because other PCI devices may use the IOAPIC to allocate PCI interrupts. So we plan to reimplement IOAPIC driver as an ACPI instead of PCI driver due to: 1) hot-pluggable IOAPIC devices are always visible in ACPI domain, but may or may not be visible in PCI domain. 2) we could explicitly control the order between IOAPIC and other PCI devices. We also have another choice to use a PCI driver to manage IOAPIC device if it's visible in PCI domain and use an ACPI driver if it's only visible in ACPI domain. But this solution is a little complex. It shouldn't cause serious backward compatibility issues because: 1) IOAPIC hotplug is never supported on x86 yet because it hasn't implemented the required acpi_register_ioapic() and acpi_unregister_ioapic(). 2) Currently only ACPI based IOAPIC hotplug is possible on x86 and IA64, we don't know other specifications and interfaces to support IOAPIC hotplug yet. 3) We will reimplement an ACPI IOAPIC driver to support IOAPIC hotplug. This change also helps to get rid of the false alarm on all current Linux distributions: [ 6.952497] ioapic: probe of 0000:00:05.4 failed with error -22 [ 6.959542] ioapic: probe of 0000:80:05.4 failed with error -22 Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Link: http://lkml.kernel.org/r/1414387308-27148-9-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
3878eaef |
|
11-Nov-2014 |
Jiang Liu <jiang.liu@linux.intel.com> |
PCI/MSI: Enhance core to support hierarchy irqdomain Enhance PCI MSI core to support hierarchy irqdomain, so the common code can be shared across architectures. [ tglx: Extracted and combined from several patches ] Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Yingjoe Chen <yingjoe.chen@mediatek.com> Cc: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
38b6a1cf |
|
11-Nov-2014 |
Jiang Liu <jiang.liu@linux.intel.com> |
PCI/MSI: Move cached entry functions to irq core Required to support non PCI based MSI. [ tglx: Extracted from Jiangs patch series ] Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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#
77410439 |
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02-Jan-2014 |
Yinghai Lu <yinghai@kernel.org> |
PCI: Convert ioapic to be builtin only, not modular Convert pci/ioapic.c to be builtin only, with no module option, so we can support IO-APIC hotplug. Also make it depend on X86_IO_APIC. [bhelgaas: changelog] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
ebd97be6 |
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09-Aug-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
PCI: remove ARCH_SUPPORTS_MSI kconfig option Now that we have weak versions for each of the PCI MSI architecture functions, we can actually build the MSI support for all platforms, regardless of whether they provide or not architecture-specific versions of those functions. For this reason, the ARCH_SUPPORTS_MSI hidden kconfig boolean becomes useless, and this patch gets rid of it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: Daniel Price <daniel.price@gmail.com> Tested-by: Thierry Reding <thierry.reding@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: linux390@de.ibm.com Cc: linux-s390@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: x86@kernel.org Cc: Russell King <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: linux-ia64@vger.kernel.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: David S. Miller <davem@davemloft.net> Cc: sparclinux@vger.kernel.org Cc: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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#
40b31360 |
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20-May-2013 |
Stephen Rothwell <sfr@canb.auug.org.au> |
Finally eradicate CONFIG_HOTPLUG Ever since commit 45f035ab9b8f ("CONFIG_HOTPLUG should be always on"), it has been basically impossible to build a kernel with CONFIG_HOTPLUG turned off. Remove all the remaining references to it. Cc: Russell King <linux@arm.linux.org.uk> Cc: Doug Thompson <dougthompson@xmission.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Steven Whitehouse <swhiteho@redhat.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Pavel Machek <pavel@ucw.cz> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
45361a4f |
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16-May-2013 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
pci: PCIe driver for Marvell Armada 370/XP systems This driver implements the support for the PCIe interfaces on the Marvell Armada 370/XP ARM SoCs. In the future, it might be extended to cover earlier families of Marvell SoCs, such as Dove, Orion and Kirkwood. The driver implements the hw_pci operations needed by the core ARM PCI code to setup PCI devices and get their corresponding IRQs, and the pci_ops operations that are used by the PCI core to read/write the configuration space of PCI devices. Since the PCIe interfaces of Marvell SoCs are completely separate and not linked together in a bus, this driver sets up an emulated PCI host bridge, with one PCI-to-PCI bridge as child for each hardware PCIe interface. In addition, this driver enumerates the different PCIe slots, and for those having a device plugged in, it sets up the necessary address decoding windows, using the mvebu-mbus driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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#
67de07a7 |
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10-Sep-2012 |
Jan Beulich <JBeulich@suse.com> |
PCI: Drop bogus default from ARCH_SUPPORTS_MSI Options without prompts and without dependencies don't usefully have a default value - they're intended to be selected from other options only. Signed-off-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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#
b07f2ebc |
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23-Feb-2012 |
Yinghai Lu <yinghai@kernel.org> |
PCI: add a PCI resource reallocation config option Add a new config option, PCI_REALLOC_ENABLE_AUTO, which will automatically try to re-allocate PCI resources if PCI_IOV support is enabled and the SR-IOV resources are unassigned. Behavior can still be controlled using the pci=realloc= parameter. -v2: According to Jesse, adding one CONFIG option for distribution to disable it or enable it. -v3: update Kconfig text (jbarnes) Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
b95a7bd7 |
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06-Dec-2011 |
Jan Beulich <JBeulich@suse.com> |
pci, x86/io-apic: Allow PCI_IOAPIC to be user configurable on x86 This adjusts PCI_IOAPIC to be user configurable (possibly as a module) on x86, since the base architecture code for adding IO-APICs dynamically isn't there yet (and hence having the code present everywhere is pretty pointless). To make this consistent, a MODULE_DEVICE_TABLE() declaration gets added, the class specifications get corrected (by properly using PCI_DEVICE_CLASS() intended for purposes like this), and the probe and remove functions get their sections adjusted. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Bjorn Helgaas <bhelgaas@google.com> Link: http://lkml.kernel.org/r/4EDDD71A02000078000659F1@nat28.tlf.novell.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
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#
a8d2de5e |
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24-Oct-2011 |
Paul Bolle <pebolle@tiscali.nl> |
pci: drop unused Kconfig symbol There's no other Kconfig symbol that depends on XEN_PCIDEV_FE_DEBUG. Neither is there anything that uses CONFIG_XEN_PCIDEV_FE_DEBUG. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Michal Marek <mmarek@suse.cz>
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#
c54420d3 |
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30-Oct-2011 |
Joerg Roedel <joerg.roedel@amd.com> |
PCI: Let PCI_PRI depend on PCI This avoids the PCI_PRI question in 'make config' when PCI is not selected. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
086ac11f |
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27-Sep-2011 |
Joerg Roedel <joerg.roedel@amd.com> |
PCI: Add support for PASID capability Devices supporting Process Address Space Identifiers (PASIDs) can use an IOMMU to access multiple IO address spaces at the same time. A PCIe device indicates support for this feature by implementing the PASID capability. This patch adds support for the capability to the Linux kernel. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
c320b976 |
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27-Sep-2011 |
Joerg Roedel <joerg.roedel@amd.com> |
PCI: Add implementation for PRI capability Implement the necessary functions to handle PRI capabilities on PCIe devices. With PRI devices behind an IOMMU can signal page fault conditions to software and recover from such faults. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
db3c33c6 |
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27-Sep-2011 |
Joerg Roedel <joerg.roedel@amd.com> |
PCI: Move ATS implementation into own file ATS does not depend on IOV support, so move the code into its own file. This file will also include support for the PRI and PASID capabilities later. Also give ATS its own Kconfig variable to allow selecting it without IOV support. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
8a226e00 |
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29-Mar-2011 |
Randy Dunlap <randy.dunlap@oracle.com> |
PCI: pci-label: Fix build failure when CONFIG_NLS is set to 'm' by allmodconfig Create a kconfig option symbol for PCI_LABEL and enable it when DMI || ACPI are enabled. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
6058989b |
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02-Mar-2011 |
Narendra_K@Dell.com <Narendra_K@Dell.com> |
PCI: Export ACPI _DSM provided firmware instance number and string name to sysfs This patch exports ACPI _DSM (Device Specific Method) provided firmware instance number and string name of PCI devices as defined by 'PCI Firmware Specification Revision 3.1' section 4.6.7.( DSM for Naming a PCI or PCI Express Device Under Operating Systems) to sysfs. New files created are: /sys/bus/pci/devices/.../label which contains the firmware name for the device in question, and /sys/bus/pci/devices/.../acpi_index which contains the firmware device type instance for the given device. cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.0/acpi_index 1 cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.0/label Embedded Broadcom 5709C NIC 1 cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.1/acpi_index 2 cat /sys/devices/pci0000:00/0000:00:01.0/0000:01:00.1/label Embedded Broadcom 5709C NIC 2 The ACPI _DSM provided firmware 'instance number' and 'string name' will be given priority if the firmware also provides 'SMBIOS type 41 device type instance and string'. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Jordan Hargrave <jordan_hargrave@dell.com> Signed-off-by: Narendra K <narendra_k@dell.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
fce263c1 |
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10-Dec-2010 |
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> |
xen/pci: Make xen-pcifront be dependent on XEN_XENBUS_FRONTEND Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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#
956a9202 |
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02-Aug-2010 |
Ryan Wilson <hap9@epoch.ncsc.mil> |
xen-pcifront: Xen PCI frontend driver. This is a port of the 2.6.18 Xen PCI front driver with fixes to make it build under 2.6.34 and later (for the full list of changes: git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen.git historic/xen-pcifront-0.1). It also includes the fixes to make it work properly. [v2: Updated Kconfig, removed crud, added Reviewed-by] [v3: Added 'static', fixed grant table leak, redid Kconfig] [v4: Added one more 'static' and removed comments] Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Reviewed-by: Jan Beulich <JBeulich@novell.com>
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#
3196180a |
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08-Apr-2010 |
Jesse Barnes <jbarnes@virtuousgeek.org> |
PCI: change PCI_MSI help text to recommend enabling Most current machines have no problem with this, and in fact many devices and features work best (or only!) with MSI. Reported-by: Petteri Räty <betelgeuse@gentoo.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
41a68a74 |
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18-Jan-2010 |
Tilman Schmidt <tilman@imap.cc> |
PCI: push deprecated pci_find_device() function to last user The ISDN4Linux HiSax driver family contains the last remaining users of the deprecated pci_find_device() function. This patch creates a private copy of that function in HiSax, and removes the now unused global function together with its controlling configuration option, CONFIG_PCI_LEGACY. Signed-off-by: Tilman Schmidt <tilman@imap.cc> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
8d6cfdcd |
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30-Oct-2009 |
Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com> |
PCI: remove pci_find_slot from PCI_LEGACY config description Commit 3b073eda has removed pci_find_slot, so there's no point in mentioning it in the config description as one of the deprecated APIs there are enabled by PCI_LEGACY and still used by some drivers. Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
204d49a5 |
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26-Oct-2009 |
Bjorn Helgaas <bjorn.helgaas@hp.com> |
PCI hotplug: move IOAPIC support from acpiphp to ioapic driver This patch moves PCI I/O APIC support from acpiphp to a separate driver. Like pciehp and shpchp, acpiphp handles PCI hotplug, i.e., addition and removal of PCI adapters. But in addition, acpiphp handles some ACPI hotplug, such as the addition of new host bridges, and the I/O APIC support was tangled up with that. I don't think the I/O APIC support needs to be in acpiphp; PCI I/O APICs usually appear as a function on a PCI host bridge, and we'll enumerate the APIC before any of the devices behind the bridge that use it. As far as I know, nobody actually uses I/O APIC hotplug. It depends on acpi_register_ioapic(), which is only implemented for ia64, and I don't think any vendors have supported I/O chassis hotplug yet. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> CC: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> CC: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
d1b054da |
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19-Mar-2009 |
Yu Zhao <yu.zhao@intel.com> |
PCI: initialize and release SR-IOV capability If a device has the SR-IOV capability, initialize it (set the ARI Capable Hierarchy in the lowest numbered PF if necessary; calculate the System Page Size for the VF MMIO, probe the VF Offset, Stride and BARs). A lock for the VF bus allocation is also initialized if a PF is the lowest numbered PF. Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
c70e0d9d |
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25-Nov-2008 |
Chris Wright <chrisw@sous-sol.org> |
PCI: pci-stub module to reserve pci device When doing device assignment with KVM there's currently nothing to protect the device from having a driver in the host as well as the guest. This trivial module just binds the pci device on the host to a stub driver so that a real host driver can't bind to the device. It has no pci id table, it supports only dynamic ids. # echo "8086 10f5" > /sys/bus/pci/drivers/pci-stub/new_id # echo -n 0000:00:19.0 > /sys/bus/pci/drivers/e1000e/unbind # echo -n 0000:00:19.0 > /sys/bus/pci/drivers/pci-stub/bind # ls -l /sys/bus/pci/devices/0000:00:19.0/driver lrwxrwxrwx 1 root root 0 2008-11-25 19:10 /sys/bus/pci/devices/0000:00:19.0/driver -> ../../../bus/pci/drivers/pci-stub Cc: "Kay, Allen M" <allen.m.kay@intel.com> Cc: "Nakajima, Jun" <jun.nakajima@intel.com> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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#
bd3989e0 |
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29-Oct-2007 |
Jeff Garzik <jeff@garzik.org> |
PCI: Add Kconfig option to disable deprecated pci_find_* API Signed-off-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#
5adc55da |
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26-Mar-2007 |
Adrian Bunk <bunk@stusta.de> |
PCI: remove the broken PCI_MULTITHREAD_PROBE option This patch removes the PCI_MULTITHREAD_PROBE option that had already been marked as broken. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#
f282b970 |
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18-Apr-2007 |
Dan Williams <dan.j.williams@intel.com> |
msi: introduce ARCH_SUPPORTS_MSI Kconfig option (rev2) Allows architectures to advertise that they support MSI rather than listing each architecture as a PCI_MSI dependency. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#
35a17eb6 |
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10-Feb-2007 |
David S. Miller <davem@sunset.davemloft.net> |
[SPARC64]: Add PCI MSI support on Niagara. This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
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#
fd8d4b11 |
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14-Dec-2006 |
Andrew Morton <akpm@osdl.org> |
[PATCH] PCI: disable PCI_MULTITHREAD_PROBE Unfortunatly, no one reads Kconfig help entries :( Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#
009af1ff |
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27-Oct-2006 |
Greg Kroah-Hartman <gregkh@suse.de> |
PCI: Let PCI_MULTITHREAD_PROBE not be broken It's not really broken, but people keep running into other problems caused by it. Re-enable it so that the drivers get stress tested. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#
03a67a46 |
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29-Nov-2006 |
Jan Engelhardt <jengelh@gmx.de> |
Fix typos in doc and comments Changes persistant -> persistent. www.dictionary.com does not know persistant (with an A), but should it be one of those things you can spell in more than one correct way, let me know. Signed-off-by: Jan Engelhardt <jengelh@gmx.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
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#
3cb2fccc |
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29-Nov-2006 |
Matt LaPlante <kernel1@cyberdogtech.com> |
Fix misc Kconfig typos Fix various Kconfig typos. Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
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#
bb44c308 |
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27-Oct-2006 |
Adrian Bunk <bunk@stusta.de> |
PCI: Let PCI_MULTITHREAD_PROBE depend on BROKEN PCI_MULTITHREAD_PROBE is an interesting feature, but in its current state it seems to be more of a trap for users who accidentally enable it. This patch lets PCI_MULTITHREAD_PROBE depend on BROKEN for 2.6.19. The intention is to get this patch reversed in -mm as soon as it's in Linus' tree, and reverse it for 2.6.20 or 2.6.21 after the fallout of in-kernel problems PCI_MULTITHREAD_PROBE causes got fixed. (akpm: I get enough bug reports already) Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#
fbab41cc |
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11-Oct-2006 |
Adrian Bunk <bunk@stusta.de> |
[PATCH] HT_IRQ must depend on PCI CONFIG_PCI=n, CONFIG_HT_IRQ=y results in the following compile error: ... LD vmlinux arch/i386/mach-generic/built-in.o: In function `apicid_to_node': summit.c:(.text+0x53): undefined reference to `apicid_2_node' arch/i386/kernel/built-in.o: In function `arch_setup_ht_irq': (.text+0xcf79): undefined reference to `write_ht_irq_low' arch/i386/kernel/built-in.o: In function `arch_setup_ht_irq': (.text+0xcf85): undefined reference to `write_ht_irq_high' arch/i386/kernel/built-in.o: In function `k7nops': alternative.c:(.data+0x1358): undefined reference to `mask_ht_irq' alternative.c:(.data+0x1360): undefined reference to `unmask_ht_irq' make[1]: *** [vmlinux] Error 1 Bug report by Jesper Juhl. Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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#
95d77884 |
|
04-Oct-2006 |
Eric W. Biederman <ebiederm@xmission.com> |
[PATCH] htirq: tidy up the htirq code This moves the declarations for the architecture helpers into include/linux/htirq.h from the generic include/linux/pci.h. Hopefully this will make this distinction clearer. htirq.h is included where it is needed. The dependency on the msi code is fixed and removed. The Makefile is tidied up. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Tony Luck <tony.luck@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Greg KH <greg@kroah.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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#
8b955b0d |
|
04-Oct-2006 |
Eric W. Biederman <ebiederm@xmission.com> |
[PATCH] Initial generic hypertransport interrupt support This patch implements two functions ht_create_irq and ht_destroy_irq for use by drivers. Several other functions are implemented as helpers for arch specific irq_chip handlers. The driver for the card I tested this on isn't yet ready to be merged. However this code is and hypertransport irqs are in use in a few other places in the kernel. Not that any of this will get merged before 2.6.19 Because the ipath-ht400 is slightly out of spec this code will need to be generalized to work there. I think all of the powerpc uses are for a plain interrupt controller in a chipset so support for native hypertransport devices is a little less interesting. However I think this is a half way decent model on how to separate arch specific and generic helper code, and I think this is a functional model of how to get the architecture dependencies out of the msi code. [akpm@osdl.org: Kconfig fix] Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Greg KH <greg@kroah.com> Cc: Andi Kleen <ak@muc.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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#
0f397f86 |
|
18-Jul-2006 |
Greg Kroah-Hartman <gregkh@suse.de> |
PCI: enable driver multi-threaded probe This provides a build and run-time option to turn on multhreaded probe for all PCI drivers. It can cause bad problems on multi-processor machines that take a while to find their root disks, and play havoc on machines that don't use persistant device names for block or network devices. But it can cause speedups on some machines, my tiny laptop's boot goes up by 0.4 seconds, and my desktop boots up several seconds faster. Use at your own risk!!! Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#
309e57df |
|
05-Mar-2006 |
Matthew Wilcox <willy@infradead.org> |
[PATCH] PCI: Provide a boot parameter to disable MSI Several drivers are starting to grow options to disable MSI. However, it's often a host chipset issue, not something which individual drivers should handle. So we add the pci=nomsi kernel parameter to allow the user to disable MSI modes for systems we haven't added to the quirk list yet. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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5eeca8e6 |
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05-Mar-2006 |
Adrian Bunk <bunk@stusta.de> |
[PATCH] PCI: the scheduled removal of PCI_LEGACY_PROC This patch contains the scheduled removal of PCI_LEGACY_PROC. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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982245f0 |
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16-Jul-2005 |
Adrian Bunk <bunk@stusta.de> |
[PATCH] PCI: remove CONFIG_PCI_NAMES This patch removes CONFIG_PCI_NAMES. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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1da177e4 |
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16-Apr-2005 |
Linus Torvalds <torvalds@ppc970.osdl.org> |
Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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