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f9455715 |
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11-Mar-2023 |
Vladimir Lypak <vladimir.lypak@gmail.com> |
wifi: wcn36xx: add support for pronto-v3 Pronto v3 has a different DXE address than prior Pronto versions. This patch changes the macro to return the correct register address based on the pronto version. Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://lore.kernel.org/r/20230311150647.22935-2-sireeshkodali1@gmail.com
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f02e1cc2 |
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27-Oct-2021 |
Benjamin Li <benl@squareup.com> |
wcn36xx: implement flush op to speed up connected scan Without ieee80211_ops->flush implemented to empty HW queues, mac80211 will do a 100ms dead wait after stopping SW queues, before leaving the operating channel to resume a software connected scan[1]. (see ieee80211_scan_state_resume) This wait is correctly included in the calculation for whether or not we've exceeded max off-channel time, as it occurs after sending the null frame with PS bit set. Thus, with 125 ms max off-channel time we only have 25 ms of scan time, which technically isn't even enough to scan one channel (although mac80211 always scans at least one channel per off- channel window). Moreover, for passive probes we end up spending at least 100 ms + 111 ms (IEEE80211_PASSIVE_CHANNEL_TIME) "off-channel"[2], which exceeds the listen interval of 200 ms that we provide in our association request frame. That's technically out-of-spec. [1]: Until recently, wcn36xx performed software (rather than FW-offloaded) scanning when 5GHz channels are requested. This apparent limitation is now resolved -- see commit 1395f8a6a4d5 ("wcn36xx: Enable hardware scan offload for 5Ghz band"). [2]: in quotes because about 100 ms of it is still on-channel but with PS set Signed-off-by: Benjamin Li <benl@squareup.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20211027170306.555535-3-benl@squareup.com
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6062546d |
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05-Apr-2018 |
Loic Poulain <loic.poulain@linaro.org> |
wcn36xx: Remove useless skb spinlock Each DXE control block is associated to a specific channel. The channel lock is always taken before accessing a control block. There is no need to have an extra (useless) spinlock for the control block skb. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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e5f99081 |
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27-Mar-2018 |
Loic Poulain <loic.poulain@linaro.org> |
wcn36xx: Fix firmware crash due to corrupted buffer address wcn36xx_start_tx function retrieves the buffer descriptor from the channel control queue to start filling tx buffer information. However, nothing prevents this same buffer to be concurrently accessed in a concurent tx call, leading to potential buffer coruption and firmware crash (observed during iperf test). The channel control queue should only be accessed and updated with the channel lock. Fix this issue by using a local buffer descriptor which will be copied in the thread-safe wcn36xx_dxe_tx_frame. Note that buffer descriptor size is few bytes so the introduced copy overhead is insignificant. Moreover, this allows to keep the locked section minimal. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Signed-off-by: Ramon Fried <rfried@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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6767b302 |
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11-Mar-2018 |
Ramon Fried <rfried@codeaurora.org> |
wcn36xx: Check DXE IRQ reason IRQ reason was not cheked for errors. Although error handing is not currently supported, it will be nice to output an error value to the log if the DMA operation failed. Signed-off-by: Ramon Fried <rfried@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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e5d04670 |
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11-Mar-2018 |
Ramon Fried <rfried@codeaurora.org> |
wcn36xx: calculate DXE default channel values DXE channel defaults used hardcoded magic values. Added bit definitions of the control register and calculate this values in compilation for clarity. Signed-off-by: Ramon Fried <rfried@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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6ced7958 |
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04-Mar-2018 |
Ramon Fried <rfried@codeaurora.org> |
wcn36xx: calculate DXE control registers values DXE descriptor control registers used hardcoded magic values. Added bit definitions of the control register and calculate this values in compilation for clarity. No functional changes. Signed-off-by: Ramon Fried <rfried@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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6f10b4e1 |
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20-Jun-2016 |
Bjorn Andersson <bjorn.andersson@linaro.org> |
wcn36xx: Correct DXE chip version differentiation The CCU block in WCNSS is configured for appropriate routing of interrupts from the DXE to the application cpu, this is not dependant on the iris version (wcn3660 vs wcn3680), but rather if the SoC has a riva or pronto built in. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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05ddce49 |
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20-Jun-2016 |
Bjorn Andersson <bjorn.andersson@linaro.org> |
wcn36xx: Split mmio space into explicit regions Split the wcnss mmio space into explicit regions for ccu and dxe and acquire these from the node referenced by the qcom,mmio phandle. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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8e8e54c4 |
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24-Oct-2015 |
Bob Copeland <me@bobcopeland.com> |
wcn36xx: introduce per-channel ring buffer locks wcn36xx implements a ring buffer for transmitted frames for each (high and low priority) DMA channel. The ring buffers are lockless: new frames are inserted at the head of the queue, while finished packets are reaped from the tail. Unfortunately, the list manipulations are missing any kind of barriers so are susceptible to various races: for example, a TX completion handler might read an updated desc->ctrl before the head has actually advanced, and then null out the ctl->skb pointer while it is still being used in the TX path. Simplify things here by adding a spin lock when traversing the ring. This change increased stability for me without adding any noticeable overhead on my platform (xperia z). Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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f2ed5d24 |
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12-Feb-2014 |
Pontus Fuchs <pontus.fuchs@gmail.com> |
wcn36xx: Add support for 3680 3680 has a few registers on other addresses. Signed-off-by: Pontus Fuchs <pontus.fuchs@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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8e84c258 |
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08-Oct-2013 |
Eugene Krasnikov <k.eugene.e@gmail.com> |
wcn36xx: mac80211 driver for Qualcomm WCN3660/WCN3680 hardware This is a mac80211 driver for Qualcomm WCN3660/WCN3680 devices. So far WCN3660/WCN3680 is available only on MSM platform. Firmware can be found here: https://www.codeaurora.org/cgit/external/hisense/platform/vendor/qcom-opensource/wlan/prima/tree/firmware_bin?h=8130_CS Wiki page is available here: http://wireless.kernel.org/en/users/Drivers/wcn36xx A lot people made a contribution to this driver. Here is the list in alphabetical order: Eugene Krasnikov <k.eugene.e@gmail.com> Kalle Valo <kvalo@qca.qualcomm.com> Olof Johansson <dev@skyshaper.net> Pontus Fuchs <pontus.fuchs@gmail.com> Yanbo Li <yanbol@qti.qualcomm.com> Signed-off-by: Eugene Krasnikov <k.eugene.e@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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