#
5b2a2523 |
|
17-Dec-2023 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Can't go to uplink vport on RX rule Go-To-Vport action on RX is not allowed when the vport is uplink. In such case, the packet should be dropped. Fixes: 9db810ed2d37 ("net/mlx5: DR, Expose steering action functionality") Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
56659542 |
|
17-Dec-2023 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Use the right GVMI number for drop action When FW provides ICM addresses for drop RX/TX, the provided capability is 64 bits that contain its GVMI as well as the ICM address itself. In case of TX DROP this GVMI is different from the GVMI that the domain is operating on. This patch fixes the action to use these GVMI IDs, as provided by FW. Fixes: 9db810ed2d37 ("net/mlx5: DR, Expose steering action functionality") Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
952f9a5f |
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17-Nov-2023 |
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> |
net/mlx5: DR, Use swap() instead of open coding it Swap is a function interface that provides exchange function. To avoid code duplication, we can use swap function. ./drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c:1254:50-51: WARNING opportunity for swap(). Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7580 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
ad4d82c3 |
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14-Nov-2023 |
Erez Shitrit <erezsh@nvidia.com> |
net/mlx5: DR, Allow old devices to use multi destination FTE The current check isn't aware of old devices that don't have the relevant FW capability. This patch allows multi destination FTE in old cards, as it was before this check. Fixes: f6f46e7173cb ("net/mlx5: DR, Add check for multi destination FTE") Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com> Link: https://lore.kernel.org/r/20231114215846.5902-4-saeed@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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#
3b81bcba |
|
28-Aug-2023 |
Erez Shitrit <erezsh@nvidia.com> |
net/mlx5: DR, Handle multi destination action in the right order Whenever we have few destinations from Flow-table type we need to put the one that goes to the wire to be the last one. We are using FW in order to get iterator, the FW uses RX for the first destinations and TX for the last destination, if we want the packet to be directed to the wire it should be done in the TX path and not in the RX. The code now checks if the FT is directed to the wire and if so puts it as the last destination. Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
f6f46e71 |
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13-Mar-2023 |
Erez Shitrit <erezsh@nvidia.com> |
net/mlx5: DR, Add check for multi destination FTE The driver should not allow rule that forward to more than one FT in TX flow unless there is a specific support from the FW. Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Reviewed-by: Moshe Shemesh <moshe@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
a15e472f |
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01-Aug-2023 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Remove unneeded local variable Remove local variable that is already defined outside of the scope of this block. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
62752c0b |
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14-Jun-2023 |
Shay Drory <shayd@nvidia.com> |
net/mlx5: DR, Fix peer domain namespace setting The offending patch is based on the assumption that for PFs, mlx5_get_dev_index() is the same as vhca_id. However, this assumption is wrong in case of DPU (ECPF). Fix it by using vhca_id directly, and switch the array of peers to xarray. Fixes: 6d5b7321d8af ("net/mlx5: DR, handle more than one peer domain") Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
ef4c5afc |
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04-Jun-2023 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Fix wrong action data allocation in decap action When TUNNEL_L3_TO_L2 decap action was created, a pointer to a local variable was passed as its HW action data, resulting in attempt to free invalid address: BUG: KASAN: invalid-free in mlx5dr_action_destroy+0x318/0x410 [mlx5_core] Fixes: 4781df92f4da ("net/mlx5: DR, Move STEv0 modify header logic") Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
87cd0649 |
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11-Jun-2023 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Support SW created encap actions for FW table In some cases, steering might need to use SW-created action in FW table, which results in wrong packet reformat being used: mlx5_core 0000:81:00.1: mlx5_cmd_check:756:(pid 1154): SET_FLOW_TABLE_ENTRY(0×936) op_mod(0×0) failed, status bad resource(0×5), syndrome (0xf2ff71) This patch adds support for usage of SW-created packet reformat (encap) actions in FW tables, and adds clear error flow for attempt to use SW-created modify header on FW tables. Fixes: 6a48faeeca10 ("net/mlx5: Add direct rule fs_cmd implementation") Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
6d5b7321 |
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21-Feb-2023 |
Shay Drory <shayd@nvidia.com> |
net/mlx5: DR, handle more than one peer domain Currently, DR domain is using the assumption that each domain can only have a single peer. In order to support VF LAG of more then two ports, expand peer domain to use an array of peers, and align the code accordingly. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
40ff097f |
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15-Nov-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Modify header action of size 1 optimization Set modify header action of size 1 directly on the STE for supporting devices, thus reducing number of hops and cache misses. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
947e2585 |
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14-Nov-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Support decap L3 action using pattern / arg mechanism Use the new accelerated action for decap L3 on RX side: use the mechanism of pattern and argument same as in modify-header action. Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
0caebadd |
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06-Nov-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Add modify header argument pointer to actions attributes While building the actions, add the pointer of the arguments for accelerated modify list action into the action's attributes. This will be used later on while building the specific STE for this action. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
2533e726 |
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29-Aug-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Split chunk allocation to HW-dependent ways This way we are able to allocate chunk for modify_headers from 2 types: STEv0 that is allocated from the action area, and STEv1 that is allocating the chunks from the special area for patterns. Signed-off-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
b47dddc6 |
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05-Nov-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Move ACTION_CACHE_LINE_SIZE macro to header Move ACTION_CACHE_LINE_SIZE macro to header to be used by the pattern functions as well. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
be6d5dae |
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29-Nov-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Add support for range match action Add support for matching on range. The supported type of range is L2 frame size. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
c72a57ad |
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05-Aug-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Handle FT action in a separate function As preparation for range action support, moving the handling of final ICM address for flow table action to a separate function. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
8920d92b |
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15-Jul-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Add support for flow metering ASO Add support for ASO action of type flow metering on device that supports STEv1. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Hamdan Igbaria <hamdani@nvidia.com> Reviewed-by: Roi Dayan <roid@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
785d7ed2 |
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03-Apr-2022 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Ignore modify TTL on RX if device doesn't support it When modifying TTL, packet's csum has to be recalculated. Due to HW issue in ConnectX-5, csum recalculation for modify TTL on RX is supported through a work-around that is specifically enabled by configuration. If the work-around isn't enabled, rather than adding an unsupported action the modify TTL action on RX should be ignored. Ignoring modify TTL action might result in zero actions, so in such cases we will not convert the match STE to modify STE, as it is done by FW in DMFS. This patch fixes an issue where modify TTL action was ignored both on RX and TX instead of only on RX. Fixes: 4ff725e1d4ad ("net/mlx5: DR, Ignore modify TTL if device doesn't support it") Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
2c5fc6cd |
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21-Mar-2022 |
Maor Dickman <maord@nvidia.com> |
net/mlx5: DR, Fix missing flow_source when creating multi-destination FW table In order to support multiple destination FTEs with SW steering FW table is created with single FTE with multiple actions and SW steering rule forward to it. When creating this table, flow source isn't set according to the original FTE. Fix this by passing the original FTE flow source to the created FW table. Fixes: 34583beea4b7 ("net/mlx5: DR, Create multi-destination table for SW-steering use") Signed-off-by: Maor Dickman <maord@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
5c4f9b6e |
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27-Jan-2022 |
Rongwei Liu <rongweil@nvidia.com> |
net/mlx5: DR, Remove icm_addr from mlx5dr_icm_chunk to reduce memory It can be calculated quickly from buddy memory pool by function mlx5dr_icm_pool_get_chunk_icm_addr(). This function is very lightweight and straightforward. Reduce 8 bytes and current size of struct mlx5_dr_icm_chunk is 64 bytes. Signed-off-by: Rongwei Liu <rongweil@nvidia.com> Reviewed-by: Shun Hao <shunh@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
aa818fbf |
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17-Jan-2022 |
Shun Hao <shunh@nvidia.com> |
net/mlx5: DR, Align mlx5dv_dr API vport action with FW behavior This aligns the behavior with FW when creating an FDB rule with wire vport destination but no source port matching. Until now such rules would fail on internal DR RX rule creation since the source and destination are the wire vport. The new behavior is the same as done on FW steering, if destination is wire, we will create both TX and RX rules, but the RX packet coming from wire will be dropped due to loopback not supported. Signed-off-by: Shun Hao <shunh@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
4ff725e1 |
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22-Nov-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Ignore modify TTL if device doesn't support it When modifying TTL, packet's csum has to be recalculated. Due to HW issue in ConnectX-5, csum recalculation for modify TTL is supported through a work-around that is specifically enabled by configuration. If the work-around isn't enabled, ignore the modify TTL action rather than adding an unsupported action. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
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#
b5412827 |
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29-Sep-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Warn on failure to destroy objects due to refcount Add WARN_ON_ONCE on refcount checks in SW steering object destructors Signed-off-by: Paul Blakey <paulb@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
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#
0e6f3ef4 |
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05-Sep-2021 |
Len Baker <len.baker@gmx.com> |
net/mlx5: DR, Prefer kcalloc over open coded arithmetic As noted in the "Deprecated Interfaces, Language Features, Attributes, and Conventions" documentation [1], size calculations (especially multiplication) should not be performed in memory allocator (or similar) function arguments due to the risk of them overflowing. This could lead to values wrapping around and a smaller allocation being made than the caller was expecting. Using those allocations could lead to linear overflows of heap memory and other misbehaviors. So, refactor the code a bit to use the purpose specific kcalloc() function instead of the argument size * count in the kzalloc() function. [1] https://www.kernel.org/doc/html/v5.14/process/deprecated.html#open-coded-arithmetic-in-allocator-arguments Signed-off-by: Len Baker <len.baker@gmx.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
98576013 |
|
19-Sep-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Add missing string for action type SAMPLER Add missing string value for DR_ACTION_TYP_SAMPLER action type Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
5dde00a7 |
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11-Aug-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Fix typo 'offeset' to 'offset' Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
11a45def |
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09-Sep-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Add support for SF vports Move all the vport capabilities to a separate struct and store vport caps in XArray: SFs vport numbers will not come in the same range as VF vports, so the existing implementation of vport capabilities as a fixed size array is not suitable here. XArray is a perfect fit: it is efficient when the indices used are densely clustered. In addition to being a perfect fit as a dynamic data structure, XArray also provides locking - it uses RCU and an internal spinlock to synchronise access, so no additional protection needed. Now except for the eswitch manager vport, all other vports (including the uplink vport) are handled in the same way: when a new go-to-vport action is added, this vport's caps are loaded from the xarray. If it is the first time for this particular vport number, then its capabilities are queried from FW and filled in into the appropriate entry. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
c0e90fc2 |
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08-Sep-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Support csum recalculation flow table on SFs Implement csum recalculation flow tables in XAarray instead of a fixed array, thus adding support for csum recalc table on any valid vport number, which enables this support for SFs. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
ee1887fb |
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17-Aug-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Align error messages for failure to obtain vport caps Print similar error messages when an invalid vport number is provided during action creation and during STEv0/1 creation. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
7ae8ac9a |
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22-Sep-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Replace local WIRE_PORT macro with the existing MLX5_VPORT_UPLINK SW steering defines its own macro for uplink vport number. Replace this macro with an already existing mlx5 macro. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
f9f93bd5 |
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11-Aug-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Fix vport number data type to u16 According to the HW spec, vport number is a 16-bit value. Fix vport usage all over the code to u16 data type. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
46f2a8ae |
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04-Jul-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Remove HW specific STE type from nic domain Instead of using the HW specific STEv0 type, it is better to use an enum to indicate if this is an RX or TX nic domain. This means that now we will need to convert the nic domain type to the corresponding STE type. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
63b85f49 |
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04-Jul-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Add ignore_flow_level support for multi-dest flow tables When creating an FTE, we might need to create multi-destination flow table, which is eventually created by FW. In such case, this FW table should include all the FTE properties as requested by the upper layer, including the ability to point to another flow table with level lower or equal to the current table - indicated by the "ignore_flow_level" property. Signed-off-by: Chris Mi <cmi@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
d7d0b245 |
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26-Aug-2020 |
Bodong Wang <bodong@mellanox.com> |
net/mlx5: DR, Reduce print level for FT chaining level check There are usecases with Connection Tracking that have such connection as default, printing this warning in dmesg confuses the user. Signed-off-by: Bodong Wang <bodong@mellanox.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
f35715a6 |
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24-Sep-2020 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Improve error flow in actions_build_ste_arr Improve error flow and print actions sequence when an invalid/unsupported sequence provided. Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
2de40f68 |
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27-Jun-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Enable VLAN pop on TX and VLAN push on RX Enable pop VLAN action in TX and push VLAN in RX. These actions are supported only on STEv1. On TX: when a host sends a packet, VLAN is popped at the beginning. On RX: just before passing the packet to the host the VLAN is pushed. Signed-off-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yishai Hadas <yishaih@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
f5e22be5 |
|
27-Jun-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Split modify VLAN state to separate pop/push states Split modify vlan state in the actions state machine to pop vlan and push vlan states. This enables using of pop/push vlan without restrictions (e.g. pop vlan on TX in STEv1). Signed-off-by: Muhammad Sammar <muhammads@nvidia.com> Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
0139145f |
|
22-Apr-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Added support for REMOVE_HEADER packet reformat ConnectX supports offloading of various encapsulations and decapsulations (e.g. VXLAN), which are performed by 'Packet Reformat' action. Starting with ConnectX-6 DX, a new reformat type is supported - REMOVE_HEADER, which allows deleting an arbitrary size chunk at the selected position in the packet. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
1ab6dc35 |
|
19-Apr-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Add support for flow sampler offload Add SW steering support for sFlow / flow sampler action. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
7ea9b398 |
|
28-Jan-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Added support for INSERT_HEADER reformat type Add support for INSERT_HEADER packet reformat context type Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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#
3f3f05ab |
|
08-Mar-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: Added new parameters to reformat context Adding new reformat context type (INSERT_HEADER) requires adding two new parameters to reformat context - reformat_param_0 and reformat_param_1. As defined by HW spec, these parameters have different meaning for different reformat context type. The first parameter (reformat_param_0) is not new to HW spec, but it wasn't used by any of the supported reformats. The second parameter (reformat_param_1) is new to the HW spec - it was added to allow supporting INSERT_HEADER. For NSERT_HEADER, reformat_param_0 indicates the header used to reference the location of the inserted header, and reformat_param_1 indicates the offset of the inserted header from the reference point defined by reformat_param_0. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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d7418b4e |
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09-Mar-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Allow encap action for RX for supporting devices Encap actions on RX flow were not supported on older devices. However, this is no longer the case in devices that support STEv1. This patch adds support for encap l3/l2 on RX flow for supported devices: update actions state machine by adding the newely supported transitions and add the required support in STEv0/1 files. The new transitions that are supported are: - from decap/modify-header/pop-vlan to encap - from encap to termination table Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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28de41a4 |
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09-Mar-2021 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Split reformat state to Encap and Decap Split single reformat state into two separate states for encap and decap. This will allow adding actions to the specific domain, such as encap on RX. Signed-off-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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9dac2966 |
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11-Nov-2020 |
Jianbo Liu <jianbol@nvidia.com> |
net/mlx5: DR, Use variably sized data structures for different actions mlx5dr_action is a generally used data structure, and there is an union for different types of actions in it. The size of mlx5dr_action is about 72 bytes, but for those actions with fewer fields, most of the allocated memory is wasted. Remove this union, and mlx5dr_action becomes a generic action header. Then actions are dynamically allocated with needed memory, the data for each action is stored right after the header. Signed-off-by: Jianbo Liu <jianbol@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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a283ea1b |
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28-Oct-2020 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Avoid unnecessary csum recalculation on supporting devices If as part of the actions the TTL of the packet is modified, the packet's checksum needs to be recalculated. Connect-X6DX can handle this csum recalculation natively. Older devices require this additional recalculation. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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4781df92 |
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18-Nov-2020 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Move STEv0 modify header logic Move HW specific modify header fields and logic to STEv0 file and use the new STE context callbacks. Since STEv0 and STEv1 modify actions values are different, each version has its own implementation. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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6b93b400 |
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18-Nov-2020 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Move STEv0 setters and getters Use the new setters and getters API for STEv0: move HW specific setter and getters from dr_ste to STEv0 file. Since STEv0 and STEv1 format are different each version should implemented different setters and getters. Rename remaining static functions w/o mlx5 prefix. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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64c78942 |
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21-Sep-2020 |
Yevgeny Kliteynik <kliteyn@nvidia.com> |
net/mlx5: DR, Move action apply logic to dr_ste The action apply logic is device specific per STE version, moving to the STE layer will allow implementing it for both devices while keeping DR upper layers the same. Signed-off-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Saeed Mahameed <saeedm@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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618f88c4 |
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28-May-2020 |
Saeed Mahameed <saeedm@mellanox.com> |
net/mlx5: DR: Fix incorrect type in argument HW spec objects should receive a void ptr to work on, the MLX5_SET/GET macro will know how to handle it. No need to provide explicit or wrong pointer type in this case. warning: incorrect type in argument 1 (different base types) expected unsigned long long const [usertype] *sw_action got restricted __be64 [usertype] *[assigned] sw_action Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com>
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de346f40 |
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26-Feb-2020 |
Alex Vesker <valex@mellanox.com> |
net/mlx5: DR, Add support for flow table id destination action This action allows to go to a flow table based on the table id. Goto flow table id is required for supporting user space SW. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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692b0399 |
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24-Feb-2020 |
Hamdan Igbaria <hamdani@mellanox.com> |
net/mlx5: DR, Fix postsend actions write length Fix the send info write length to be (actions x action) size in bytes. Fixes: 297cccebdc5a ("net/mlx5: DR, Expose an internal API to issue RDMA operations") Signed-off-by: Hamdan Igbaria <hamdani@mellanox.com> Reviewed-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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b7d0db55 |
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12-Jan-2020 |
Erez Shitrit <erezsh@mellanox.com> |
net/mlx5: DR, Improve log messages Few print messages are in debug level where they should be in error, and few messages are missing. Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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4c7cea2f |
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20-Jan-2020 |
Yevgeny Kliteynik <kliteyn@mellanox.com> |
net/mlx5: DR, Allow connecting flow table to a lower/same level table Allow connecting SW steering source table to a lower/same level destination table. Lifting this limitation is required to support Connection Tracking. Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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c21a49b3 |
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09-Jan-2020 |
Hamdan Igbaria <hamdani@mellanox.com> |
net/mlx5: DR, Modify header copy support Modify header supports ADD/SET and from this patch also COPY. Copy allows to copy header fields and metadata. Signed-off-by: Hamdan Igbaria <hamdani@mellanox.com> Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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a51dcc10 |
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24-Dec-2019 |
Hamdan Igbaria <hamdani@mellanox.com> |
net/mlx5: DR, Modify set action limitation extension Modify set actions are not supported on both tx and rx, added a check for that. Also refactored the code in a way that every modify action has his own functions, this needed so in the future we could add copy action more smoothly. Signed-off-by: Hamdan Igbaria <hamdani@mellanox.com> Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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b8853c96 |
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15-Dec-2019 |
Alex Vesker <valex@mellanox.com> |
net/mlx5: DR, Add support for multiple destination table action A multiple destination table action allows HW packet duplication to multiple destinations, this is useful for multicast or mirroring traffic for debug. Duplicating is done using a FW flow table with multiple destinations. The new action creation function, mlx5dr_action_create_mult_dest_tbl will allow creating a single table to iterate over several dr actions. Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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aec292ee |
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15-Dec-2019 |
Alex Vesker <valex@mellanox.com> |
net/mlx5: DR, Align dest FT action creation to API Function prefix was changed to be similar to other action APIs. In order to support other FW tables the mlx5_flow_table struct was replaced with table id and type. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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22f83150 |
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29-Oct-2019 |
Alex Vesker <valex@mellanox.com> |
net/mlx5: DR, Fix memory leak in modify action destroy The rewrite data was no freed. Fixes: 9db810ed2d37 ("net/mlx5: DR, Expose steering action functionality") Signed-off-by: Alex Vesker <valex@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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cc5fd15f |
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12-Sep-2019 |
Alex Vesker <valex@mellanox.com> |
net/mlx5: DR, Remove redundant vport number from action The vport number is part of the vport_cap, there is no reason to store in a separate variable on the vport. Fixes: 9db810ed2d37 ("net/mlx5: DR, Expose steering action functionality") Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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7550d541 |
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04-Sep-2019 |
Nathan Chancellor <nathan@kernel.org> |
net/mlx5: Fix rt's type in dr_action_create_reformat_action clang warns: drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c:1080:9: warning: implicit conversion from enumeration type 'enum mlx5_reformat_ctx_type' to different enumeration type 'enum mlx5dr_action_type' [-Wenum-conversion] rt = MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL; ~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c:1082:9: warning: implicit conversion from enumeration type 'enum mlx5_reformat_ctx_type' to different enumeration type 'enum mlx5dr_action_type' [-Wenum-conversion] rt = MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL; ~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c:1084:51: warning: implicit conversion from enumeration type 'enum mlx5dr_action_type' to different enumeration type 'enum mlx5_reformat_ctx_type' [-Wenum-conversion] ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev, rt, data_sz, data, ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^~ 3 warnings generated. Use the right type for rt, which is mlx5_reformat_ctx_type so there are no warnings about mismatched types. Fixes: 9db810ed2d37 ("net/mlx5: DR, Expose steering action functionality") Link: https://github.com/ClangBuiltLinux/linux/issues/652 Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Reported-by: Austin Kim <austindh.kim@gmail.com> Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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9db810ed |
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19-Aug-2019 |
Alex Vesker <valex@mellanox.com> |
net/mlx5: DR, Expose steering action functionality On rule creation a set of actions can be provided, the actions describe what to do with the packet in case of a match. It is possible to provide a set of actions which will be done by order. Signed-off-by: Alex Vesker <valex@mellanox.com> Reviewed-by: Erez Shitrit <erezsh@mellanox.com> Reviewed-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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