#
a7f08029 |
|
22-Feb-2024 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: Add support for bridge port isolation Implement bridge port isolation for KSZ switches. Enabling the isolation of switch ports from each other while maintaining connectivity with the CPU and other forwarding ports. For instance, to isolate swp1 and swp2 from each other, use the following commands: - bridge link set dev swp1 isolated on - bridge link set dev swp2 isolated on Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
3723b56d |
|
30-Jan-2024 |
Philippe Schenker <philippe.schenker@impulsing.ch> |
net: dsa: Add KSZ8567 switch support This commit introduces support for the KSZ8567, a robust 7-port Ethernet switch. The KSZ8567 features two RGMII/MII/RMII interfaces, each capable of gigabit speeds, complemented by five 10/100 Mbps MAC/PHYs. Signed-off-by: Philippe Schenker <philippe.schenker@impulsing.ch> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20240130083419.135763-2-dev@pschenker.ch Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
d16f1096 |
|
05-Dec-2023 |
Daniel Danzberger <dd@embedd.com> |
net: dsa: microchip: move ksz_chip_id enum to platform include With the ksz_chip_id enums moved to the platform include file for ksz switches, platform code that instantiates a device can now use these to set ksz_platform_data::chip_id. Signed-off-by: Daniel Danzberger <dd@embedd.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2f58148c |
|
27-Nov-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: ksz8: Add function to configure ports with integrated PHYs This patch introduces the function 'ksz8_phy_port_link_up' to the Microchip KSZ8xxx driver. This function is responsible for setting up flow control and duplex settings for the ports that are integrated with PHYs. The KSZ8795 switch supports asymmetric pause control, which can't be fully utilized since a single bit controls both RX and TX pause. Despite this, the flow control can be adjusted based on the auto-negotiation process, taking into account the capabilities of both link partners. On the other hand, the KSZ8873's PORT_FORCE_FLOW_CTRL bit can be set by the hardware bootstrap, which ignores the auto-negotiation result. Therefore, even in auto-negotiation mode, we need to ensure that this bit is correctly set. When auto-negotiation isn't in use, we enforce symmetric pause control for the KSZ8795 switch. Please note, forcing flow control disable on a port while still advertising pause support isn't possible. While this scenario might not be practical or desired, it's important to be aware of this limitation when working with the KSZ8873 and similar devices. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Simon Horman <simon.horman@corigine.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/20231127145101.3039399-3-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
8afb91ac |
|
25-Oct-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: Ensure Stable PME Pin State for Wake-on-LAN Ensures a stable PME (Power Management Event) pin state by disabling PME on system start and enabling it on shutdown only if WoL (Wake-on-LAN) is configured. This is needed to avoid issues with some PMICs (Power Management ICs). Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20231026051051.2316937-6-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
77c819cb |
|
25-Oct-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: Refactor switch shutdown routine for WoL preparation Centralize the switch shutdown routine in a dedicated function, ksz_switch_shutdown(), to enhance code maintainability and reduce redundancy. This change abstracts the common shutdown operations previously duplicated in ksz9477_i2c_shutdown() and ksz_spi_shutdown(). This refactoring is a preparatory step for an upcoming patch to avoid reset on shutdown if Wake-on-LAN (WoL) is enabled. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20231026051051.2316937-5-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
3b454b63 |
|
25-Oct-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: ksz9477: Add Wake on Magic Packet support Introduce Wake on Magic Packet (WoL) functionality to the ksz9477 driver. Major changes include: 1. Extending the `ksz9477_handle_wake_reason` function to identify Magic Packet wake events alongside existing wake reasons. 2. Updating the `ksz9477_get_wol` and `ksz9477_set_wol` functions to handle WAKE_MAGIC alongside the existing WAKE_PHY option, and to program the switch's MAC address register accordingly when Magic Packet wake-up is enabled. This change will prevent WAKE_MAGIC activation if the related port has a different MAC address compared to a MAC address already used by HSR or an already active WAKE_MAGIC on another port. 3. Adding a restriction in `ksz_port_set_mac_address` to prevent MAC address changes on ports with active Wake on Magic Packet, as the switch's MAC address register is utilized for this feature. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20231026051051.2316937-2-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
d264f244 |
|
23-Oct-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: ksz9477: add Wake on LAN support Add WoL support for KSZ9477 family of switches. This code was tested on KSZ8563 chip. KSZ9477 family of switches supports multiple PHY events: - wake on Link Up - wake on Energy Detect. Since current UAPI can't differentiate between this PHY events, map all of them to WAKE_PHY. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
aed7425d |
|
23-Oct-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: use wakeup-source DT property to enable PME output KSZ switches with WoL support signals wake event over PME pin. If this pin is attached to some external PMIC or System Controller can't be described as GPIO, the only way to describe it in the devicetree is to use wakeup-source property. So, add support for this property and enable PME switch output if this property is present. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2d61298f |
|
22-Sep-2023 |
Lukasz Majewski <lukma@denx.de> |
net: dsa: microchip: Enable HSR offloading for KSZ9477 This patch adds functions for providing in KSZ9477 switch HSR (High-availability Seamless Redundancy) hardware offloading. According to AN3474 application note following features are provided: - TX packet duplication from host to switch (NETIF_F_HW_HSR_DUP) - RX packet duplication discarding - Prevention of packet loop For last two ones - there is a probability that some packets will not be filtered in HW (in some special cases - described in AN3474). Hence, the HSR core code shall be used to discard those not caught frames. Moreover, some switch registers adjustments are required - like setting MAC address of HSR network interface. Additionally, the KSZ9477 switch has been configured to forward frames between HSR ports (e.g. 1,2) members to provide support for NETIF_F_HW_HSR_FWD flag. Join and leave functions are written in a way, that are executed with single port - i.e. configuration is NOT done only when second HSR port is configured. Co-developed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
e5de2ad1 |
|
22-Sep-2023 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: microchip: move REG_SW_MAC_ADDR to dev->info->regs[] Defining macros which have the same name but different values is bad practice, because it makes it hard to avoid code duplication. The same code does different things, depending on the file it's placed in. Case in point, we want to access REG_SW_MAC_ADDR from ksz_common.c, but currently we can't, because we don't know which kszXXXX_reg.h to include from the common code. Remove the REG_SW_MAC_ADDR_{0..5} macros from ksz8795_reg.h and ksz9477_reg.h, and re-add this register offset to the dev->info->regs[] array. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
002841be |
|
14-Sep-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: Add partial ACL support for ksz9477 switches This patch adds partial Access Control List (ACL) support for the ksz9477 family of switches. ACLs enable filtering of incoming layer 2 MAC, layer 3 IP, and layer 4 TCP/UDP packets on each port. They provide additional capabilities for filtering routed network protocols and can take precedence over other forwarding functions. ACLs can filter ingress traffic based on header fields such as source/destination MAC address, EtherType, IPv4 address, IPv4 protocol, UDP/TCP ports, and TCP flags. The ACL is an ordered list of up to 16 access control rules programmed into the ACL Table. Each entry specifies a set of matching conditions and action rules for controlling packet forwarding and priority. The ACL also implements a count function, generating an interrupt instead of a forwarding action. It can be used as a watchdog timer or an event counter. The ACL consists of three parts: matching rules, action rules, and processing entries. Multiple match conditions can be either AND'ed or OR'ed together. This patch introduces support for a subset of the available ACL functionality, specifically layer 2 matching and prioritization of matched packets. For example: tc qdisc add dev lan2 clsact tc filter add dev lan2 ingress protocol 0x88f7 flower action skbedit prio 7 tc qdisc add dev lan1 clsact tc filter add dev lan1 ingress protocol 0x88f7 flower action skbedit prio 7 The hardware offloading implementation was benchmarked against a configuration without hardware offloading. This latter setup relied on a software-based Linux bridge. No noticeable differences were observed between the two configurations. Here is an example of software-based test: ip l s dev enu1u1 up ip l s dev enu1u2 up ip l s dev enu1u4 up ethtool -A enu1u1 autoneg off rx off tx off ethtool -A enu1u2 autoneg off rx off tx off ethtool -A enu1u4 autoneg off rx off tx off ip l a name br0 type bridge ip l s dev br0 up ip l s enu1u1 master br0 ip l s enu1u2 master br0 ip l s enu1u4 master br0 tc qdisc add dev enu1u1 root handle 1: ets strict 4 priomap 3 3 2 2 1 1 0 0 tc qdisc add dev enu1u4 root handle 1: ets strict 4 priomap 3 3 2 2 1 1 0 0 tc qdisc add dev enu1u2 root handle 1: ets strict 4 priomap 3 3 2 2 1 1 0 0 tc qdisc add dev enu1u1 clsact tc filter add dev enu1u1 ingress protocol ipv4 flower action skbedit prio 7 tc qdisc add dev enu1u4 clsact tc filter add dev enu1u4 ingress protocol ipv4 flower action skbedit prio 0 On a system attached to the port enu1u2 I run two iperf3 server instances: iperf3 -s -p 5210 & iperf3 -s -p 5211 & On systems attached to enu1u4 and enu1u1 I run: iperf3 -u -c 172.17.0.1 -p 5210 -b100M -l1472 -t100 and iperf3 -u -c 172.17.0.1 -p 5211 -b100M -l1472 -t100 As a result, IP traffic on port enu1u1 will be prioritized and take precedence over IP traffic on port enu1u4 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
d67d7247 |
|
14-Sep-2023 |
Oleksij Rempel <o.rempel@pengutronix.de> |
net: dsa: microchip: Add drive strength configuration Add device tree based drive strength configuration support. It is needed to pass EMI validation on our hardware. Configuration values are based on the vendor's reference driver. Tested on KSZ9563R. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4bdf79d6 |
|
13-Jul-2023 |
Tristram Ha <Tristram.Ha@microchip.com> |
net: dsa: microchip: correct KSZ8795 static MAC table access The KSZ8795 driver code was modified to use on KSZ8863/73, which has different register definitions. Some of the new KSZ8795 register information are wrong compared to previous code. KSZ8795 also behaves differently in that the STATIC_MAC_TABLE_USE_FID and STATIC_MAC_TABLE_FID bits are off by 1 when doing MAC table reading than writing. To compensate that a special code was added to shift the register value by 1 before applying those bits. This is wrong when the code is running on KSZ8863, so this special code is only executed when KSZ8795 is detected. Fixes: 4b20a07e103f ("net: dsa: microchip: ksz8795: add support for ksz88xx chips") Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ece28ecb |
|
20-Jun-2023 |
Rasmus Villemoes <linux@rasmusvillemoes.dk> |
net: dsa: microchip: add ksz_prmw32() helper This will be used in a subsequent patch fixing an errata for writes to certain PHY registers. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Reviewed-by: Simon Horman <simon.horman@corigine.com> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Link: https://lore.kernel.org/r/20230620113855.733526-3-linux@rasmusvillemoes.dk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
3b42fbd5 |
|
20-Jun-2023 |
Rasmus Villemoes <linux@rasmusvillemoes.dk> |
net: dsa: microchip: simplify ksz_prmw8() Implement ksz_prmw8() in terms of ksz_rmw8(), just as all the other ksz_pX are implemented in terms of ksz_X. No functional change. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Reviewed-by: Simon Horman <simon.horman@corigine.com> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Link: https://lore.kernel.org/r/20230620113855.733526-2-linux@rasmusvillemoes.dk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
6068e6d7 |
|
05-Jun-2023 |
Robert Hancock <robert.hancock@calian.com> |
net: dsa: microchip: remove KSZ9477 PHY errata handling The KSZ9477 PHY errata handling code has now been moved into the Micrel PHY driver, so it is no longer needed inside the DSA switch driver. Remove it. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
bb4609d2 |
|
26-May-2023 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: remove ksz_port:on variable The only place where this variable would be set to false is the ksz8_config_cpu_port() function. But it is done in a bogus way: for (i = 0; i < dev->phy_port_cnt; i++) { if (i == dev->phy_port_cnt) <--- will be never executed. break; p->on = 1; So, we never have a situation where p->on = 0. In this case, we can just remove it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
b8311f46 |
|
26-May-2023 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: microchip: add an enum for regmap widths It is not immediately obvious that this driver allocates, via the KSZ_REGMAP_TABLE() macro, 3 regmaps for register access: dev->regmap[0] for 8-bit access, dev->regmap[1] for 16-bit and dev->regmap[2] for 32-bit access. In future changes that add support for reg_fields, each field will have to specify through which of the 3 regmaps it's going to go. Add an enum now, to denote one of the 3 register access widths, and make the code go through some wrapper functions for easier review and further modification. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
2f0d5799 |
|
26-May-2023 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: improving error handling for 8-bit register RMW operations This patch refines the error handling mechanism for 8-bit register read-modify-write operations. In case of a failure, it now logs an error message detailing the problematic offset. This enhancement aids in debugging by providing more precise information when these operations encounter issues. Furthermore, the ksz_prmw8() function has been updated to return error values rather than void, enabling calling functions to appropriately respond to errors. Additionally, in case of an error that affects both the current and future accesses, the PHY driver will log the errors consistently, akin to the existing behavior in all ksz_read*/ksz_write* helpers. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
c570f861 |
|
10-Mar-2023 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: add ETS Qdisc support for KSZ9477 series Add ETS Qdisc support for KSZ9477 of switches. Current implementation is limited to strict priority mode. Tested on KSZ8563R with following configuration: tc qdisc replace dev lan2 root handle 1: ets strict 4 \ priomap 3 3 2 2 1 1 0 0 ip link add link lan2 name v1 type vlan id 1 \ egress-qos-map 0:0 1:1 2:2 3:3 4:4 5:5 6:6 7:7 and patched iperf3 version: https://github.com/esnet/iperf/pull/1476 iperf3 -c 172.17.0.1 -b100M -l1472 -t100 -u -R --sock-prio 2 Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
69444581 |
|
10-Mar-2023 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: add ksz_setup_tc_mode() function Add ksz_setup_tc_mode() to make queue scheduling and shaping configuration more visible. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
71d7920f |
|
19-Jan-2023 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add support for credit based shaper KSZ9477, KSZ9567, KSZ9563, KSZ8563 and LAN937x supports Credit based shaper. To differentiate the chip supporting cbs, tc_cbs_supported flag is introduced in ksz_chip_data. And KSZ series has 16bit Credit increment registers whereas LAN937x has 24bit register. The value to be programmed in the credit increment is determined using the successive multiplication method to convert decimal fraction to hexadecimal fraction. For example: if idleslope is 10000 and sendslope is -90000, then bandwidth is 10000 - (-90000) = 100000. The 10% bandwidth of 100Mbps means 10/100 = 0.1(decimal). This value has to be converted to hexa. 1) 0.1 * 16 = 1.6 --> fraction 0.6 Carry = 1 (MSB) 2) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 3) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 4) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 5) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 6) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 (LSB) Now 0.1(decimal) becomes 0.199999(Hex). If it is LAN937x, 24 bit value will be programmed to Credit Inc register, 0x199999. For others 16 bit value will be prgrammed, 0x1999. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
e30f33a5 |
|
19-Jan-2023 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: enable port queues for tc mqprio LAN937x family of switches has 8 queues per port where the KSZ switches has 4 queues per port. By default, only one queue per port is enabled. The queues are configurable in 2, 4 or 8. This patch add 8 number of queues for LAN937x and 4 for other switches. In the tag_ksz.c file, prioirty of the packet is queried using the skb buffer and the corresponding value is updated in the tag. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
1f12ae5b |
|
10-Jan-2023 |
Christian Eggers <ceggers@arri.de> |
net: dsa: microchip: ptp: add periodic output signal LAN937x and KSZ PTP supported switches has Three Trigger output unit. This TOU can used to generate the periodic signal for PTP. TOU has the cycle width register of 32 bit in size and period width register of 24 bit, each value is of 8ns so the pulse width can be maximum 125ms. Tested using ./testptp -d /dev/ptp0 -p 1000000000 -w 100000000 for generating the 10ms pulse width Signed-off-by: Christian Eggers <ceggers@arri.de> Co-developed-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ab32f56a |
|
10-Jan-2023 |
Christian Eggers <ceggers@arri.de> |
net: dsa: microchip: ptp: add packet transmission timestamping This patch adds the routines for transmission of ptp packets. When the ptp pdelay_req packet to be transmitted, it uses the deferred xmit worker to schedule the packets. During irq_setup, interrupt for Sync, Pdelay_req and Pdelay_rsp are enabled. So interrupt is triggered for all three packets. But for p2p1step, we require only time stamp of Pdelay_req packet. Hence to avoid posting of the completion from ISR routine for Sync and Pdelay_resp packets, ts_en flag is introduced. This controls which packets need to processed for timestamp. After the packet is transmitted, ISR is triggered. The time at which packet transmitted is recorded to separate register. This value is reconstructed to absolute time and posted to the user application through socket error queue. Signed-off-by: Christian Eggers <ceggers@arri.de> Co-developed-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
cc13ab18 |
|
10-Jan-2023 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: ptp: enable interrupt for timestamping PTP Interrupt mask and status register differ from the global and port interrupt mechanism by two methods. One is that for global/port interrupt enabling we have to clear the bit but for ptp interrupt we have to set the bit. And other is bit12:0 is reserved in ptp interrupt registers. This forced to not use the generic implementation of global/port interrupt method routine. This patch implement the ptp interrupt mechanism to read the timestamp register for sync, pdelay_req and pdelay_resp. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c2977c61 |
|
10-Jan-2023 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: ptp: add 4 bytes in tail tag when ptp enabled When the PTP is enabled in hardware bit 6 of PTP_MSG_CONF1 register, the transmit frame needs additional 4 bytes before the tail tag. It is needed for all the transmission packets irrespective of PTP packets or not. The 4-byte timestamp field is 0 for frames other than Pdelay_Resp. For the one-step Pdelay_Resp, the switch needs the receive timestamp of the Pdelay_Req message so that it can put the turnaround time in the correction field. Since PTP has to be enabled for both Transmission and reception timestamping, driver needs to track of the tx and rx setting of the all the user ports in the switch. Two flags hw_tx_en and hw_rx_en are added in ksz_port to track the timestampping setting of each port. When any one of ports has tx or rx timestampping enabled, bit 6 of PTP_MSG_CONF1 is set and it is indicated to tag_ksz.c through tagger bytes. This flag adds 4 additional bytes to the tail tag. When tx and rx timestamping of all the ports are disabled, then 4 bytes are not added. Tested using hwstamp -i <interface> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> # mostly api Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c59e12a1 |
|
10-Jan-2023 |
Christian Eggers <ceggers@arri.de> |
net: dsa: microchip: ptp: Initial hardware time stamping support This patch adds the routine for get_ts_info, hwstamp_get, set. This enables the PTP support towards userspace applications such as linuxptp. Signed-off-by: Christian Eggers <ceggers@arri.de> Co-developed-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
eac1ea20 |
|
10-Jan-2023 |
Christian Eggers <ceggers@arri.de> |
net: dsa: microchip: ptp: add the posix clock support This patch implement routines (adjfine, adjtime, gettime and settime) for manipulating the chip's PTP clock. It registers the ptp caps to posix clock register. Signed-off-by: Christian Eggers <ceggers@arri.de> Co-developed-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> # mostly api Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
bde55dd9 |
|
04-Dec-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: add stats64 support for ksz8 series of switches Add stats64 support for ksz8xxx series of switches. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20221205052904.2834962-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
29d1e85f |
|
04-Dec-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: ksz8: add MTU configuration support Make MTU configurable on KSZ87xx and KSZ88xx series of switches. Before this patch, pre-configured behavior was different on different switch series, due to opposite meaning of the same bit: - KSZ87xx: Reg 4, Bit 1 - if 1, max frame size is 1532; if 0 - 1514 - KSZ88xx: Reg 4, Bit 1 - if 1, max frame size is 1514; if 0 - 1532 Since the code was telling "... SW_LEGAL_PACKET_DISABLE, true)", I assume, the idea was to set max frame size to 1532. With this patch, by setting MTU size 1500, both switch series will be configured to the 1532 frame limit. This patch was tested on KSZ8873. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
6f1b986a |
|
04-Dec-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: add ksz_rmw8() function Add ksz_rmw8(), it will be used in the next patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
1d0a1a6d |
|
04-Dec-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: do not store max MTU for all ports If we have global MTU configuration, it is enough to configure it on CPU port only. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
838c19f8 |
|
04-Dec-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: move max mtu to one location There are no HW specific registers, so we can process all of them in one location. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Tested-by: Arun Ramadoss <arun.ramadoss@microchip.com> (KSZ9893 and LAN937x) Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
ef912fe4 |
|
07-Nov-2022 |
Rakesh Sankaranarayanan <rakesh.sankaranarayanan@microchip.com> |
net: dsa: microchip: add ksz9563 in ksz_switch_ops and select based on compatible string Add KSZ9563 inside ksz_switch_chips structure with port_nirq as 3. KSZ9563 use KSZ9893 switch parameters but port_nirq count is 3 for KSZ9563 whereas 2 for KSZ9893. Add KSZ9563 inside ksz_switch_chips as a separate member and from device tree map compatible string into KSZ9563 inside ksz_spi.c and ksz9477_i2c.c. Global Chip ID 1 and 2 registers read value 9893, select sku based on Global Chip ID 4 Register which read 0x1c for KSZ9563. Signed-off-by: Rakesh Sankaranarayanan <rakesh.sankaranarayanan@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e1add7dd |
|
21-Sep-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: use common irq routines for girq and pirq The global port interrupt routines and individual ports interrupt routines has similar implementation except the mask & status register and number of nested irqs in them. The mask & status register and pointer to ksz_device is added to ksz_irq and uses the ksz_irq as irq_chip_data. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
ff319a64 |
|
21-Sep-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move interrupt handling logic from lan937x to ksz_common To support the phy link detection through interrupt method for ksz9477 based switch, the interrupt handling routines are moved from lan937x_main.c to ksz_common.c. The only changes made are functions names are prefixed with ksz_ instead of lan937x_. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
978f1f72 |
|
21-Sep-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: determine number of port irq based on switch type Currently the number of port irqs is hard coded for the lan937x switch as 6. In order to make the generic interrupt handler for ksz switches, number of port irq supported by the switch is added to the ksz_chip_data. It is 4 for ksz9477, 2 for ksz9897 and 3 for ksz9567. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
2c119d99 |
|
06-Sep-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add the support for set_ageing_time KSZ9477 has the 11 bit ageing count value which is split across the two registers. And LAN937x has the 20 bit ageing count which is also split into two registers. Each count in the registers represents 1 second. This patch add the support for ageing time for KSZ9477 and LAN937x series of switch. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2eb3ff3c |
|
01-Sep-2022 |
Romain Naour <romain.naour@skf.com> |
net: dsa: microchip: add KSZ9896 switch support Add support for the KSZ9896 6-port Gigabit Ethernet Switch to the ksz9477 driver. Although the KSZ9896 is already listed in the device tree binding documentation since a1c0ed24fe9b (dt-bindings: net: dsa: document additional Microchip KSZ9477 family switches) the chip id (0x00989600) is not recognized by ksz_switch_detect() and rejected by the driver. The KSZ9896 is similar to KSZ9897 but has only one configurable MII/RMII/RGMII/GMII cpu port. Signed-off-by: Romain Naour <romain.naour@skf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c9cd961c |
|
02-Sep-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: lan937x: add interrupt support for port phy link This patch enables the interrupts for internal phy link detection for LAN937x. The interrupt enable bits are active low. There is global interrupt mask for each port. And each port has the individual interrupt mask for TAS. QCI, SGMII, PTP, PHY and ACL. The first level of interrupt domain is registered for global port interrupt and second level of interrupt domain for the individual port interrupts. The phy interrupt is enabled in the lan937x_mdio_register function. Interrupt from which port is raised will be detected based on the interrupt host data. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f3c16545 |
|
02-Sep-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add reference to ksz_device inside the ksz_port struct ksz_port doesn't have reference to ksz_device as of now. In order to find out from which port interrupt has triggered, we need to pass the struct ksz_port as a host data. When the interrupt is triggered, we can get the port from which interrupt triggered, but to identify it is phy interrupt we have to read status register. The regmap structure for accessing the device register is present in the ksz_device struct. To access the ksz_device from the ksz_port, the reference is added to it with port number as well. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
32cbac21 |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: remove IS_9893 flag Use chip_id as other places of this code do it Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e7f69521 |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: remove unused sgmii variable This variable is not used. So, remove it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
6aaa8e7d |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: remove unused port phy variable This variable is unused. So, drop it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ec6ba50c |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: add support for regmap_access_tables This is complex driver with support for different chips with different layouts. To detect at least some bugs earlier, we should validate register accesses by using regmap_access_table support. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
d38bc3b4 |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: forward error value on all ksz_pread/ksz_pwrite functions ksz_read*/ksz_write* are able to return errors, so forward it. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
8f420456 |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: allow to pass return values for PHY read/write accesses PHY access may end with errors on different levels. So, allow to forward return values where possible. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
505bf320 |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: do per-port Gbit detection instead of per-chip KSZ8563 has two 100Mbit PHYs and CPU port with RGMII support. Since 1000Mbit configuration for the RGMII capable MAC is present, we should use per port validation. As main part of migration to per-port validation we need to rework ksz9477_switch_init() function. Which is using undocumented REG_GLOBAL_OPTIONS register to detect per-chip Gbit support. So, it is related to some sort of risk for regressions. To reduce this risk I compared the code with publicly available documentations. This function will executed on following currently supported chips: struct ksz_chip_data OF compatible KSZ9477 KSZ9477 KSZ9897 KSZ9897 KSZ9893 KSZ9893, KSZ9563 KSZ8563 KSZ8563 KSZ9567 KSZ9567 Only KSZ9893, KSZ9563, KSZ8563 document existence of 0xf == REG_GLOBAL_OPTIONS register with bit field description "SKU ID": KSZ9893 0x0C KSZ9563 0x1C KSZ8563 0x3C The existence of hidden flags is not documented. KSZ9477, KSZ9897, KSZ9567 do not document this register at all. Only KSZ8563 is documented as non Gbit chip: 100Mbit PHYs and RGMII CPU port. So, this change should not introduce a regression for configurations with properly used OF compatibles. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b4490809 |
|
25-Aug-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: add separate struct ksz_chip_data for KSZ8563 chip Add separate entry for the KSZ8563 chip. According to the documentation it can support Gbit only on RGMII port. So, we will need to be able to describe in the followup patch. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
15f7cfae |
|
18-Aug-2022 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: microchip: make learning configurable and keep it off while standalone Address learning should initially be turned off by the driver for port operation in standalone mode, then the DSA core handles changes to it via ds->ops->port_bridge_flags(). Leaving address learning enabled while ports are standalone breaks any kind of communication which involves port B receiving what port A has sent. Notably it breaks the ksz9477 driver used with a (non offloaded, ports act as if standalone) bonding interface in active-backup mode, when the ports are connected together through external switches, for redundancy purposes. This fixes a major design flaw in the ksz9477 and ksz8795 drivers, which unconditionally leave address learning enabled even while ports operate as standalone. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Link: https://lore.kernel.org/netdev/CAFZh4h-JVWt80CrQWkFji7tZJahMfOToUJQgKS5s0_=9zzpvYQ@mail.gmail.com/ Reported-by: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20220818164809.3198039-1-vladimir.oltean@nxp.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
f3d890f5 |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add support for phylink mac config This patch add support for phylink mac config for ksz series of switches. All the files ksz8795, ksz9477 and lan937x uses the ksz common xmii function. Instead of calling from the individual files, it is moved to the ksz common phylink mac config function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0ab7f6bf |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: ksz9477: use common xmii function In ksz9477.c file, configuring the xmii register is performed based on the flag NEW_XMII. The flag is reset for ksz9893 switch and set for other switch. This patch uses the ksz common xmii set and get function. The bit values are configured based on the chip id. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b19ac41f |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: apply rgmii tx and rx delay in phylink mac config This patch read the rgmii tx and rx delay from device tree and stored it in the ksz_port. It applies the rgmii delay to the xmii tune adjust register based on the interface selected in phylink mac config. There are two rgmii port in LAN937x and value to be loaded in the register vary depends on the port selected. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
dc1c596e |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: lan937x: add support for configuing xMII register This patch add the common ksz_set_xmii function for ksz series switch and update the lan937x code phylink mac config. The register address for the ksz8795 is Port 5 Interface control 6 and for all other switch is xMII Control 1. The bit value for selecting the interface is same for KSZ8795 and KSZ9893 are same. The bit values for KSZ9477 and lan973x are same. So, this patch add the bit value for each switches in ksz_chip_data and configure the registers based on the chip id. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
da8cd085 |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add support for common phylink mac link up This patch add the support for common phylink mac link up for the ksz series switch. The register address, bit position and values are configured based on the chip id to the dev->info structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
8560664f |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add common duplex and flow control function This patch add common function for configuring the Full/Half duplex and transmit/receive flow control. KSZ8795 uses the Global control register 4 for configuring the duplex and flow control, whereas all other KSZ9477 based switch uses the xMII Control 0 register. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
aa5b8b73 |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add common ksz port xmii speed selection function This patch adds the function for configuring the 100/10Mbps speed selection for the ksz switches. KSZ8795 switch uses Global control 4 register 0x06 bit 4 for choosing 100/10Mpbs. Other switches uses xMII control 1 0xN300 for it. For KSZ8795, if the bit is set then 10Mbps is chosen and if bit is clear then 100Mbps chosen. For all other switches it is other way around, if the bit is set then 100Mbps is chosen. So, this patch add the generic function for ksz switch to select the 100/10Mbps speed selection. While configuring, first it disables the gigabit functionality and then configure the respective speed. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
46f80fa8 |
|
24-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add common gigabit set and get function This patch add helper function for setting and getting the gigabit enable for the ksz series switch. KSZ8795 switch has different register address compared to all other ksz switches. KSZ8795 series uses the Port 5 Interface control 6 Bit 6 for configuring the 1Gbps or 100/10Mbps speed selection. All other switches uses the xMII control 1 0xN301 register Bit6 for gigabit. Further, for KSZ8795 & KSZ9893 switches if bit 1 then 1Gbps is chosen and if bit 0 then 100/10Mbps is chosen. It is other way around for other switches bit 0 is for 1Gbps. So, this patch implements the common function for configuring the gigabit set and get capability. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a0cb1aa4 |
|
01-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: lan937x: add phylink_mac_config support This patch add support for phylink_mac_config dsa hook. It configures the mac for MII/RMII modes. The RGMII mode will be added in the future patches. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f597d3ad |
|
01-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: lan937x: add phylink_mac_link_up support This patch add support for phylink_mac_link_up. It configures the mac for the speed, flow control and duplex mode. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
99b16df0 |
|
01-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: lan937x: add dsa_tag_protocol This patch update the ksz_get_tag_protocol to return LAN937x specific tag if the chip id matches one of LAN937x series switch Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
457c182a |
|
01-Jul-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: generic access to ksz9477 static and reserved table The ksz9477 and lan937x has few difference in the static and reserved table register 0x041C. For the ksz9477 if the bit 0 is 1 - read operation and 0 - write operation. But for lan937x bit 1:0 used for selecting the read/write operation, 01 - write and 10 - read. To use ksz9477 mdb add/del and enable_stp_addr for the lan937x, masks & shifts are introduced for ksz9477 & lan937x in ksz_common.c. Then updated the function with masks & shifts based on the switch instead of hard coding it. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c4748ff6 |
|
28-Jun-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: add pause stats support Add support for pause specific stats. Tested on ksz9477. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
9d95329c |
|
28-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move remaining register offset to ksz_chip_reg This patch moves the broadcast ctrl, multicast ctrl and start control registers from ksz_chip_dat to ksz_chip_reg. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
6877102f |
|
28-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add P_STP_CTRL to ksz_chip_reg This patch moves the stp_ctrl_reg from the ksz_chip_data to ksz_chip_reg structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a02579df |
|
28-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: change the size of reg from u8 to u16 The register size for the ksz8 switches is u8 and for ksz9477 series is u16. To have common struct for ksz series switches the size of reg is increased from u8 to u16. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
34e48383 |
|
28-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move ksz8->shifts to ksz_common This patch moves ksz8->shifts from ksz8795.c to ksz_common.c. The shifts are dereferenced using dev->info->shifts. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
d23a5e18 |
|
28-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move ksz8->masks to ksz_common This patch moves the ksz8->masks from ksz8795.c to ksz_common.c. The mask will be dereferenced using dev->info->masks. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
486f9ca7 |
|
28-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move ksz8->regs to ksz_common This patch moves the ksz8->regs from ksz8795.c to the ksz_common.c. And the regs is dereferrenced using dev->info->regs. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ff3f3a30 |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: remove the ksz8/ksz9477_switch_register This patch delete the ksz8_switch_register and ksz9477_switch_register since both are calling the ksz_switch_register function. Instead the ksz_switch_register is called from the probe function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
6ec23aaa |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move ksz_dev_ops to ksz_common.c This patch move the ksz_dev_ops from individual files to ksz_common.c. And the dev_ops is assigned to ksz_device based on the switch detect. This reduces the redundant function and allows to reuse the functionality for LAN937x which has similar register set. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
1958eee8 |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: common dsa_switch_ops for ksz switches At present, ksz8795.c and ksz9477.c have separate dsa_switch_ops structure initialization. This patch modifies the files such a way that ksz switches has common dsa_switch_ops in the ksz_common.c file. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ad08ac18 |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move start of switch to ksz_setup This patch move the setting the start bit from the individual switch configuration to ksz_setup Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0abab9f3 |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move multicast enable to ksz_setup This patch moves the enabling the multicast storm protection from individual setup function to ksz_setup function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
1ca6437f |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move broadcast rate limit to ksz_setup This patch move the 10% broadcast protection from the individual setup to ksz_setup. In the ksz9477, broadcast protection is updated in reset function. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
d2822e68 |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move setup function to ksz_common This patch move the common initialization of switches to ksz_setup and perform the switch specific initialization using the ksz_dev_ops function pointer. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
331d64f7 |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add the enable_stp_addr pointer in ksz_dev_ops In order to transmit the STP BPDU packet to the CPU port, the STP address 01-80-c2-00-00-00 has to be added to static alu table for ksz8795 series switch. For the ksz9477 switch, there is reserved multicast table which handles forwarding the particular set of multicast address to cpu port. So enabling the multicast reserved table and updated the cpu port index. The stp addr is enabled during the setup phase using the enable_stp_addr pointer in struct ksz_dev_ops. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
fb9324be |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add config_cpu_port to struct ksz_dev_ops To have the common set of initialization in ksz_setup, introduced the new config_cpu_port member to ksz_dev_ops. Since both the ksz8795.c and ksz9477.c configuring the cpu port in the setup function, introduced the member. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
673b196f |
|
22-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: rename shutdown to reset in ksz_dev_ops This patch renames the shutdown to reset in ksz_dev_ops in order to use the reset dev_ops in the ksz_setup. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
1fe94f54 |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move get_phy_flags & mtu to ksz_common This patch assigns the get_phy_flags & mtu hook of ksz8795 and ksz9477 in dsa_switch_ops to ksz_common. For get_phy_flags hooks,checks whether the chip is ksz8863/kss8793 then it returns error for port1. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
e587be75 |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: update fdb add/del/dump in ksz_common This patch makes the dsa_switch_hook for fdbs to use ksz_common.c file. And from ksz_common, individual switches fdb functions are called using the dev->dev_ops. And removed the r_dyn_mac_table, r_sta_mac_table and w_sta_mac_table from ksz_dev_ops as it is used only in ksz8795.c Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
980c7d17 |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: update the ksz_port_mdb_add/del ksz_mdb_add/del in ksz_common.c is specific for the ksz8795.c file. The ksz9477 has its separate ksz9477_port_mdb_add/del functions. This patch moves the ksz8795 specific mdb functionality from ksz_common to ksz8795. And this dsa_switch_ops hooks for ksz8795/ksz9477 are invoked through the ksz_port_mdb_add/del. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
7012033c |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: update the ksz_phylink_get_caps This patch assigns the phylink_get_caps in ksz8795 and ksz9477 to ksz_phylink_get_caps. And update their mac_capabilities in the respective ksz_dev_ops. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
e593df51 |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: get P_STP_CTRL in ksz_port_stp_state by ksz_dev_ops At present, P_STP_CTRL register value is passed as parameter to ksz_port_stp_state from the individual dsa_switch_ops hooks. This patch update the function to retrieve the register value through the ksz_chip_data member. And add the static to ksz_update_port_member since it is not called outside the ksz_common. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
00a298bb |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move the port mirror to ksz_common This patch updates the common port mirror add/del dsa_switch_ops in ksz_common.c. The individual switches implementation is executed based on the ksz_dev_ops function pointers. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
f0d997e3 |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move vlan functionality to ksz_common This patch moves the vlan dsa_switch_ops such as vlan_add, vlan_del and vlan_filtering from the individual files ksz8795.c, ksz9477.c to ksz_common.c file. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
534a0431 |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move tag_protocol to ksz_common This patch move the dsa hook get_tag_protocol to ksz_common file. And the tag_protocol is returned based on the dev->chip_id. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
91a98917 |
|
17-Jun-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move switch chip_id detection to ksz_common KSZ87xx and KSZ88xx have chip_id representation at reg location 0. And KSZ9477 compatible switch and LAN937x switch have same chip_id detection at location 0x01 and 0x02. To have the common switch detect functionality for ksz switches, ksz_switch_detect function is introduced. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
008db08b |
|
17-May-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: remove unused members in ksz_device The name, regs_size and overrides members in struct ksz_device are unused. Hence remove it. And host_mask is used in only place of ksz8795.c file, which can be replaced by dev->info->cpu_ports Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
65ac79e1 |
|
17-May-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: add the phylink get_caps This patch add the support for phylink_get_caps for ksz8795 and ksz9477 series switch. It updates the struct ksz_switch_chip with the details of the internal phys and xmii interface. Then during the get_caps based on the bits set in the structure, corresponding phy mode is set. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
997d2126 |
|
17-May-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move get_strings to ksz_common ksz8795 and ksz9477 uses the same algorithm for copying the ethtool strings. Hence moved to ksz_common to remove the redundant code. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a530e6f2 |
|
17-May-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move struct mib_names to ksz_chip_data The ksz88xx family has one set of mib_names. The ksz87xx, ksz9477, LAN937x based switches has one set of mib_names. In order to remove redundant declaration, moved the struct mib_names to ksz_chip_data structure. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
eee16b14 |
|
17-May-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: perform the compatibility check for dev probed This patch perform the compatibility check for the device after the chip detect is done. It is to prevent the mismatch between the device compatible specified in the device tree and actual device found during the detect. The ksz9477 device doesn't use any .data in the of_device_id. But the ksz8795_spi uses .data for assigning the regmap between 8830 family and 87xx family switch. Changed the regmap assignment based on the chip_id from the .data. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
462d5250 |
|
17-May-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: microchip: move ksz_chip_data to ksz_common This patch moves the ksz_chip_data in ksz8795 and ksz9477 to ksz_common. At present, the dev->chip_id is iterated with the ksz_chip_data and then copy its value to the ksz_dev structure. These values are declared as constant. Instead of copying the values and referencing it, this patch update the dev->info to the ksz_chip_data based on the chip_id in the init function. And also update the ksz_chip_data values for the LAN937x based switches. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c6101dd7 |
|
26-Apr-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: ksz9477: move get_stats64 to ksz_common.c The mib counters for the ksz9477 is same for the ksz9477 switch and LAN937x switch. Hence moving it to ksz_common.c file in order to have it generic function. The DSA hook get_stats64 now can call ksz_get_stats64. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220426091048.9311-1-arun.ramadoss@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
de6dd626 |
|
24-Apr-2022 |
Arun Ramadoss <arun.ramadoss@microchip.com> |
net: dsa: ksz: added the generic port_stp_state_set function The ksz8795 and ksz9477 uses the same algorithm for the port_stp_state_set function except the register address is different. So moved the algorithm to the ksz_common.c and used the dev_ops for register read and write. This function can also used for the lan937x part. Hence making it generic for all the parts. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220424112831.11504-1-arun.ramadoss@microchip.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
|
#
7b6e6235 |
|
16-Mar-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: ksz8795: handle eee specif erratum According to erratum described in DS80000687C[1]: "Module 2: Link drops with some EEE link partners.", we need to "Disable the EEE next page exchange in EEE Global Register 2" 1 - https://ww1.microchip.com/downloads/en/DeviceDoc/KSZ87xx-Errata-DS80000687C.pdf Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220316125529.1489045-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
e18058ea |
|
08-Mar-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: ksz9477: implement MTU configuration This chips supports two ways to configure max MTU size: - by setting SW_LEGAL_PACKET_DISABLE bit: if this bit is 0 allowed packed size will be between 64 and bytes 1518. If this bit is 1, it will accept packets up to 2000 bytes. - by setting SW_JUMBO_PACKET bit. If this bit is set, the chip will ignore SW_LEGAL_PACKET_DISABLE value and use REG_SW_MTU__2 register to configure MTU size. Current driver has disabled SW_JUMBO_PACKET bit and activates SW_LEGAL_PACKET_DISABLE. So the switch will pass all packets up to 2000 without any way to configure it. By providing port_change_mtu we are switch to SW_JUMBO_PACKET way and will be able to configure MTU up to ~9000. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20220308135857.1119028-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
06b9cce4 |
|
25-Feb-2022 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: pass extack to .port_bridge_join driver methods As FDB isolation cannot be enforced between VLAN-aware bridges in lack of hardware assistance like extra FID bits, it seems plausible that many DSA switches cannot do it. Therefore, they need to reject configurations with multiple VLAN-aware bridges from the two code paths that can transition towards that state: - joining a VLAN-aware bridge - toggling VLAN awareness on an existing bridge The .port_vlan_filtering method already propagates the netlink extack to the driver, let's propagate it from .port_bridge_join too, to make sure that the driver can use the same function for both. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c2693363 |
|
25-Feb-2022 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: request drivers to perform FDB isolation For DSA, to encourage drivers to perform FDB isolation simply means to track which bridge does each FDB and MDB entry belong to. It then becomes the driver responsibility to use something that makes the FDB entry from one bridge not match the FDB lookup of ports from other bridges. The top-level functions where the bridge is determined are: - dsa_port_fdb_{add,del} - dsa_port_host_fdb_{add,del} - dsa_port_mdb_{add,del} - dsa_port_host_mdb_{add,del} aka the pre-crosschip-notifier functions. Changing the API to pass a reference to a bridge is not superfluous, and looking at the passed bridge argument is not the same as having the driver look at dsa_to_port(ds, port)->bridge from the ->port_fdb_add() method. DSA installs FDB and MDB entries on shared (CPU and DSA) ports as well, and those do not have any dp->bridge information to retrieve, because they are not in any bridge - they are merely the pipes that serve the user ports that are in one or multiple bridges. The struct dsa_bridge associated with each FDB/MDB entry is encapsulated in a larger "struct dsa_db" database. Although only databases associated to bridges are notified for now, this API will be the starting point for implementing IFF_UNICAST_FLT in DSA. There, the idea is to install FDB entries on the CPU port which belong to the corresponding user port's port database. These are supposed to match only when the port is standalone. It is better to introduce the API in its expected final form than to introduce it for bridges first, then to have to change drivers which may have made one or more assumptions. Drivers can use the provided bridge.num, but they can also use a different numbering scheme that is more convenient. DSA must perform refcounting on the CPU and DSA ports by also taking into account the bridge number. So if two bridges request the same local address, DSA must notify the driver twice, once for each bridge. In fact, if the driver supports FDB isolation, DSA must perform refcounting per bridge, but if the driver doesn't, DSA must refcount host addresses across all bridges, otherwise it would be telling the driver to delete an FDB entry for a bridge and the driver would delete it for all bridges. So introduce a bool fdb_isolation in drivers which would make all bridge databases passed to the cross-chip notifier have the same number (0). This makes dsa_mac_addr_find() -> dsa_db_equal() say that all bridge databases are the same database - which is essentially the legacy behavior. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a7f4f13a |
|
19-Feb-2022 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: ksz9477: export HW stats over stats64 interface Provide access to HW offloaded packets over stats64 interface. The rx/tx_bytes values needed some fixing since HW is accounting size of the Ethernet frame together with FCS. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
48bf8b8a |
|
27-Jan-2022 |
Robert Hancock <robert.hancock@calian.com> |
net: dsa: microchip: Add property to disable reference clock Add a new microchip,synclko-disable property which can be specified to disable the reference clock output from the device if not required by the board design. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b079922b |
|
06-Dec-2021 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: add a "tx_fwd_offload" argument to ->port_bridge_join This is a preparation patch for the removal of the DSA switch methods ->port_bridge_tx_fwd_offload() and ->port_bridge_tx_fwd_unoffload(). The plan is for the switch to report whether it offloads TX forwarding directly as a response to the ->port_bridge_join() method. This change deals with the noisy portion of converting all existing function prototypes to take this new boolean pointer argument. The bool is placed in the cross-chip notifier structure for bridge join, and a reference to it is provided to drivers. In the next change, DSA will then actually look at this value instead of calling ->port_bridge_tx_fwd_offload(). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
d3eed0e5 |
|
06-Dec-2021 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: keep the bridge_dev and bridge_num as part of the same structure The main desire behind this is to provide coherent bridge information to the fast path without locking. For example, right now we set dp->bridge_dev and dp->bridge_num from separate code paths, it is theoretically possible for a packet transmission to read these two port properties consecutively and find a bridge number which does not correspond with the bridge device. Another desire is to start passing more complex bridge information to dsa_switch_ops functions. For example, with FDB isolation, it is expected that drivers will need to be passed the bridge which requested an FDB/MDB entry to be offloaded, and along with that bridge_dev, the associated bridge_num should be passed too, in case the driver might want to implement an isolation scheme based on that number. We already pass the {bridge_dev, bridge_num} pair to the TX forwarding offload switch API, however we'd like to remove that and squash it into the basic bridge join/leave API. So that means we need to pass this pair to the bridge join/leave API. During dsa_port_bridge_leave, first we unset dp->bridge_dev, then we call the driver's .port_bridge_leave with what used to be our dp->bridge_dev, but provided as an argument. When bridge_dev and bridge_num get folded into a single structure, we need to preserve this behavior in dsa_port_bridge_leave: we need a copy of what used to be in dp->bridge. Switch drivers check bridge membership by comparing dp->bridge_dev with the provided bridge_dev, but now, if we provide the struct dsa_bridge as a pointer, they cannot keep comparing dp->bridge to the provided pointer, since this only points to an on-stack copy. To make this obvious and prevent driver writers from forgetting and doing stupid things, in this new API, the struct dsa_bridge is provided as a full structure (not very large, contains an int and a pointer) instead of a pointer. An explicit comparison function needs to be used to determine bridge membership: dsa_port_offloads_bridge(). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
b3612ccd |
|
26-Nov-2021 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: implement multi-bridge support Current driver version is able to handle only one bridge at time. Configuring two bridges on two different ports would end up shorting this bridges by HW. To reproduce it: ip l a name br0 type bridge ip l a name br1 type bridge ip l s dev br0 up ip l s dev br1 up ip l s lan1 master br0 ip l s dev lan1 up ip l s lan2 master br1 ip l s dev lan2 up Ping on lan1 and get response on lan2, which should not happen. This happened, because current driver version is storing one global "Port VLAN Membership" and applying it to all ports which are members of any bridge. To solve this issue, we need to handle each port separately. This patch is dropping the global port member storage and calculating membership dynamically depending on STP state and bridge participation. Note: STP support was broken before this patch and should be fixed separately. Fixes: c2e866911e25 ("net: dsa: microchip: break KSZ9477 DSA driver into two files") Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20211126123926.2981028-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
8f4f58f8 |
|
09-Aug-2021 |
Ben Hutchings <ben.hutchings@mind.be> |
net: dsa: microchip: ksz8795: Reject unsupported VLAN configuration The switches supported by ksz8795 only have a per-port flag for Tag Removal. This means it is not possible to support both tagged and untagged VLANs on the same port. Reject attempts to add a VLAN that requires the flag to be changed, unless there are no VLANs currently configured. VID 0 is excluded from this check since it is untagged regardless of the state of the flag. On the CPU port we could support tagged and untagged VLANs at the same time. This will be enabled by a later patch. Fixes: e66f840c08a2 ("net: dsa: ksz: Add Microchip KSZ8795 DSA driver") Signed-off-by: Ben Hutchings <ben.hutchings@mind.be> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c34f674c |
|
09-Aug-2021 |
Ben Hutchings <ben.hutchings@mind.be> |
net: dsa: microchip: Fix ksz_read64() ksz_read64() currently does some dubious byte-swapping on the two halves of a 64-bit register, and then only returns the high bits. Replace this with a straightforward expression. Fixes: e66f840c08a2 ("net: dsa: ksz: Add Microchip KSZ8795 DSA driver") Signed-off-by: Ben Hutchings <ben.hutchings@mind.be> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
12c2bb96 |
|
28-Apr-2021 |
Colin Ian King <colin.king@canonical.com> |
net: dsa: ksz: Make reg_mib_cnt a u8 as it never exceeds 255 Currently the for-loop in ksz8_port_init_cnt is causing a static analysis infinite loop warning with the comparison of mib->cnt_ptr < dev->reg_mib_cnt. This occurs because mib->cnt_ptr is a u8 and dev->reg_mib_cnt is an int and the analyzer determines that mib->cnt_ptr potentially can wrap around to zero if the value in dev->reg_mib_cnt is > 255. However, this value is never this large, it is always less than 256 so make reg_mib_cnt a u8. Addresses-Coverity: ("Infinite loop") Fixes: e66f840c08a2 ("net: dsa: ksz: Add Microchip KSZ8795 DSA driver") Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210428120010.337959-1-colin.king@canonical.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
4b20a07e |
|
27-Apr-2021 |
Oleksij Rempel <linux@rempel-privat.de> |
net: dsa: microchip: ksz8795: add support for ksz88xx chips We add support for the ksz8863 and ksz8873 chips which are using the same register patterns but other offsets as the ksz8795. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4b5baca0 |
|
27-Apr-2021 |
Michael Grzeschik <m.grzeschik@pengutronix.de> |
net: dsa: microchip: ksz8795: change drivers prefix to be generic The driver can be used on other chips of this type. To reflect this we rename the drivers prefix from ksz8795 to ksz8. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
1958d581 |
|
08-Jan-2021 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: remove the transactional logic from VLAN objects It should be the driver's business to logically separate its VLAN offloading into a preparation and a commit phase, and some drivers don't need / can't do this. So remove the transactional shim from DSA and let drivers propagate errors directly from the .port_vlan_add callback. It would appear that the code has worse error handling now than it had before. DSA is the only in-kernel user of switchdev that offloads one switchdev object to more than one port: for every VLAN object offloaded to a user port, that VLAN is also offloaded to the CPU port. So the "prepare for user port -> check for errors -> prepare for CPU port -> check for errors -> commit for user port -> commit for CPU port" sequence appears to make more sense than the one we are using now: "offload to user port -> check for errors -> offload to CPU port -> check for errors", but it is really a compromise. In the new way, we can catch errors from the commit phase that we previously had to ignore. But we have our hands tied and cannot do any rollback now: if we add a VLAN on the CPU port and it fails, we can't do the rollback by simply deleting it from the user port, because the switchdev API is not so nice with us: it could have simply been there already, even with the same flags. So we don't even attempt to rollback anything on addition error, just leave whatever VLANs managed to get offloaded right where they are. This should not be a problem at all in practice. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jiri Pirko <jiri@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
a52b2da7 |
|
08-Jan-2021 |
Vladimir Oltean <vladimir.oltean@nxp.com> |
net: dsa: remove the transactional logic from MDB entries For many drivers, the .port_mdb_prepare callback was not a good opportunity to avoid any error condition, and they would suppress errors found during the actual commit phase. Where a logical separation between the prepare and the commit phase existed, the function that used to implement the .port_mdb_prepare callback still exists, but now it is called directly from .port_mdb_add, which was modified to return an int code. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jiri Pirko <jiri@nvidia.com> Reviewed-by: Kurt Kanzenbach <kurt@linutronix.de> # hellcreek Reviewed-by: Linus Wallei <linus.walleij@linaro.org> # RTL8366 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
c9f4633b |
|
01-Dec-2020 |
Michael Grzeschik <m.grzeschik@pengutronix.de> |
net: dsa: microchip: remove usage of mib_port_count The variable mib_port_cnt has the same meaning as port_cnt. This driver removes the extra variable and is using port_cnt everywhere instead. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
453aa4cd |
|
01-Dec-2020 |
Michael Grzeschik <m.grzeschik@pengutronix.de> |
net: dsa: microchip: ksz8795: remove unused last_port variable The variable last_port is not used anywhere, this patch removes it. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
#
edecfa98 |
|
08-Sep-2020 |
Helmut Grohne <helmut.grohne@intenta.de> |
net: dsa: microchip: look for phy-mode in port nodes Documentation/devicetree/bindings/net/dsa/dsa.txt says that the phy-mode property should be specified on port nodes. However, the microchip drivers read it from the switch node. Let the driver use the per-port property and fall back to the old location with a warning. Fix in-tree users. Signed-off-by: Helmut Grohne <helmut.grohne@intenta.de> Link: https://lore.kernel.org/netdev/20200617082235.GA1523@laureti-dev/ Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
3506b2f4 |
|
21-Jul-2020 |
Helmut Grohne <helmut.grohne@intenta.de> |
net: dsa: microchip: call phy_remove_link_mode during probe When doing "ip link set dev ... up" for a ksz9477 backed link, ksz9477_phy_setup is called and it calls phy_remove_link_mode to remove 1000baseT HDX. During phy_remove_link_mode, phy_advertise_supported is called. Doing so reverts any previous change to advertised link modes e.g. using a udevd .link file. phy_remove_link_mode is not meant to be used while opening a link and should be called during phy probe when the link is not yet available to userspace. Therefore move the phy_remove_link_mode calls into ksz9477_switch_register. It indirectly calls dsa_register_switch, which creates the relevant struct phy_devices and we update the link modes right after that. At that time dev->features is already initialized by ksz9477_switch_detect. Remove phy_setup from ksz_dev_ops as no users remain. Link: https://lore.kernel.org/netdev/20200715192722.GD1256692@lunn.ch/ Fixes: 42fc6a4c613019 ("net: dsa: microchip: prepare PHY for proper advertisement") Signed-off-by: Helmut Grohne <helmut.grohne@intenta.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b20a6b29 |
|
02-Jul-2020 |
Codrin Ciubotariu <codrin.ciubotariu@microchip.com> |
net: dsa: microchip: remove unused private members Private structure members live_ports, on_ports, rx_ports, tx_ports are initialized but not used anywhere. Let's remove them. Suggested-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
143a102e |
|
02-Jul-2020 |
Codrin Ciubotariu <codrin.ciubotariu@microchip.com> |
net: dsa: microchip: split adjust_link() in phylink_mac_link_{up|down}() The DSA subsystem moved to phylink and adjust_link() became deprecated in the process. This patch removes adjust_link from the KSZ DSA switches and adds phylink_mac_link_up() and phylink_mac_link_down(). Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
469b390e |
|
09-Mar-2020 |
George McCollister <george.mccollister@gmail.com> |
net: dsa: microchip: use delayed_work instead of timer + work Simplify ksz_common.c by using delayed_work instead of a combination of timer and work. Signed-off-by: George McCollister <george.mccollister@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
013572a2 |
|
16-Oct-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Add shared regmap mutex The KSZ driver uses one regmap per register width (8/16/32), each with it's own lock, but accessing the same set of registers. In theory, it is possible to create a race condition between these regmaps, although the underlying bus (SPI or I2C) locking should assure nothing bad will really happen and the accesses would be correct. To make the driver do the right thing, add one single shared mutex for all the regmaps used by the driver instead. This assures that even if some future hardware is on a bus which does not serialize the accesses the same way SPI or I2C does, nothing bad will happen. Note that the status_mutex was unused and only initied, hence it was renamed and repurposed as the regmap mutex. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Woojung Huh <woojung.huh@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b31141d3 |
|
12-Oct-2019 |
Nishad Kamdar <nishadkamdar@gmail.com> |
net: dsa: microchip: Use the correct style for SPDX License Identifier This patch corrects the SPDX License Identifier style in header files related to Distributed Switch Architecture drivers for Microchip KSZ series switch support. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used) Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a3aa6e65 |
|
25-Sep-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Always set regmap stride to 1 The regmap stride is set to 1 for regmap describing 8bit registers already. However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This is not correct, as the switch protocol supports unaligned register reads and writes and the KSZ87xx even uses such unaligned register accesses to read e.g. MIB counter. This patch fixes MIB counter access on KSZ87xx. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Cc: Woojung Huh <woojung.huh@microchip.com> Fixes: 46558d601cb6 ("net: dsa: microchip: Initial SPI regmap support") Fixes: 255b59ad0db2 ("net: dsa: microchip: Factor out regmap config generation into common header") Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
20e03777 |
|
10-Sep-2019 |
Tristram Ha <Tristram.Ha@microchip.com> |
net: dsa: microchip: add KSZ9477 I2C driver Add KSZ9477 I2C driver support. The code ksz9477.c and ksz_common.c are used together to generate the I2C driver. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> [george.mccollister@gmail.com: bring up to date, use ksz_common regmap macros] Signed-off-by: George McCollister <george.mccollister@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5f81d545 |
|
29-Aug-2019 |
George McCollister <george.mccollister@gmail.com> |
net: dsa: microchip: fill regmap_config name Use the register value width as the regmap_config name to prevent the following error when the second and third regmap_configs are initialized. "debugfs: Directory '${bus-id}' with parent 'regmap' already present!" Signed-off-by: George McCollister <george.mccollister@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
6a7abc61 |
|
06-Aug-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: ksz: Merge ksz_priv.h into ksz_common.h Merge the two headers into one, no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Vivien Didelot <vivien.didelot@gmail.com> Cc: Woojung Huh <woojung.huh@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ffc60b55 |
|
06-Aug-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: ksz: Remove dead code and fix warnings Remove ksz_port_cleanup(), which is unused. Add missing include "ksz_common.h", which fixes the following warning when built with make ... W=1 drivers/net/dsa/microchip/ksz_common.c:23:6: warning: no previous prototype for ‘...’ [-Wmissing-prototypes] Note that the order of the headers cannot be swapped, as that would trigger missing forward declaration errors, which would indicate the way forward is to merge the two headers into one. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Vivien Didelot <vivien.didelot@gmail.com> Cc: Woojung Huh <woojung.huh@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e66f840c |
|
29-Jul-2019 |
Tristram Ha <Tristram.Ha@microchip.com> |
net: dsa: ksz: Add Microchip KSZ8795 DSA driver Add Microchip KSZ8795 DSA driver. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Vivien Didelot <vivien.didelot@gmail.com> Cc: Woojung Huh <woojung.huh@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
1c1eb580 |
|
27-Jun-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Replace ad-hoc polling with regmap Regmap provides polling function to poll for bits in a register, use in instead of reimplementing it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Woojung Huh <Woojung.Huh@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
255b59ad |
|
25-Jun-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Factor out regmap config generation into common header The regmap config tables are rather similar for various generations of the KSZ8xxx/KSZ9xxx switches. Introduce a macro which allows generating those tables without duplication. Note that $regalign parameter is not used right now, but will be used in KSZ87xx series switches. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Woojung Huh <Woojung.Huh@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ee394fea |
|
25-Jun-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Dispose of ksz_io_ops Since the driver now uses regmap , get rid of ad-hoc ksz_io_ops abstraction, which no longer has any meaning. Moreover, since regmap has it's own locking, get rid of the register access mutex. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Woojung Huh <Woojung.Huh@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
bafea01f |
|
25-Jun-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Move ksz_cfg and ksz_port_cfg to ksz9477.c These functions are only used by the KSZ9477 code, move them from the header into that code. Note that these functions will be soon replaced by regmap equivalents. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Woojung Huh <Woojung.Huh@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
78e4e32f |
|
25-Jun-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Remove ksz_{get,set}() These functions and callbacks are never used, remove them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Woojung Huh <Woojung.Huh@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
77972783 |
|
25-Jun-2019 |
Marek Vasut <marex@denx.de> |
net: dsa: microchip: Remove ksz_{read,write}24() These functions and callbacks are never used, remove them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Woojung Huh <Woojung.Huh@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
75104db0 |
|
24-Feb-2019 |
Andrew Lunn <andrew@lunn.ch> |
dsa: Remove phydev parameter from disable_port call No current DSA driver makes use of the phydev parameter passed to the disable_port call. Remove it. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
7049f9b5 |
|
22-Feb-2019 |
Tristram Ha <Tristram.Ha@microchip.com> |
net: dsa: microchip: add port_cleanup function Add port_cleanup function to reset some device variables when the port is disabled. Add a mutex to make sure changing those variables is thread-safe. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c30d894b |
|
22-Feb-2019 |
Tristram Ha <Tristram.Ha@microchip.com> |
net: dsa: microchip: get port link status Get port link status to know whether to read MIB counters when the link is going down. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
7c6ff470 |
|
22-Feb-2019 |
Tristram Ha <Tristram.Ha@microchip.com> |
net: dsa: microchip: add MIB counter reading support Add background MIB counter reading support. Port MIB counters should only be read when there is link. Otherwise it is a waste of time as hardware never increases those counters. There are exceptions as some switches keep track of dropped counts no matter what. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c2e86691 |
|
20-Nov-2018 |
Tristram Ha <Tristram.Ha@microchip.com> |
net: dsa: microchip: break KSZ9477 DSA driver into two files Break KSZ9477 DSA driver into two files in preparation to add more KSZ switch drivers. Add common functions in ksz_common.h so that other KSZ switch drivers can access code in ksz_common.c. Add ksz_spi.h for common functions used by KSZ switch SPI drivers. Signed-off-by: Tristram Ha <Tristram.Ha@microchip.com> Reviewed-by: Woojung Huh <Woojung.Huh@microchip.com> Reviewed-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
|