History log of /linux-master/drivers/mmc/host/sdhci-of-aspeed.c
Revision Date Author Comments
# 88803989 28-Feb-2024 Yang Xiwen <forbidden405@outlook.com>

mmc: core: Use a struct device* as in-param to mmc_of_parse_clk_phase()

Parsing dt usually happens very early, sometimes even before the struct
mmc_host has been allocated (e.g. dw_mci_probe() and dw_mci_parse_dt() in
dw_mmc.c). Looking at the source of mmc_of_parse_clk_phase(), it's actually
not needed to have an initialized mmc_host, let's therefore pass a struct
device* to it instead.

Also update the only current user, sdhci-of-aspeed.

Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Link: https://lore.kernel.org/r/20240229-b4-mmc-hi3798mv200-v7-1-10c03f316285@outlook.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# a29e8b51 27-Jul-2023 Yangtao Li <frank.li@vivo.com>

mmc: sdhci-of-aspeed: Convert to platform remove

The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code. However the value returned is (mostly) ignored
and this typically results in resource leaks. To improve here there is a
quest to make the remove callback return void. In the first step of this
quest all drivers are converted to .remove_new() which already returns
void.

Trivially convert this driver from always returning zero in the remove
callback to the void returning variant.

Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Yangtao Li <frank.li@vivo.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230727070051.17778-33-frank.li@vivo.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# f67cd7f6 27-Jul-2023 Yangtao Li <frank.li@vivo.com>

mmc: sdhci-of-aspeed: remove unneeded variables

The variable 'dead' is redundant, let's remove it.

Signed-off-by: Yangtao Li <frank.li@vivo.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Link: https://lore.kernel.org/r/20230727070051.17778-32-frank.li@vivo.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 288b7baf 14-Mar-2023 Yang Li <yang.lee@linux.alibaba.com>

mmc: sdhci-of-aspeed: Use devm_platform_get_and_ioremap_resource()

According to commit 890cc39a8799 ("drivers: provide
devm_platform_get_and_ioremap_resource()"), convert
platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230315055023.61779-1-yang.lee@linux.alibaba.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 291cd54e 08-Jul-2022 David Gow <davidgow@google.com>

mmc: sdhci-of-aspeed: test: Use kunit_test_suite() macro

The kunit_test_suite() macro is no-longer incompatible with module_add,
so its use can be reinstated.

Since this fixes parsing with builtins and kunit_tool, also enable the
test by default when KUNIT_ALL_TESTS is enabled.

The test can now be run via kunit_tool with:
./tools/testing/kunit/kunit.py run --arch=x86_64 \
--kconfig_add CONFIG_OF=y --kconfig_add CONFIG_OF_ADDRESS=y \
--kconfig_add CONFIG_MMC=y --kconfig_add CONFIG_MMC_SDHCI=y \
--kconfig_add CONFIG_MMC_SDHCI_PLTFM=y \
--kconfig_add CONFIG_MMC_SDHCI_OF_ASPEED=y \
'sdhci-of-aspeed'

(It may be worth adding a .kunitconfig at some point, as there are
enough dependencies to make that command scarily long.)

Acked-by: Daniel Latypov <dlatypov@google.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Brendan Higgins <brendanhiggins@google.com>
Signed-off-by: David Gow <davidgow@google.com>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>


# a7ab186f 06-Jun-2021 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Turn down a phase correction warning

The card timing and the bus frequency are not changed atomically with
respect to calls to the set_clock() callback in the driver. The result
is the driver sees a transient state where there's a mismatch between
the two and thus the inputs to the phase correction calculation
formula are garbage.

Switch from dev_warn() to dev_dbg() to avoid noise in the normal case,
though the change does make bad configurations less likely to be
noticed.

Reported-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210607013020.85885-1-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# dd646d98 24-May-2021 Steven Lee <steven_lee@aspeedtech.com>

mmc: sdhci-of-aspeed: Configure the SDHCIs as specified by the devicetree.

The hardware provides capability configuration registers for each SDHCI
in the global configuration space for the SD controller. Writes to the
global capability registers are mirrored to the capability registers in
the associated SDHCI. Configuration of the capabilities must be written
through the mirror registers prior to initialisation of the SDHCI.

Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210524073308.9328-5-steven_lee@aspeedtech.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# bac53336 24-Mar-2021 Jisheng Zhang <Jisheng.Zhang@synaptics.com>

mmc: sdhci: replace mmc->parent with mmc_dev() for consistency

As pointed out by Ulf, "both "mmc->parent" and mmc_dev(mmc) are being
used in the entire c-file". Convert all the mmc->parent usage in all
sdhci host driver to mmc_dev() for consistency.

Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Link: https://lore.kernel.org/r/20210324155013.1e5faa3c@xhacker.debian
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 4af307f5 22-Jan-2021 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Fix kunit-related build error

Randy found that with the following Kconfig settings we have duplicate
definitions (e.g. __inittest()) in sdhci-of-aspeed due to competing
module_init()/module_exit() calls from kunit and driver the itself.

```
CONFIG_MMC_SDHCI_OF_ASPEED=m
CONFIG_MMC_SDHCI_OF_ASPEED_TEST=y
```

Conditionally open-code the kunit initialisation to avoid the error.

Fixes: 7efa02a981d6 ("mmc: sdhci-of-aspeed: Add KUnit tests for phase calculations")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Link: https://lore.kernel.org/r/20210122114852.3790565-1-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 0bbcd225 13-Jan-2021 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Add KUnit tests for phase calculations

Converting degrees of phase to logic delays is irritating to test on
hardware, so lets exercise the function using KUnit.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210114031433.2388532-5-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 0c53dc32 13-Jan-2021 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Add AST2600 bus clock support

The AST2600 can achieve HS200 speeds with a change to the bus clock
divisor behaviour. The divisor can also be more accurate with respect
to the requested clock rate, but keep the one-hot behaviour for
backwards compatibility with the AST2400 and AST2500.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210114031433.2388532-4-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 2fc88f92 13-Jan-2021 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Expose clock phase controls

The Aspeed SD/eMMC controllers expose configurable clock phase
correction by inserting delays of up to 15 logic elements in length into
the bus clock path. The hardware supports independent configuration for
both bus directions on a per-slot basis.

The timing delay per element encoded in the driver was experimentally
determined by scope measurements.

The phase controls for both slots are grouped together in a single
register of the global register block of the SD/MMC controller(s), which
drives the use of a locking scheme between the SDHCIs and the global
register set.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210114031433.2388532-3-andrew@aj.id.au
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# d86472ae 03-Sep-2020 Douglas Anderson <dianders@chromium.org>

mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v5.4

This is like commit 3d3451124f3d ("mmc: sdhci-msm: Prefer asynchronous
probe") but applied to a whole pile of drivers. This batch converts
the drivers that appeared to be around in the v5.4 timeframe.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200903162412.5.I2b630c4d40ff4ea61d5b30b8ccfe95890e257100@changeid
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# ebd4050c 09-Jul-2020 Eddie James <eajames@linux.ibm.com>

mmc: sdhci-of-aspeed: Fix clock divider calculation

When calculating the clock divider, start dividing at 2 instead of 1.
The divider is divided by two at the end of the calculation, so starting
at 1 may result in a divider of 0, which shouldn't happen.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200709195706.12741-3-eajames@linux.ibm.com
Cc: stable@vger.kernel.org # v5.4+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 76216850 18-Nov-2019 Ivan Mikhaylov <i.mikhaylov@yadro.com>

mmc: sdhci-of-aspeed: add inversion signal presence

Add read_l callback in sdhci_ops with flipping of SDHCI_CARD_PRESENT
bit in case of inverted card detection signal.

Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 0a0e8d75 01-Sep-2019 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Allow max-frequency limitation of SDCLK

Add a get_max_clock() handler to sdhci-of-aspeed to report f_max as the
maximum clock rate if it is set. This enables artificial limitation of
the bus speed via max-frequency in the devicetree for e.g. the AST2600
evaluation board where I was seeing errors at 200MHz.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# 7b954cdf 01-Sep-2019 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Uphold clocks-on post-condition of set_clock()

The early-exit didn't seem to matter on the AST2500, but on the AST2600
the SD clock genuinely may not be running on entry to
aspeed_sdhci_set_clock(). Remove the early exit to ensure we always run
sdhci_enable_clk().

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# bf290432 01-Sep-2019 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Drop redundant assignment to host->clock

host->clock is already managed by sdhci_set_ios().

Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# f70d9a24 25-Aug-2019 Wei Yongjun <weiyongjun1@huawei.com>

mmc: sdhci-of-aspeed: Fix return value check in aspeed_sdc_probe()

In case of error, the function of_platform_device_create() returns
NULL pointer not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>


# bb7b8ec6 06-Aug-2019 Andrew Jeffery <andrew@aj.id.au>

mmc: sdhci-of-aspeed: Add support for the ASPEED SD controller

Add a minimal driver for ASPEED's SD controller, which exposes two
SDHCIs.

The ASPEED design implements a common register set for the SDHCIs, and
moves some of the standard configuration elements out to this common
area (e.g. 8-bit mode, and card detect configuration which is not
currently supported).

The SD controller has a dedicated hardware interrupt that is shared
between the slots. The common register set exposes information on which
slot triggered the interrupt; early revisions of the patch introduced an
irqchip for the register, but reality is it doesn't behave as an
irqchip, and the result fits awkwardly into the irqchip APIs. Instead
I've taken the simple approach of using the IRQ as a shared IRQ with
some minor performance impact for the second slot.

Ryan was the original author of the patch - I've taken his work and
massaged it to drop the irqchip support and rework the devicetree
integration. The driver has been smoke tested under qemu against a
minimal SD controller model and lightly tested on an ast2500-evb.

Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>