#
80c602b1 |
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27-Jul-2023 |
Yangtao Li <frank.li@vivo.com> |
mmc: renesas_sdhi: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Yangtao Li <frank.li@vivo.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230727070051.17778-56-frank.li@vivo.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
aed85305 |
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12-Jul-2023 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: remove outdated indentation Using tabs to make a structure initialization more readable is not considered helpful. Remove the final appearance from this driver. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230712140116.18718-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
74f45de3 |
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12-Jul-2023 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: register irqs before registering controller IRQs should be ready to serve when we call mmc_add_host() via tmio_mmc_host_probe(). To achieve that, ensure that all irqs are masked before registering the handlers. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20230712140011.18602-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
afc9b96b |
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19-Nov-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: use new convenience macro from MMC core Makes the code more readable. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-5-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
48c917fa |
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19-Nov-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: add helper to access quirks Add a macro to check for a quirk because it a) ensures that the check for non-empty 'quirks' struct is not forgotten and b) is easier to read. Convert existing quirk access as well. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
0da69dd2 |
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19-Nov-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: better reset from HS400 mode Up to now, HS400 adjustment mode was only disabled on soft reset when a calibration table was in use. It is safer, though, to disable it as soon as the instance has an adjustment related quirk set, i.e. bad taps or a calibration table. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
3d4f9898 |
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19-Nov-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: alway populate SCC pointer We need the SCC pointer to reset the device, so populate it even when we don't need it for tuning. Fixes: 45bffc371fef ("mmc: renesas_sdhi: only reset SCC when its pointer is populated") Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221120113457.42010-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
43c487c2 |
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02-Nov-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: remove 'alignment_shift' from platform data There is only one alignment shift for one type of Renesas SDHI. Encode it directly in its DMA driver to reduce complexity and ease further simplifications. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20221102125430.28466-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
7f3ea248 |
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06-Oct-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: improve naming of DMA struct Commit 058db2868cd8 ("mmc: tmio, renesas_sdhi: move struct tmio_mmc_dma to renesas_sdhi.h") is correct. The DMA struct should be prefixed with 'renesas_sdhi' to avoid confusion about is namespace. Fix some indentation while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Duy Nguyen <duy.nguyen.rh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20221006190452.5316-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
f0c00454 |
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27-Sep-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
mmc: renesas_sdhi: Fix rounding errors Due to clk rounding errors on RZ/G2L platforms, it selects a clock source with a lower clock rate compared to a higher one. For eg: The rounding error (533333333 Hz / 4 * 4 = 533333332 Hz < 5333333 33 Hz) selects a clk source of 400 MHz instead of 533.333333 MHz. This patch fixes this issue by adding a margin of (1/1024) higher to the clock rate. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Fixes: bb6d3fa98a41 ("clk: renesas: rcar-gen3: Switch to new SD clock handling") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220928110755.849275-1-biju.das.jz@bp.renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
00e8c11c |
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20-Jul-2022 |
Takeshi Saito <takeshi.saito.xv@renesas.com> |
mmc: renesas_sdhi: newer SoCs don't need manual tap correction The newest Gen3 SoCs and Gen4 SoCs do not need manual tap correction with HS400 anymore. So, instead of checking the SDHI version, add a quirk flag and set manual tap correction only for affected SoCs. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [wsa: rebased, renamed the quirk variable, removed stale comment] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220720072901.1266-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
2e586f8a |
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25-Jun-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: avoid glitches when resetting If we reset because of an error, we need to preserve values for the clock frequency. Otherwise, glitches may be seen on the bus. To achieve that, we introduce a 'preserve' parameter to the reset function and the IP core specific reset callbacks to handle everything accordingly. Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220625131722.1397-1-wsa@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
0dac1e49 |
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24-Jun-2022 |
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> |
mmc: renesas_sdhi: Get the reset handle early in the probe In case of devm_reset_control_get_optional_exclusive() failure we returned directly instead of jumping to the error path to roll back initialization. This patch moves devm_reset_control_get_optional_exclusive() early in the probe so that we have the reset handle prior to initialization of the hardware. Fixes: b4d86f37eacb7 ("mmc: renesas_sdhi: do hard reset if possible") Reported-by: Pavel Machek <pavel@denx.de> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220624181438.4355-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
583e4837 |
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20-Mar-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: remove outdated headers We moved quirk handling out of the SDHI core to the individual drivers. So, no need to include headers needed for soc_device_match et al. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220320123016.57991-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
03e59b1e |
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04-Apr-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: don't overwrite TAP settings when HS400 tuning is complete When HS400 tuning is complete and HS400 is going to be activated, we have to keep the current number of TAPs and should not overwrite them with a hardcoded value. This was probably a copy&paste mistake when upporting HS400 support from the BSP. Fixes: 26eb2607fa28 ("mmc: renesas_sdhi: add eMMC HS400 mode support") Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220404114902.12175-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
46d4820f |
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03-Apr-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: special 4tap settings only apply to HS400 Previous documentation was vague, so we included SDR104 for slow SDnH clock settings. It turns out now, that it is only needed for HS400. Fixes: bb6d3fa98a41 ("clk: renesas: rcar-gen3: Switch to new SD clock handling") Cc: stable@vger.kernel.org Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20220404100508.3209-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
ec288a2c |
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14-Aug-2021 |
Yury Norov <yury.norov@gmail.com> |
bitmap: unify find_bit operations bitmap_for_each_{set,clear}_region() are similar to for_each_bit() macros in include/linux/find.h, but interface and implementation of them are different. This patch adds for_each_bitrange() macros and drops unused bitmap_*_region() API in sake of unification. Signed-off-by: Yury Norov <yury.norov@gmail.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Dennis Zhou <dennis@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
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#
45177fc6 |
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17-Nov-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: Simplify an expression We already have 'quirks', no need to go via 'priv'. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20211117103850.28397-1-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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#
366df82f |
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16-Nov-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock Use the existing devm_clk_get_optional() helper to obtain the optional Card Detect clock, instead of open-coding the same operation. a side effect, real errors will now be handled correctly instead of being ignored. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/540d803d31bf9aa1d0f78f431cae0ccd05387edc.1637069733.git.geert+renesas@glider.be
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#
e5f7e81e |
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10-Nov-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: Parse DT for SDnH If there is a SDnH clock provided in DT, let's use it instead of relying on the fallback. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20211110191610.5664-21-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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#
079e83b9 |
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10-Nov-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: Use dev_err_probe when getting clock fails This is to improve deferred probe in this driver and to keep consistent with an up-to-date handling of a soon to be added second clock. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20211110191610.5664-20-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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#
bb6d3fa9 |
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10-Nov-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
clk: renesas: rcar-gen3: Switch to new SD clock handling The old SD handling code was huge and could not handle all the details which showed up on R-Car Gen3 SoCs meanwhile. It is time to switch to another design. Have SDnH a separate clock, use the existing divider clocks and move the errata handling from the clock driver to the SDHI driver where it belongs. This patch removes the old SD handling code and switch to the new one. This updates the SDHI driver at the same time. Because the SDHI driver can only communicate with the clock driver via clk_set_rate(), I don't see an alternative to this flag-day-approach, so we cross subsystems here. The patch sadly looks messy for the CPG lib, but it is basically a huge chunk of code removed and smaller chunks added. It looks much better when you just view the resulting source file. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Link: https://lore.kernel.org/r/20211110191610.5664-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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#
7dba4028 |
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30-Nov-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: initialize variable properly when tuning 'cmd_error' is not necessarily initialized on some error paths in mmc_send_tuning(). Initialize it. Fixes: 2c9017d0b5d3 ("mmc: renesas_sdhi: abort tuning when timeout detected") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20211130132309.18246-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
b81bede4 |
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26-Aug-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: fix regression with hard reset on old SDHIs Old SDHI instances have a default value for the reset register which keeps it in reset state by default. So, when applying a hard reset we need to manually leave the soft reset state as well. Later SDHI instances have a different default value, the one we write manually now. Fixes: b4d86f37eacb ("mmc: renesas_sdhi: do hard reset if possible") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210826082107.47299-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
71b7597c |
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29-Jul-2021 |
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
mmc: renesas_sdhi: Refactor renesas_sdhi_probe() Refactor renesas_sdhi_probe() to avoid increasing numbers of sdhi_quirks_match[] entry when we add other stable SoCs like r8a779m*. Note that the sdhi_quirks_match[] is only needed on renesas_sdhi_internal_dmac.c so that of_data of renesas_sdhi_sys_dmac.c keeps as-is. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210729103234.480743-1-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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21adc2e4 |
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08-Jun-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: Improve function name when aborting a tuning cmd 'mmc_abort_tuning()' made me think tuning gets completely aborted. However, it sends only a STOP cmd to cancel the current tuning cmd. Tuning process may still continue after that. So, rename the function to 'mmc_send_abort_tuning()' to better reflect all this. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20210608180620.40059-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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6687cd72 |
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04-Jun-2021 |
Geert Uytterhoeven <geert+renesas@glider.be> |
mmc: renesas_sdhi: Fix HS400 on R-Car M3-W+ R-Car M3-W ES3.0 is marketed as R-Car M3-W+ (R8A77961), and has its own compatible value "renesas,r8a77961". Hence using soc_device_match() with soc_id = "r8a7796" and revision = "ES3.*" does not actually match running on an R-Car M3-W+ SoC. Fix this by matching with soc_id = "r8a77961" instead. Fixes: a38c078fea0b1393 ("mmc: renesas_sdhi: Avoid bad TAP in HS400") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/ee8af5d631f5331139ffea714539030d97352e93.1622811525.git.geert+renesas@glider.be Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
2c9017d0 |
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02-Jun-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: abort tuning when timeout detected We have to bring the eMMC from sending-data state back to transfer state once we detected a CRC error (timeout) during tuning. So, send a stop command via mmc_abort_tuning(). Fixes: 4f11997773b6 ("mmc: tmio: Add tuning support") Reported-by Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210602073435.5955-1-wsa+renesas@sang-engineering.com Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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0751d56e |
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13-Apr-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: always restore irq register Currently, only SDHI on R-Car Gen2+ reinitializes the irq register during reset but it should be done on all instances. We can move it from the SDHI driver to the TMIO core, because we now have the 'sd_irq_mask_all' variable which carries the proper value to use. That also means we can remove the initialization from tmio_mmc_probe() because it calls tmio_mmc_reset(), too. We only move that tmio_mmc_reset() call there a little to ensure 'sd_irq_mask_all' is properly set. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210413083137.11171-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
b4d86f37 |
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17-Mar-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: do hard reset if possible All recent SDHI instances can be reset via the reset controller. If one is found, use it instead of the open coded reset. This is to get a future-proof sane reset state. Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210317091622.31890-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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0e587014 |
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17-Mar-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: break SCC reset into own function renesas_sdhi_reset used to mainly reset the SCC but is now doing more and even more will be added. So, factor out SCC reset to have a clear distinction when we want to reset either SCC or SDHI+SCC. Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210317091622.31890-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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9f12cac1 |
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04-Mar-2021 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: use custom mask for TMIO_MASK_ALL Populate the new member for custom mask values to make sure this value is applied whenever needed. Also, rename the define holding the value because this is not only about initialization anymore. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210304092903.8534-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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ed2fab9a |
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23-Dec-2020 |
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
mmc: renesas_sdhi: Add a condition of cmd/data timeout for retune According to the datasheet, this controller needs retune when cmd or data timeout happens. So, add a condition into .check_retune(). Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/1608708622-29668-3-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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b191dece |
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25-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: populate hook for longer busy_wait Make use of the EXTOP bit in R-Car Gen3 SoCs to have a twice as large busy wait duration. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201125213001.15003-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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30ae3e13 |
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25-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: set max_busy_timeout Set max_busy_timeouts for variants known to support the TOPxx bits in the SD_OPTION register. The timeout mechanism was running in the background but not yet properly handled in the driver. So, let the MMC core know when to not use R1B to avoid unhandled timeouts. My datasheets for older variants (tmio_mmc.c) suggest that they support it, too. However, actual bit descriptions are lacking, so I chose an opt-in approach. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201125213001.15003-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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ab07a135 |
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11-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: sort includes Better prevent double includes. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201111100244.15823-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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0e08a411 |
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11-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: don't hardcode SDIF values Use a macro to name the hardcoded values. Also, move the SDIF register definition into the SDHI driver because this is an SDHI extension. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201111100244.15823-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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4533c3eb |
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11-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: improve HOST_MODE usage HOST_MODE should have a CTL_ prefix, too. This makes the code more readable because we immediately know what it is. Also, remove the hardcoded values with something readable, too. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201111100244.15823-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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#
8c8310a6 |
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10-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: remove superfluous SCLKEN All previously called functions handle SCLKEN on their own, no need to enable it again in sdhi_reset(). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201110162151.37622-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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80d0be81 |
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10-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: merge the SCC reset functions There is no user of renesas_sdhi_reset_scc() anymore, only renesas_sdhi_disable_scc() so merge these functions into one. I guess the seperation was cruft anyhow. The BSP doesn't have it anymore and I can't recall the reason we had it. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201110162151.37622-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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183edc06 |
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10-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: clear TAPEN when resetting, too We want to clear TAPEN in a software reset, too, to have a completely known state. Especially when we doing the initial reset during boot to clear previous firmware states. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201110162151.37622-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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9f809065 |
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10-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: simplify reset routine a little The 'reset' pointer is only populated for Gen2+. So, we don't need to check for that flag inside the routine. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201110142058.36393-5-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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d14ac691 |
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10-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: populate SCC pointer at the proper place The SCC pointer is currently filled whenever the SoC is Gen2+. This is wrong because there is a Gen2-variant without SCC (SDHI_VER_GEN2_SDR50). We have been lucky because the writes to unintended registers have not caused problems so far. But further refactoring work exposed the problem. So, move the pointer initialization to the place where we know that the SDHI instance supports tuning. And also populate the 'reset' pointer unconditionally to make sure the interrupt enable register is always properly set for Gen2+. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201110142058.36393-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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b161d87d |
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10-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: probe into TMIO after SCC parameters have been setup Setting up the SCC parameters does not need a probed TMIO device. But in the near future, probing the TMIO device needs the SCC parameters setup. So, fix the ordering. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201110142058.36393-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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45bffc37 |
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10-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: only reset SCC when its pointer is populated Only re-initialize SCC and tuning when an SCC was found during probe(). This is currently a noop because all R-Car Gen2+ are considered to have an SCC. But this will change in a later patch, so we need this preparation. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201110142058.36393-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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03d80e04 |
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06-Nov-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
Revert "mmc: renesas_sdhi: workaround a regression when reinserting SD cards" This reverts commit db1af1e9712920f47b5dc6a995fca3eec05ea85e. It was only a workaround to hide a regression. We now have proper fixes. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20201106072549.1495-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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e8973201 |
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06-Nov-2020 |
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
mmc: renesas_sdhi_core: Add missing tmio_mmc_host_free() at remove The commit 94b110aff867 ("mmc: tmio: add tmio_mmc_host_alloc/free()") added tmio_mmc_host_free(), but missed the function calling in the sh_mobile_sdhi_remove() at that time. So, fix it. Otherwise, we cannot rebind the sdhi/mmc devices when we use aliases of mmc. Fixes: 94b110aff867 ("mmc: tmio: add tmio_mmc_host_alloc/free()") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1604654730-29914-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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db1af1e9 |
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08-Oct-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: workaround a regression when reinserting SD cards After the conversions of the reset routines, re-inserting SD cards didn't work anymore. Apply this temporary workaround to have working SD cards during the merge window. The issue will be fixed properly until the final release. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20201008092533.76588-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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fbb31330 |
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22-Sep-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: drop local flag for tuning The MMC core has now a generic check if some tuning is in progress. Its protected area is a bit larger than the custom one in this driver but we concluded that this works equally well for the intended case. So, drop the local flag and switch to the generic one. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200922172253.4458-1-wsa@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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ce6f92c2 |
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02-Sep-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: support manual calibration Some R-Car Gen3 SoCs need some manual correction of timing parameters after the automatic tuning has finished but before next CMD13 is completed. This patch implements that by this state machine: - introducing a per-SoC correction table if needed - iff such a table exists, the 'fixup_request' callback is populated during probe - iff such a table exists, a runtime flag ('needs_adjust_hs400') is set when HS400 tuning was completed - the callback will check the runtime flag and enable the corrected manual mode if the flag is set and CMD13 is encountered - at the end of the enablement the runtime flag is cleared - iff the configuration flag is set, the manual mode will be disabled when HS400 gets downgraded There also some helper functions added to access the TMPPORT registers. The actual correction table is SoC and instance(!) specific and is added to the quirks struct. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20200902081812.1591-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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0f93db65 |
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01-Sep-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: keep SCC clock active when tuning Tuning procedure switches to lower frequencies but that will turn the SCC off and accessing its register then will hang. So, check when we are tuning and keep the current setup of the external clock if we are doing so. Note that we still switch to the lower frequency because of the internal divider. We just make sure to not modify the external clock. This patch depends on a MMC core patch calling the downgrade function earlier. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200901150250.26236-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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510bfe58 |
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20-Aug-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: remove indirection of 'execute_tuning' callback After all the previous refactorization, we can now populate mmc_ops directly and don't need a layer inbetween. The NULL-pointer check and the error printout are already done by the MMC core. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200820132538.24758-7-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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5b0739d7 |
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20-Aug-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: don't reset whole IP core when tuning fails SDHI needs to reset the SCC only, not the whole IP core. So, if tuning fails, don't handle specifics in the generic TMIO core, but in the specific drivers. For SDHI, we need to move around the reset routine a bit. It is not modified. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200820132538.24758-6-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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576146ea |
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20-Aug-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: factor out common parts of the reset routine Some TMIO variants need specific actions in their reset routine, but they are all based on a generic reset routine. So, the optional 'reset' callback will now only take care of the additional stuff and we will have a generic function around it. Less code, easier to maintain, and much more readable. Code in tmio_mmc.c is untested but in my TC6387XB datasheet the SDIO part is reset independently from the SD part, too. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200820132538.24758-5-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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6e7d4de1 |
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20-Aug-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: move wrong 'hw_reset' to 'reset' This driver got the usage of 'hw_reset' wrong and missed that it is used to reset the remote HW (card) only, not the local one (controller). Move everything to the proper 'reset' callback. Also, add the generic reset code from TMIO, so we will ensure the same behaviour (it will get refactored away in a later patch). This also means we need to drop MMC_CAP_HW_RESET because this is currently not supported by our hardware. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200820132538.24758-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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df561f66 |
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23-Aug-2020 |
Gustavo A. R. Silva <gustavoars@kernel.org> |
treewide: Use fallthrough pseudo-keyword Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
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d42c9fff |
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19-May-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: remove manual clk handling The SDHI driver en-/disabled its main clock on its own, e.g. during probe() and remove(). Now, we leave all handling to RPM. clk_summary before: sd0 1 1 0 12480000 0 0 50000 sdif0 2 2 0 12480000 0 0 50000 clk_summary after: sd0 1 1 0 12480000 0 0 50000 sdif0 1 1 0 12480000 0 0 50000 Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20200519164251.5430-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
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63fd8ef3 |
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19-May-2020 |
Ulf Hansson <ulf.hansson@linaro.org> |
mmc: tmio: Make sure the PM domain is 'started' while probing If the tmio device is attached to a genpd (PM domain), that genpd may have ->start|stop() callback assigned to it. To make sure the device is accessible during ->probe(), genpd's ->start() callback must be invoked, which is currently managed by tmio_mmc_host_probe(). However, it's likely that may be too late for some cases, as registers may be read and written way before that point. To fix the behaviour, let's move the call to dev_pm_domain_start() from tmio_mmc_host_probe() into those clients that needs it. From discussions at linux-mmc mailing list, it turned out that it should be sufficient to do this for the SDHI renesas variants, hence the call is move to renesas_sdhi_probe(). Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20200519152445.6922-1-ulf.hansson@linaro.org Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
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a38c078f |
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23-Apr-2020 |
Takeshi Saito <takeshi.saito.xv@renesas.com> |
mmc: renesas_sdhi: Avoid bad TAP in HS400 With R-Car Gen3, CRC error occue at the following TAPs. H3, M3W 1.3, M3N... TAP=2,3,6,7 M3W 3.0 ... TAP=1,3,5,7 (Note: for 4tap SoCs, the numbers get divided by 2) Do not use these TAPs in HS400, and also don't use auto correction but manual correction. We check for bad taps in two places: 1) After tuning HS400: Then, we select a neighbouring TAP. One of them must be good, because there are never three bad taps in a row. Retuning won't help because we just finished tuning. 2) After a manual correction request: Here, we can't switch to the requested TAP. But we can retune (if the HS200 tuning was good) because the environment might have changed since the last tuning. If not, we stay on the same TAP. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [wsa: refactored to match upstream driver, reworded commit msg] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200423130432.9990-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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f583da40 |
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23-Apr-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: handle M3-W ES1.2 and 1.3 revisions For ES1.2, add a comment explaining the situation. For ES1.3 (and later, although unlikely), add a new entry defining it as 4tap. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200423130432.9990-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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74f6bdb8 |
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20-Apr-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: shorten types after refactorization After TAP refactorization, we can use 'unsigned int' for two more variables because all the calculations work on this type now. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200420170230.9091-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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9cbe0fc8 |
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16-Apr-2020 |
Marek Vasut <marex@denx.de> |
mmc: host: Prepare host drivers for mmc_regulator_set_vqmmc() returning > 0 Patch all drivers which use mmc_regulator_set_vqmmc() and prepare them for the fact that mmc_regulator_set_vqmmc() can return a value > 0, which would happen if the signal voltage switch did NOT happen, because the voltage was already set correctly. Signed-off-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20200416163649.336967-1-marex@denx.de [Ulf: Re-worked/simplified the code a bit] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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bcf89cb8 |
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08-Apr-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: simplify summary output No need to call platform_get_resource twice when we still have the pointer from before. Also, use '%pa' for a resource_size_t pointer. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200408142252.21958-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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5fb6bf51 |
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08-Apr-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: improve TAP selection if all TAPs are good When tuning HS400, if all TAPS are good, we can utilize the SMPCMP register to select the optimal TAP. For that, we populate a second bitmap with SMPCMP results and query it in case the regular bitmap is full (= all good). Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200408094638.10375-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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ec4fc1ac |
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08-Apr-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: clarify handling of selecting TAPs The comment and the define about how TAPs are selected were confusing to me because the good TAP was only valid if it was bigger than a *_MAX_* value. Rename the define and adapt the comment to what really happens. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200408094638.10375-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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92fa2a56 |
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08-Apr-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: refactor calculation of best TAP To select the best TAP, we need to find the longest stream of set bits in a bit field. There is now a helper function for bitmaps which iterates over all region of set bits. Using it makes the code much more concise and easier to understand. Double so, because we need to handle two bitmaps in the near future. Remove a superfluous comment while here. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200408094638.10375-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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a5d90dc4 |
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13-Feb-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: simplify execute_tuning After refactoring, 'ret' variable is superfluous. Remove it. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200213163715.8212-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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f22084b6 |
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29-Jan-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: remove superfluous callback wrappers After various refactoring, we can populate the mmc_ops callbacks directly and don't need to have wrappers for them anymore. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200129203709.30493-7-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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b2dd9a13 |
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29-Jan-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: factor out TAP usage TAPs are Renesas SDHI specific. Now that we moved all handling to the SDHI core, we can also move the definitions from the TMIO struct to the SDHI one. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200129203709.30493-6-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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a86bf70b |
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29-Jan-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: enforce retune after runtime suspend Currently, select_tuning() is called after RPM resume. But select_tuning() needs some additional function calls to work correctly. Instead of reimplementing the whole postprocessing, just enforce retuning. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200129203709.30493-5-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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64982b9f |
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29-Jan-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: give callback a generic name check_scc_error() is too Renesas specific. Let's just call it check_retune() to make it also easier understandable what it does. Only a rename, no functional change. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200129203709.30493-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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3a821a82 |
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29-Jan-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: complain loudly if driver needs update When the tap array in the driver is too low, this is not a warning but an error. Also _once is not helpful, we should make sure it is prominently in the logs. It is safe to do this because this will only show up during SoC enablement when we a new SoCs needs more taps (if that ever will happen). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200129203709.30493-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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0c482d82 |
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29-Jan-2020 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: refactor tuning execution into SDHI driver Move Renesas specific code for executing the tuning with a SCC into the SDHI driver and leave only a generic call in the TMIO driver. Simplify the code a little by removing init_tuning() and prepare_tuning() callbacks. The latter is directly folded into the new execute_tuning() callbacks. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20200129203709.30493-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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6199a10e |
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16-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: cleanup SCC defines Use increasing BIT numbers consistently and remove some superfluous comments. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217114034.13290-6-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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9b0d6855 |
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16-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: enforce manual correction for Gen3 HW engineers say that automatic tap correction cannot be used for HS400 in all R-Car Gen3 SoCs. So, check for that SDHI variant and disable it when HS400 is about to be enabled. Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20191217114034.13290-5-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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71cfc927 |
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16-Dec-2019 |
Takeshi Saito <takeshi.saito.xv@renesas.com> |
mmc: renesas_sdhi: only check CMD status for HS400 manual correction R-Car Gen3 cannot use correction error status with HS400. HS200: CMD and DAT signal timing are based on CLK signal. HS400: CMD signal is based on CLK. DAT signal is based on DS signal. In HS400, CMD signal is 200MHz(SDR). DAT signal is 200MHz(DDR). Center position of signal is different between CMD and DAT. TAP position should be adjusted to the center position of CMD signal. DAT sampling timing is adjusted by HS400 calibration circuit regardless of TAP position. Refer to renesas_sdhi_adjust_hs400mode_enable(). However, correction error status contains CMD and DAT status in HS400 (DAT signal is not masked in HS400). Therefore, correction error status cannot use in HS400. It means that auto correction cannot be uses in HS400. Manual correction can change to the correct TAP position by ignoring DAT correction error status and using only CMD correction status. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [wsa: refactored patch from BSP] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191217114034.13290-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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11a21960 |
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16-Dec-2019 |
Takeshi Saito <takeshi.saito.xv@renesas.com> |
mmc: renesas_sdhi: Add manual correction This patch adds a manual correction mechanism for SDHI. Currently, SDHI uses automatic TAP position correction. However, TAP position can also be corrected manually via correction error status flags. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20191217114034.13290-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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44f54e70 |
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16-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: remove double clear of automatic correction hw_reset() clears the automatic correction bit twice. I couldn't find anything in the docs recommending that. Removing one of them didn't cause any regressions here, so keep it simple. Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20191217114034.13290-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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c1a49782 |
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03-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: use recent tap values for HS400 New datasheets require different and new values for HS400 with 4taps or 8taps. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191203200513.1758-6-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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12e3c55d |
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03-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: remove 4taps as a TMIO flag Now that the quirks structure is accessible, we can remove the TMIO flag for HS400 using only 4 taps. This is Renesas specific anyhow. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191203200513.1758-5-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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7af08206 |
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03-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: make quirks info accessible outside probe() We will need that for a later patch. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191203200513.1758-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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e5088f20 |
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03-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: make warning more precise The warning is not solely used for SDR104 anymore, but for all which require tuning. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191203200513.1758-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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6e3cbb05 |
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03-Dec-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: keep sorting for quirk entries The two devices next to each other are super similar, but still, let's keep the alphanumeric sorting for easier additions later. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191203200513.1758-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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e8307ec5 |
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02-Oct-2019 |
Geert Uytterhoeven <geert+renesas@glider.be> |
mmc: renesas_sdhi: Do not use platform_get_irq() to count interrupts As platform_get_irq() now prints an error when the interrupt does not exist, counting interrupts by looping until failure causes the printing of scary messages like: renesas_sdhi_internal_dmac ee140000.sd: IRQ index 1 not found Fix this by using the platform_irq_count() helper to avoid touching non-existent interrupts. Fixes: 7723f4c5ecdb8d83 ("driver core: platform: Add an error message to platform_get_irq*()") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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8861474a |
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13-Sep-2019 |
Ulf Hansson <ulf.hansson@linaro.org> |
Revert "mmc: tmio: move runtime PM enablement to the driver implementations" This reverts commit 7ff213193310ef8d0ee5f04f79d791210787ac2c. It turns out that the above commit introduces other problems. For example, calling pm_runtime_set_active() must not be done prior calling pm_runtime_enable() as that makes it fail. This leads to additional problems, such as clock enables being wrongly balanced. Rather than fixing the problem on top, let's start over by doing a revert. Fixes: 7ff213193310 ("mmc: tmio: move runtime PM enablement to the driver implementations") Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
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75eaf49f |
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29-Aug-2019 |
Tamás Szűcs <tszucs@protonmail.ch> |
mmc: sdhi: fill in actual_clock Save set clock in mmc_host actual_clock enabling exporting it via debugfs. This will indicate the precise SD clock in I/O settings rather than only the sometimes misleading requested clock. Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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ef4a8d90 |
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06-Jun-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: sdhi: remove unneeded initialization Bools are initialized to 'false' by default. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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6a686986 |
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06-Jun-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: sdhi: improve quirk descriptions Quirks show up in new SoCs as well, so the naming should be generic. Describe them by what they do. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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7ff21319 |
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10-Apr-2019 |
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
mmc: tmio: move runtime PM enablement to the driver implementations Both the Renesas and Uniphier implementations perform actions which affect runtime PM before calling into the core tmio_mmc_host_probe() which enabled runtime PM. Move pm_runtime_enable() from the core and tmio_mmc_host_probe() into each drivers probe() so it can be called before any clocks or other resources are switched on. Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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97bf85b6 |
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06-Jun-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: sdhi: disallow HS400 for M3-W ES1.2, RZ/G2M, and V3H Our HW engineers informed us that HS400 is not working on these SoC revisions. Fixes: 0f4e2054c971 ("mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.[012]") Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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91ecbe50 |
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19-Mar-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: set CBSY flag before probing TMIO host The CBSY flag should be proper before calling tmio_mmc_host_probe() because this function will already use write16 which checks this bit. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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f49bdcde |
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14-Mar-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: update copyright information Mostly year updates, but one addition as well. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund@ragnatech.se> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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c9a9497c |
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19-Mar-2019 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: limit block count to 16 bit for old revisions R-Car Gen2 has two different SDHI incarnations in the same chip. The older one does not support the recently introduced 32 bit register access to the block count register. Make sure we use this feature only after the first known version. Thanks to the Renesas Testing team for this bug report! Fixes: 5603731a15ef ("mmc: tmio: fix access width of Block Count Register") Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Phong Hoang <phong.hoang.wz@renesas.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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f0c8234c |
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08-Feb-2019 |
Takeshi Saito <takeshi.saito.xv@renesas.com> |
mmc: renesas_sdhi: Change HW adjustment register according to speed mode SCC is used for SDR104/HS200/HS400. We need to change SCC_DT2FF according to the mode. If it is inappropriate, CRC error tends to occur. This adds variable "tap_hs400" for HS400 mode and configures SCC_DT2FF as needed. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [wsa: rebased to upstream and updated commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund@ragnatech.se> Tested-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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d30ae056 |
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28-Jan-2019 |
Takeshi Saito <takeshi.saito.xv@renesas.com> |
mmc: renesas_sdhi: Fix card initialization failure in high speed mode This fixes card initialization failure in high speed mode. If U-Boot uses SDR or HS200/400 mode before starting Linux and Linux DT does not enable SDR/HS200/HS400 mode, card initialization fails in high speed mode. It is necessary to initialize SCC registers during card initialization phase. HW reset function is registered only for a port with either of SDR/HS200/HS400 properties in device tree. If SDR/HS200/HS400 properties are not present in device tree, SCC registers will not be reset. In SoC that support SCC registers, HW reset function should be registered regardless of the configuration of device tree. Reproduction procedure: - Use U-Boot that support MMC HS200/400 mode. - Delete HS200/HS400 properties in device tree. (Delete mmc-hs200-1_8v and mmc-hs400-1_8v) - MMC port works high speed mode and all commands fail. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Cc: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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1970701f |
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19-Nov-2018 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: introduce mask for 'always 1' bits Some variants (namely Renesas SDHI) have bits in the STATS and IRQ_MASK registers which are 'always 1' and should be written as such. Introduce a seperate mask for this and apply it whenever such a register is written. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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0f4e2054 |
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28-Nov-2018 |
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
mmc: renesas_sdhi: disable HS400 on H3 ES1.x and M3-W ES1.[012] The Renesas BSP confirms that H3 ES1.x and M3-W ES1.[012] do not properly support HS400. Add a quirk to indicate this and disable HS400 in the MMC capabilities if the quirk is set. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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164691aa |
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28-Nov-2018 |
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
mmc: renesas_sdhi: handle 4tap hs400 mode quirk based on SoC revision Latest datasheet makes it clear that not all ES revisions of the H3 and M3-W have the 4-tap HS400 mode quirk, currently the quirk is set unconditionally for these two SoCs. Prepare to handle the quirk based on SoC revision instead of compatibility value by using soc_device_match() and set the TMIO_MMC_HAVE_4TAP_HS400 flag explicitly. The reason for adding a new quirks struct instead of just a flag is that looking ahead it seems more quirks needs to be handled in a SoC revision basis. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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202367cb |
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26-Nov-2018 |
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
mmc: renesas_sdhi: add initial setting of interrupt mask register The initial value of the interrupt mask register may be different from the H/W manual at the startup of the kernel by setting from the bootloader. Since the error interrupts may be unmasked, the driver sets initial value. The initial value is only known for R-Car Gen2 and Gen3 platforms so limit the initialization to those platforms. Based on work from Masaharu Hayakawa. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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df7507b5 |
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31-Oct-2018 |
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
mmc: renesas_sdhi: remove workaround for HS400 clock The driver sets an incorrect clock and depends on the clock driver knowledge of this incorrect setting to still set a 200Mhz SDn clock. Instead of spreading the workaround between the two drivers the clock driver should be made aware of the ES versions where the special clock handling is needed no need to keep this workaround in the SDHI driver. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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75f349a1 |
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29-Aug-2018 |
Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> |
mmc: renesas_sdhi: skip SCC error check when retuning Checking for SCC error during retuning is unnecessary. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> [Niklas: fix small style issue] Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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68f83127 |
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22-Aug-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: renesas_sdhi: merge clk_{start,stop} functions to set_clock renesas_sdhi_clk_start() and renesas_sdhi_clk_stop() are now only called from renesas_sdhi_set_clock(). Merge them. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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0196c8db |
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22-Aug-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio: move tmio_mmc_set_clock() to platform hook tmio_mmc_set_clock() is full of quirks because different SoC vendors extended this in different ways. The original IP defines the divisor range 1/2 ... 1/512. bit 7 is set: 1/512 bit 6 is set: 1/256 ... bit 0 is set: 1/4 all bits clear: 1/2 It is platform-dependent how to achieve the 1/1 clock. I guess the TMIO-MFD variant uses the clock selector outside of this IP, as far as I see tmio_core_mmc_clk_div() in drivers/mfd/tmio_core.c I guess bit[7:0]=0xff is Renesas-specific extension. Socionext (and Panasonic) uses bit 10 (CLKSEL) for 1/1. Also, newer versions of UniPhier SoC variants use bit 16 for 1/1024. host->clk_update() is only used by the Renesas variants, whereas host->set_clk_div() is only used by the TMIO-MFD variants. To cope with this mess, promote tmio_mmc_set_clock() to a new platform hook ->set_clock(), and melt the old two hooks into it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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f707079d |
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21-Aug-2018 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: use SPDX identifier for Renesas drivers Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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5c99826b |
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24-Jul-2018 |
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
mmc: renesas_sdhi: Fix sampling clock position selecting When tuning each tap is issued CMD19 twice and the result of both runs recorded in host->taps. If the result is different between the two runs the wrong sampling clock position was selected. Fix this by merging the two runs and only keep the result for each tap if it was good in both sets. Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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26eb2607 |
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18-Jun-2018 |
Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> |
mmc: renesas_sdhi: add eMMC HS400 mode support This patch adds processing for selecting HS400 mode. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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ef5332c1 |
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01-Jun-2018 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: really fix WP logic regressions This reverts commit e060d376cc61 ("mmc: renesas_sdhi: fix WP detection") and adds some code to really fix the regressions. It was missed so far that Renesas R-Car instantiations of SDHI chose to disable internal WP and used the existence of "wp-gpios" to en/disable WP at all. With the first refactoring by Yamada-san with commit 2ad1db059b9a ("mmc: renesas_sdhi: use MMC_CAP2_NO_WRITE_PROTECT instead of TMIO own flag"), WP was always disabled even when GPIOs were present. With Wolfram's first fix which gets now reverted, GPIOs were honored. But when not available, the fallback was to internal WP and not to disabled WP. This caused wrong WP status on uSD card slots. Restore the old behaviour now. By default, WP is disabled. When a GPIO is found, the GPIO re-enables WP. We will think about possible better ways to handle this in the future. Tested on a previously regressing Renesas Lager board (H2) and a still working Renesas Salvator-X board (M3-W). Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Cc: stable@vger.kernel.org # v4.17+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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4472f0fc |
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20-Mar-2018 |
Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> |
mmc: renesas_sdhi: replace EXT_ACC with HOST_MODE All our documentation says HOST_MODE, we don't really know where EXT_ACC came from. Rename it to reduce the confusion. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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bc45719c |
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17-Jan-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio: remove dma_ops from tmio_mmc_host_probe() argument Drivers need to set up various struct members for tmio_mmc_host before calling tmio_mmc_host_probe(). Do likewise for host->dma_ops instead of passing it as a function argument. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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b21fc294 |
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17-Jan-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio: move clk_enable/disable out of tmio_mmc_host_probe() The clock is enabled in the tmio_mmc_host_probe(). It also prevents drivers from performing platform-specific settings before mmc_add_host() because the register access generally requires a clock. Enable/disable the clock in drivers' probe/remove. Also, I passed tmio_mmc_data to tmio_mmc_host_alloc() because renesas_sdhi_clk_enable() needs it to get the private data from tmio_mmc_host. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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8d09a133 |
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17-Jan-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio: ioremap memory resource in tmio_mmc_host_alloc() The register region is ioremap'ed in the tmio_mmc_host_probe(), i.e. drivers cannot get access to the hardware before mmc_add_host(). Actually, renesas_sdhi_core.c reads out the CTL_VERSION register to complete the platform-specific settings. However, at this point, the MMC host is already running. Move the register ioremap to tmio_mmc_host_alloc() so that drivers can perform platform-specific settings between tmio_mmc_host_alloc() and tmio_mmc_host_probe(). I changed tmio_mmc_host_alloc() to return an error pointer to propagate the return code from devm_ioremap_resource(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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852d258f |
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24-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio,renesas_sdhi: move ssc_tappos to renesas_sdhi.h struct tmio_mmc_host has "scc_tappos", but in fact, it is Renesas private data. Move it to renesas_sdhi.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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058db286 |
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24-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio, renesas_sdhi: move struct tmio_mmc_dma to renesas_sdhi.h struct tmio_mmc_dma looks like TMIO core data, but in fact, Renesas private data. Move it to renesas_sdhi.h (probably, it is better to rename it to renesas_sdhi_dma, or squash it into struct renesas_sdhi). I also moved struct renesas_sdhi and host_to_priv() to that header because they are necessary to convert the tmio_mmc_host pointer into the renesas_sdhi pointer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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2aaa3c51 |
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24-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio, renesas_sdhi: set mmc_host_ops hooks directly Drivers can set any mmc_host_ops hooks between tmio_mmc_host_alloc() and tmio_mmc_host_probe(). Remove duplicated hooks in tmio_mmc_host. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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a3b05373 |
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24-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: tmio: set tmio_mmc_host to driver data The remove, suspend, resume hooks need to get tmio_mmc_host. It is tedious to call mmc_priv() to convert mmc_host to tmio_mmc_host. We can directly set tmio_mmc_host to driver data. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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4ce62817 |
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24-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mmc: renesas_sdhi: remove eprobe jump label "goto eprobe" does nothing. Return directly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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967a6a07 |
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12-Dec-2017 |
Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> |
mmc: renesas_sdhi: Add MODULE_LICENSE The following error occurs when loading renesas_sdhi_core.c module, so add MODULE_LICENSE("GPL v2"). renesas_sdhi_core: module license 'unspecified' taints kernel. Signed-off-by: Masaharu Hayakawa <masaharu.hayakawa.ry@renesas.com> Fixes: 9d08428afb72 ("mmc: renesas-sdhi: make renesas_sdhi_sys_dmac main module file") Cc: <stable@vger.kernel.org> # v4.13+ [Shimoda: Added Fixes tag and Cc to the stable ML] Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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41279f01 |
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09-Aug-2017 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: sdhi: use maximum width for the sdbuf register Make use of the 64 bit sdbuf width on Renesas R-Car Gen3. If the registers are 8 byte apart, the width is also 64 bit. For all others, the width is 32 bit, even if the registers are only 16 bit apart. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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c7825151 |
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09-Aug-2017 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: document version of RZ/A1 instance We don't use this new define yet, but it is helpful to document which versions we know of. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Chris Brandt <Chris.Brandt@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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5124b592 |
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09-Aug-2017 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi: use extra flag for CBSY usage There is one SDHI instance on Gen2 which does not have the CBSY bit. So, turn CBSY usage into an extra flag and set it accordingly. This has the additional advantage that we can also set it for other incarnations later. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Chris Brandt <Chris.Brandt@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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4dc48a95 |
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28-Jun-2017 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: renesas_sdhi_core: on R-Car 2+, make use of CBSY bit Most registers need to wait until the command is completed, not necessarily until the bus is free. At least, R-Car 2+ SoCs can signal that via the CBSY bit, so let's use it there instead of SCLKDIVEN to save a little bit of delay. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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5af02d32 |
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29-Jun-2017 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: tmio: no magic values when enabling DMA Use a proper define. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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603aa14d |
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21-Jun-2017 |
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> |
mmc: tmio, renesas-sdhi: add max_{segs, blk_count} to tmio_mmc_data Allow TMIO and SDHI driver implementations to provide values for max_segs and max_blk_count. A follow-up patch will set these values for Renesas Gen3 SoCs the using an SDHI driver. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Ai Kyuse <ai.kyuse.uw@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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2fe35968 |
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16-Jun-2017 |
Simon Horman <horms+renesas@verge.net.au> |
mmc: renesas-sdhi: improve checkpatch cleanness Trivial updates to improve checkpatch cleanness. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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87317c4d |
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30-May-2017 |
Simon Horman <horms+renesas@verge.net.au> |
mmc: tmio, renesas-sdhi: update Renesas related copyrights Update copyrights to reflect work by Wolfram Sang and myself since last year. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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d63c2bf4 |
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28-May-2017 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
mmc: use proper name for the R-Car SoC It is 'R-Car', not 'RCar'. No code or binding changes, only descriptive text. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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9d08428a |
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10-May-2017 |
Simon Horman <horms+renesas@verge.net.au> |
mmc: renesas-sdhi: make renesas_sdhi_sys_dmac main module file Make renesas_sdhi_sys_dmac.c a top-level module file that makes use of library code supplied by renesas_sdhi_core.c This is in order to facilitate adding other variants of SDHI; in particular SDHI using different DMA controllers. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> [Arnd: Fixed module build error] Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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b5b6a5f4 |
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10-May-2017 |
Simon Horman <horms+renesas@verge.net.au> |
mmc: renesas-sdhi: rename sh_mobile_sdhi.c => renesas_sdhi_core.c Rename the source file SDHI. A follow-up patch will make it a library file used by a different top-level module file. The name "renesas" is chosen as the SDHI driver is applicable to a wider range of SoCs than SH-Mobile it seems to be a more appropriate name. However, the SDHI driver source itself, is left as sh_mobile_sdhi to avoid unnecessary churn. the name "core" was chosen to reflect the desired role of this file, to provide core functionality to the sdhi driver. A follow-up patch will move the file into that role. Internal symbols have also been renamed to reflect the filename change. The .name member of struct platform_driver and parameter to MODULE_ALIAS() have not been changed in order to avoid the complication of potentially breaking SH SoCs which still use platform drivers. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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