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01f71e73 |
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12-Jul-2023 |
Mark Brown <broonie@kernel.org> |
mfd: cs47l24: Update to use maple tree register cache The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs47l24 driver to use the more modern data structure. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230713-mfd-cirrus-maple-v1-2-16dacae402a8@kernel.org Signed-off-by: Lee Jones <lee@kernel.org>
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d2912cb1 |
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04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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b7c50053 |
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13-Sep-2016 |
Praveen Kumar Vegivada <praveen.vegivada@cirrus.com> |
mfd: arizona: Mark AIFx_TX_BCLK_RATE as readable for cs47l24 This register is used in the AIF code but is missing from the register tables. Signed-off-by: Praveen Kumar Vegivada <praveen.vegivada@cirrus.com> Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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21aca3bf |
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09-Feb-2016 |
Charles Keepax <ckeepax@opensource.wolfsonmicro.com> |
mfd: cs47l24: Fix defaults array based on testing My automated test is back and now can check defaults against the actual hardware. This patch updates the defaults array for the differences detected and removes a couple of completely unused registers. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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ea1f3339 |
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03-Nov-2015 |
Richard Fitzgerald <rf@opensource.wolfsonmicro.com> |
mfd: arizona: Support Cirrus Logic CS47L24 and WM1831 This patch adds the regmap configuration tables and core MFD handling for the CS47L24 and WM1831 codecs. Note that compared to the other Arizona codecs, these devices do not have an LDO1 or micsupp regulators, extcon driver, or the DCVDD isolation control. Signed-off-by: Richard Fitzgerald <rf@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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