#
b42a905b |
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16-Feb-2024 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
iommu: constify of_phandle_args in xlate The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240216144027.185959-2-krzysztof.kozlowski@linaro.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
f7da9c08 |
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01-Sep-2023 |
Jinjie Ruan <ruanjinjie@huawei.com> |
iommu/tegra-smmu: Drop unnecessary error check for for debugfs_create_dir() The debugfs_create_dir() function returns error pointers. It never returns NULL. As Baolu suggested, this patch removes the error checking for debugfs_create_dir in tegra-smmu.c. This is because the DebugFS kernel API is developed in a way that the caller can safely ignore the errors that occur during the creation of DebugFS nodes. The debugfs APIs have a IS_ERR() judge in start_creating() which can handle it gracefully. So these checks are unnecessary. Fixes: d1313e7896e9 ("iommu/tegra-smmu: Add debugfs support") Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Suggested-by: Baolu Lu <baolu.lu@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20230901073056.1364755-1-ruanjinjie@huawei.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
39f823df |
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12-Sep-2023 |
Robin Murphy <robin.murphy@arm.com> |
iommu/tegra-smmu: Update to {map,unmap}_pages Trivially update map/unmap to the new interface, which is quite happy for drivers to still process just one page per call. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/338c520ed947d6d5b9d0509ccb4588908bd9ce1e.1694525662.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
3529375e |
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13-Sep-2023 |
Jason Gunthorpe <jgg@ziepe.ca> |
iommu: Convert simple drivers with DOMAIN_DMA to domain_alloc_paging() These drivers are all trivially converted since the function is only called if the domain type is going to be IOMMU_DOMAIN_UNMANAGED/DMA. Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Steven Price <steven.price@arm.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Tested-by: Yong Wu <yong.wu@mediatek.com> #For mtk_iommu.c Link: https://lore.kernel.org/r/23-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
f128094f |
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13-Sep-2023 |
Jason Gunthorpe <jgg@ziepe.ca> |
iommu/tegra-smmu: Support DMA domains in tegra All ARM64 iommu drivers should support IOMMU_DOMAIN_DMA to enable dma-iommu.c. tegra is blocking dma-iommu usage, and also default_domain's, because it wants an identity translation. This is needed for some device quirk. The correct way to do this is to support IDENTITY domains and use ops->def_domain_type() to return IOMMU_DOMAIN_IDENTITY for only the quirky devices. Add support for IOMMU_DOMAIN_DMA and force IOMMU_DOMAIN_IDENTITY mode for everything so no behavior changes. Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/12-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
c8cc2655 |
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13-Sep-2023 |
Jason Gunthorpe <jgg@ziepe.ca> |
iommu/tegra-smmu: Implement an IDENTITY domain What tegra-smmu does during tegra_smmu_set_platform_dma() is actually putting the iommu into identity mode. Move to the new core support for ARM_DMA_USE_IOMMU by defining ops->identity_domain. Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/11-v8-81230027b2fa+9d-iommu_all_defdom_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
d477f603 |
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14-Jul-2023 |
Rob Herring <robh@kernel.org> |
iommu: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20230714174640.4058404-1-robh@kernel.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
2973d822 |
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13-Jan-2023 |
NeilBrown <neilb@suse.de> |
mm: discard __GFP_ATOMIC __GFP_ATOMIC serves little purpose. Its main effect is to set ALLOC_HARDER which adds a few little boosts to increase the chance of an allocation succeeding, one of which is to lower the water-mark at which it will succeed. It is *always* paired with __GFP_HIGH which sets ALLOC_HIGH which also adjusts this watermark. It is probable that other users of __GFP_HIGH should benefit from the other little bonuses that __GFP_ATOMIC gets. __GFP_ATOMIC also gives a warning if used with __GFP_DIRECT_RECLAIM. There is little point to this. We already get a might_sleep() warning if __GFP_DIRECT_RECLAIM is set. __GFP_ATOMIC allows the "watermark_boost" to be side-stepped. It is probable that testing ALLOC_HARDER is a better fit here. __GFP_ATOMIC is used by tegra-smmu.c to check if the allocation might sleep. This should test __GFP_DIRECT_RECLAIM instead. This patch: - removes __GFP_ATOMIC - allows __GFP_HIGH allocations to ignore watermark boosting as well as GFP_ATOMIC requests. - makes other adjustments as suggested by the above. The net result is not change to GFP_ATOMIC allocations. Other allocations that use __GFP_HIGH will benefit from a few different extra privileges. This affects: xen, dm, md, ntfs3 the vermillion frame buffer hibernation ksm swap all of which likely produce more benefit than cost if these selected allocation are more likely to succeed quickly. [mgorman: Minor adjustments to rework on top of a series] Link: https://lkml.kernel.org/r/163712397076.13692.4727608274002939094@noble.neil.brown.name Link: https://lkml.kernel.org/r/20230113111217.14134-7-mgorman@techsingularity.net Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: Mel Gorman <mgorman@techsingularity.net> Acked-by: Vlastimil Babka <vbabka@suse.cz> Acked-by: Michal Hocko <mhocko@suse.com> Cc: Matthew Wilcox <willy@infradead.org> Cc: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
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#
c1fe9119 |
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09-Jan-2023 |
Lu Baolu <baolu.lu@linux.intel.com> |
iommu: Add set_platform_dma_ops callbacks For those IOMMU drivers that don't provide default domain support, add an implementation of set_platform_dma_ops callback so that the IOMMU core could return the DMA control to platform DMA ops. At the same time, with the set_platform_dma_ops implemented, there is no need for detach_dev. Remove it to avoid dead code. Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20230110025408.667767-4-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
48a7c508 |
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15-Aug-2022 |
Robin Murphy <robin.murphy@arm.com> |
iommu/tegra-smmu: Clean up bus_set_iommu() Stop calling bus_set_iommu() since it's now unnecessary, and simplify the probe failure path accordingly. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/13bb6baa6c4d74e95a12529e4eb1ddfb3885c3b5.1660572783.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
b321a2fb |
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21-Jun-2022 |
Robin Murphy <robin.murphy@arm.com> |
iommu: Make .release_device optional Many drivers do nothing meaningful for .release_device, and it's neatly abstracted to just two callsites in the core code, so let's make it optional to implement. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/bda9d3eb4527eac8f6544a15067e2529cca54a2e.1655822151.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
9a630a4b |
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15-Feb-2022 |
Lu Baolu <baolu.lu@linux.intel.com> |
iommu: Split struct iommu_ops Move the domain specific operations out of struct iommu_ops into a new structure that only has domain specific operations. This solves the problem of needing to know if the method vector for a given operation needs to be retrieved from the device or the domain. Logically the domain ops are the ones that make sense for external subsystems and endpoint drivers to use, while device ops, with the sole exception of domain_alloc, are IOMMU API internals. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20220216025249.3459465-10-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
114a6f50 |
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09-Feb-2022 |
Robin Murphy <robin.murphy@arm.com> |
iommu: Remove trivial ops->capable implementations Implementing ops->capable to always return false is pointless since it's the default behaviour anyway. Clean up the unnecessary implementations. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/8413578c6f8a7cf75530b00cba8f10f5b88f8517.1644495614.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
9826e393 |
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07-Jan-2022 |
Miaoqian Lin <linmq006@gmail.com> |
iommu/tegra-smmu: Fix missing put_device() call in tegra_smmu_find The reference taken by 'of_find_device_by_node()' must be released when not needed anymore. Add the corresponding 'put_device()' in the error handling path. Fixes: 765a9d1d02b2 ("iommu/tegra-smmu: Fix mc errors on tegra124-nyan") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220107080915.12686-1-linmq006@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
89374244 |
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26-Sep-2021 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
iommu/tegra-smmu: Use devm_bitmap_zalloc when applicable 'smmu->asids' is a bitmap. So use 'devm_kzalloc()' to simplify code, improve the semantic of the code and avoid some open-coded arithmetic in allocator arguments. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/2c0f4da80c3b5ef83299c651f69a563034c1c6cb.1632661557.git.christophe.jaillet@wanadoo.fr Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
4f1ac76e |
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02-Jun-2021 |
Thierry Reding <treding@nvidia.com> |
memory: tegra: Consolidate register fields Subsequent patches will add more register fields to the tegra_mc_client structure, so consolidate all register field definitions into a common sub-structure for coherency. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210602163302.120041-2-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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#
2d471b20 |
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01-Apr-2021 |
Robin Murphy <robin.murphy@arm.com> |
iommu: Streamline registration interface Rather than have separate opaque setter functions that are easy to overlook and lead to repetitive boilerplate in drivers, let's pass the relevant initialisation parameters directly to iommu_device_register(). Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/ab001b87c533b6f4db71eb90db6f888953986c36.1617285386.git.robin.murphy@arm.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
8dfd0fa6 |
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12-Mar-2021 |
Dmitry Osipenko <digetx@gmail.com> |
iommu/tegra-smmu: Make tegra_smmu_probe_device() to handle all IOMMU phandles The tegra_smmu_probe_device() handles only the first IOMMU device-tree phandle, skipping the rest. Devices like 3D module on Tegra30 have multiple IOMMU phandles, one for each h/w block, and thus, only one IOMMU phandle is added to fwspec for the 3D module, breaking GPU. Previously this problem was masked by tegra_smmu_attach_dev() which didn't use the fwspec, but parsed the DT by itself. The previous commit to tegra-smmu driver partially reverted changes that caused problems for T124 and now we have tegra_smmu_attach_dev() that uses the fwspec and the old-buggy variant of tegra_smmu_probe_device() which skips secondary IOMMUs. Make tegra_smmu_probe_device() not to skip the secondary IOMMUs. This fixes a partially attached IOMMU of the 3D module on Tegra30 and now GPU works properly once again. Fixes: 765a9d1d02b2 ("iommu/tegra-smmu: Fix mc errors on tegra124-nyan") Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Nicolin Chen <nicoleotsuka@gmail.com> Link: https://lore.kernel.org/r/20210312155439.18477-1-digetx@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
765a9d1d |
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18-Feb-2021 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Fix mc errors on tegra124-nyan Commit 25938c73cd79 ("iommu/tegra-smmu: Rework tegra_smmu_probe_device()") removed certain hack in the tegra_smmu_probe() by relying on IOMMU core to of_xlate SMMU's SID per device, so as to get rid of tegra_smmu_find() and tegra_smmu_configure() that are typically done in the IOMMU core also. This approach works for both existing devices that have DT nodes and other devices (like PCI device) that don't exist in DT, on Tegra210 and Tegra3 upon testing. However, Page Fault errors are reported on tegra124-Nyan: tegra-mc 70019000.memory-controller: display0a: read @0xfe056b40: EMEM address decode error (SMMU translation error [--S]) tegra-mc 70019000.memory-controller: display0a: read @0xfe056b40: Page fault (SMMU translation error [--S]) After debugging, I found that the mentioned commit changed some function callback sequence of tegra-smmu's, resulting in enabling SMMU for display client before display driver gets initialized. I couldn't reproduce exact same issue on Tegra210 as Tegra124 (arm-32) differs at arch-level code. Actually this Page Fault is a known issue, as on most of Tegra platforms, display gets enabled by the bootloader for the splash screen feature, so it keeps filling the framebuffer memory. A proper fix to this issue is to 1:1 linear map the framebuffer memory to IOVA space so the SMMU will have the same address as the physical address in its page table. Yet, Thierry has been working on the solution above for a year, and it hasn't merged. Therefore, let's partially revert the mentioned commit to fix the errors. The reason why we do a partial revert here is that we can still set priv in ->of_xlate() callback for PCI devices. Meanwhile, devices existing in DT, like display, will go through tegra_smmu_configure() at the stage of bus_set_iommu() when SMMU gets probed(), as what it did before we merged the mentioned commit. Once we have the linear map solution for framebuffer memory, this change can be cleaned away. [Big thank to Guillaume who reported and helped debugging/verification] Fixes: 25938c73cd79 ("iommu/tegra-smmu: Rework tegra_smmu_probe_device()") Reported-by: Guillaume Tucker <guillaume.tucker@collabora.com> Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Tested-by: Guillaume Tucker <guillaume.tucker@collabora.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210218220702.1962-1-nicoleotsuka@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
541f29bb |
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25-Nov-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Add PCI support This patch simply adds support for PCI devices. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20201125101013.14953-6-nicoleotsuka@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
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#
25938c73 |
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25-Nov-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Rework tegra_smmu_probe_device() The bus_set_iommu() in tegra_smmu_probe() enumerates all clients to call in tegra_smmu_probe_device() where each client searches its DT node for smmu pointer and swgroup ID, so as to configure an fwspec. But this requires a valid smmu pointer even before mc and smmu drivers are probed. So in tegra_smmu_probe() we added a line of code to fill mc->smmu, marking "a bit of a hack". This works for most of clients in the DTB, however, doesn't work for a client that doesn't exist in DTB, a PCI device for example. Actually, if we return ERR_PTR(-ENODEV) in ->probe_device() when it's called from bus_set_iommu(), iommu core will let everything carry on. Then when a client gets probed, of_iommu_configure() in iommu core will search DTB for swgroup ID and call ->of_xlate() to prepare an fwspec, similar to tegra_smmu_probe_device() and tegra_smmu_configure(). Then it'll call tegra_smmu_probe_device() again, and this time we shall return smmu->iommu pointer properly. So we can get rid of tegra_smmu_find() and tegra_smmu_configure() along with DT polling code by letting the iommu core handle every thing, except a problem that we search iommus property in DTB not only for swgroup ID but also for mc node to get mc->smmu pointer to call dev_iommu_priv_set() and return the smmu->iommu pointer. So we'll need to find another way to get smmu pointer. Referencing the implementation of sun50i-iommu driver, of_xlate() has client's dev pointer, mc node and swgroup ID. This means that we can call dev_iommu_priv_set() in of_xlate() instead, so we can simply get smmu pointer in ->probe_device(). This patch reworks tegra_smmu_probe_device() by: 1) Removing mc->smmu hack in tegra_smmu_probe() so as to return ERR_PTR(-ENODEV) in tegra_smmu_probe_device() during stage of tegra_smmu_probe/tegra_mc_probe(). 2) Moving dev_iommu_priv_set() to of_xlate() so we can get smmu pointer in tegra_smmu_probe_device() to replace DTB polling. 3) Removing tegra_smmu_configure() accordingly since iommu core takes care of it. This also fixes a problem that previously we could add clients to iommu groups before iommu core initializes its default domain: ubuntu@jetson:~$ dmesg | grep iommu platform 50000000.host1x: Adding to iommu group 1 platform 57000000.gpu: Adding to iommu group 2 iommu: Default domain type: Translated platform 54200000.dc: Adding to iommu group 3 platform 54240000.dc: Adding to iommu group 3 platform 54340000.vic: Adding to iommu group 4 Though it works fine with IOMMU_DOMAIN_UNMANAGED, but will have warnings if switching to IOMMU_DOMAIN_DMA: iommu: Failed to allocate default IOMMU domain of type 0 for group (null) - Falling back to IOMMU_DOMAIN_DMA iommu: Failed to allocate default IOMMU domain of type 0 for group (null) - Falling back to IOMMU_DOMAIN_DMA Now, bypassing the first probe_device() call from bus_set_iommu() fixes the sequence: ubuntu@jetson:~$ dmesg | grep iommu iommu: Default domain type: Translated tegra-host1x 50000000.host1x: Adding to iommu group 0 tegra-dc 54200000.dc: Adding to iommu group 1 tegra-dc 54240000.dc: Adding to iommu group 1 tegra-vic 54340000.vic: Adding to iommu group 2 nouveau 57000000.gpu: Adding to iommu group 3 Note that dmesg log above is testing with IOMMU_DOMAIN_UNMANAGED. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20201125101013.14953-5-nicoleotsuka@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
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#
8750d207 |
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25-Nov-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Use fwspec in tegra_smmu_(de)attach_dev In tegra_smmu_(de)attach_dev() functions, we poll DTB for each client's iommus property to get swgroup ID in order to prepare "as" and enable smmu. Actually tegra_smmu_configure() prepared an fwspec for each client, and added to the fwspec all swgroup IDs of client DT node in DTB. So this patch uses fwspec in tegra_smmu_(de)attach_dev() so as to replace the redundant DT polling code. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20201125101013.14953-4-nicoleotsuka@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
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#
d5f583bf |
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25-Nov-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Expand mutex protection range This is used to protect potential race condition at use_count. since probes of client drivers, calling attach_dev(), may run concurrently. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20201125101013.14953-3-nicoleotsuka@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
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#
cf910f61 |
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25-Nov-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Unwrap tegra_smmu_group_get The tegra_smmu_group_get was added to group devices in different SWGROUPs and it'd return a NULL group pointer upon a mismatch at tegra_smmu_find_group(), so for most of clients/devices, it very likely would mismatch and need a fallback generic_device_group(). But now tegra_smmu_group_get handles devices in same SWGROUP too, which means that it would allocate a group for every new SWGROUP or would directly return an existing one upon matching a SWGROUP, i.e. any device will go through this function. So possibility of having a NULL group pointer in device_group() is upon failure of either devm_kzalloc() or iommu_group_alloc(). In either case, calling generic_device_group() no longer makes a sense. Especially for devm_kzalloc() failing case, it'd cause a problem if it fails at devm_kzalloc() yet succeeds at a fallback generic_device_group(), because it does not create a group->list for other devices to match. This patch simply unwraps the function to clean it up. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20201125101013.14953-2-nicoleotsuka@gmail.com Signed-off-by: Will Deacon <will@kernel.org>
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21d3c040 |
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11-Sep-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Allow to group clients in same swgroup There can be clients using the same swgroup in DT, for example i2c0 and i2c1. The current driver will add them to separate IOMMU groups, though it has implemented device_group() callback which is to group devices using different swgroups like DC and DCB. All clients having the same swgroup should be also added to the same IOMMU group so as to share an asid. Otherwise, the asid register may get overwritten every time a new device is attached. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200911071643.17212-4-nicoleotsuka@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
4fba9885 |
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11-Sep-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Fix iova->phys translation IOVA might not be always 4KB aligned. So tegra_smmu_iova_to_phys function needs to add on the lower 12-bit offset from input iova. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200911071643.17212-3-nicoleotsuka@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
82fa58e8 |
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11-Sep-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Do not use PAGE_SHIFT and PAGE_MASK PAGE_SHIFT and PAGE_MASK are defined corresponding to the page size for CPU virtual addresses, which means PAGE_SHIFT could be a number other than 12, but tegra-smmu maintains fixed 4KB IOVA pages and has fixed [21:12] bit range for PTE entries. So this patch replaces all PAGE_SHIFT/PAGE_MASK references with the macros defined with SMMU_PTE_SHIFT. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200911071643.17212-2-nicoleotsuka@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
d5c152c3 |
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17-Sep-2020 |
Nicolin Chen <nicoleotsuka@gmail.com> |
iommu/tegra-smmu: Fix tlb_mask The "num_tlb_lines" might not be a power-of-2 value, being 48 on Tegra210 for example. So the current way of calculating tlb_mask using the num_tlb_lines is not correct: tlb_mask=0x5f in case of num_tlb_lines=48, which will trim a setting of 0x30 (48) to 0x10. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200917113155.13438-2-nicoleotsuka@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
404d0b30 |
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01-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
iommu/tegra-smmu: Add locking around mapping operations The mapping operations of the Tegra SMMU driver are subjected to a race condition issues because SMMU Address Space isn't allocated and freed atomically, while it should be. This patch makes the mapping operations atomic, it fixes an accidentally released Host1x Address Space problem which happens while running multiple graphics tests in parallel on Tegra30, i.e. by having multiple threads racing with each other in the Host1x's submission and completion code paths, performing IOVA mappings and unmappings in parallel. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200901203730.27865-1-digetx@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
1ea5440e |
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06-Aug-2020 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra-smmu: Prune IOMMU group when it is released In order to share groups between multiple devices we keep track of them in a per-SMMU list. When an IOMMU group is released, a dangling pointer to it stays around in that list. Fix this by implementing an IOMMU data release callback for groups where the dangling pointer can be removed. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200806155404.3936074-4-thierry.reding@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
5b30fbfa |
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06-Aug-2020 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra-smmu: Balance IOMMU group reference count For groups that are shared between multiple devices, care must be taken to acquire a reference for each device, otherwise the IOMMU core ends up dropping the last reference too early, which will cause the group to be released while consumers may still be thinking that they're holding a reference to it. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200806155404.3936074-3-thierry.reding@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
00295702 |
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06-Aug-2020 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra-smmu: Set IOMMU group name Set the name of static IOMMU groups to help with debugging. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200806155404.3936074-2-thierry.reding@gmail.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
a5616e24 |
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25-Jun-2020 |
Joerg Roedel <jroedel@suse.de> |
iommu/tegra: Use dev_iommu_priv_get/set() Remove the use of dev->archdata.iommu and use the private per-device pointer provided by IOMMU core code instead. Signed-off-by: Joerg Roedel <jroedel@suse.de> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Link: https://lore.kernel.org/r/20200625130836.1916-7-joro@8bytes.org
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#
b287ba73 |
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29-Apr-2020 |
Joerg Roedel <jroedel@suse.de> |
iommu/tegra: Convert to probe/release_device() call-backs Convert the Tegra IOMMU drivers to use the probe_device() and release_device() call-backs of iommu_ops, so that the iommu core code does the group and sysfs setup. Signed-off-by: Joerg Roedel <jroedel@suse.de> Link: https://lore.kernel.org/r/20200429133712.31431-27-joro@8bytes.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
96d3ab80 |
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16-Oct-2019 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra-smmu: Fix page tables in > 4 GiB memory Page tables that reside in physical memory beyond the 4 GiB boundary are currently not working properly. The reason is that when the physical address for page directory entries is read, it gets truncated at 32 bits and can cause crashes when passing that address to the DMA API. Fix this by first casting the PDE value to a dma_addr_t and then using the page frame number mask for the SMMU instance to mask out the invalid bits, which are typically used for mapping attributes, etc. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
e31e5929 |
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16-Oct-2019 |
Navneet Kumar <navneetk@nvidia.com> |
iommu/tegra-smmu: Fix client enablement order Enable clients' translation only after setting up the swgroups. Signed-off-by: Navneet Kumar <navneetk@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
446152d5 |
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16-Oct-2019 |
Navneet Kumar <navneetk@nvidia.com> |
iommu/tegra-smmu: Use non-secure register for flushing Use PTB_ASID instead of SMMU_CONFIG to flush smmu. PTB_ASID can be accessed from non-secure mode, SMMU_CONFIG cannot be. Using SMMU_CONFIG could pose a problem when kernel doesn't have secure mode access enabled from boot. Signed-off-by: Navneet Kumar <navneetk@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
781ca2de |
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08-Sep-2019 |
Tom Murphy <murphyt7@tcd.ie> |
iommu: Add gfp parameter to iommu_ops::map Add a gfp_t parameter to the iommu_ops::map function. Remove the needless locking in the AMD iommu driver. The iommu_ops::map function (or the iommu_map function which calls it) was always supposed to be sleepable (according to Joerg's comment in this thread: https://lore.kernel.org/patchwork/patch/977520/ ) and so should probably have had a "might_sleep()" since it was written. However currently the dma-iommu api can call iommu_map in an atomic context, which it shouldn't do. This doesn't cause any problems because any iommu driver which uses the dma-iommu api uses gfp_atomic in it's iommu_ops::map function. But doing this wastes the memory allocators atomic pools. Signed-off-by: Tom Murphy <murphyt7@tcd.ie> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
56f8af5e |
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02-Jul-2019 |
Will Deacon <will@kernel.org> |
iommu: Pass struct iommu_iotlb_gather to ->unmap() and ->iotlb_sync() To allow IOMMU drivers to batch up TLB flushing operations and postpone them until ->iotlb_sync() is called, extend the prototypes for the ->unmap() and ->iotlb_sync() IOMMU ops callbacks to take a pointer to the current iommu_iotlb_gather structure. All affected IOMMU drivers are updated, but there should be no functional change since the extra parameter is ignored for now. Signed-off-by: Will Deacon <will@kernel.org>
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#
d2912cb1 |
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04-Jun-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
43d957b1 |
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06-Mar-2019 |
Dmitry Osipenko <digetx@gmail.com> |
iommu/tegra-smmu: Respect IOMMU API read-write protections Set PTE read/write attributes accordingly to the the protections requested by IOMMU API. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
4f97031f |
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06-Mar-2019 |
Dmitry Osipenko <digetx@gmail.com> |
iommu/tegra-smmu: Properly release domain resources Release all memory allocations associated with a released domain and emit warning if domain is in-use at the time of destruction. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
43a0541e |
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06-Mar-2019 |
Dmitry Osipenko <digetx@gmail.com> |
iommu/tegra-smmu: Fix invalid ASID bits on Tegra30/114 Both Tegra30 and Tegra114 have 4 ASID's and the corresponding bitfield of the TLB_FLUSH register differs from later Tegra generations that have 128 ASID's. In a result the PTE's are now flushed correctly from TLB and this fixes problems with graphics (randomly failing tests) on Tegra30. Cc: stable <stable@vger.kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
568ece5b |
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12-Dec-2018 |
Dmitry Osipenko <digetx@gmail.com> |
memory: tegra: Do not try to probe SMMU on Tegra20 Tegra20 doesn't have SMMU. Move out checking of the SMMU presence from the SMMU driver into the Memory Controller driver. This change makes code consistent in regards to how GART/SMMU presence checking is performed. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
db5d6a70 |
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29-Nov-2018 |
Joerg Roedel <jroedel@suse.de> |
iommu/tegra: Use helper functions to access dev->iommu_fwspec Use the new helpers dev_iommu_fwspec_get()/set() to access the dev->iommu_fwspec pointer. This makes it easier to move that pointer later into another struct. Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
062e52a5 |
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22-Nov-2018 |
Yangtao Li <tiny.windzz@gmail.com> |
iommu/tegra: Change to use DEFINE_SHOW_ATTRIBUTE macro Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <tiny.windzz@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
d88e61fa |
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30-Jul-2018 |
Christoph Hellwig <hch@lst.de> |
iommu: Remove the ->map_sg indirection All iommu drivers use the default_iommu_map_sg implementation, and there is no good reason to ever override it. Just expose it as iommu_map_sg directly and remove the indirection, specially in our post-spectre world where indirect calls are horribly expensive. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
83476bfa |
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19-Dec-2017 |
Wei Yongjun <weiyongjun1@huawei.com> |
iommu/tegra-smmu: Fix return value check in tegra_smmu_group_get() In case of error, the function iommu_group_alloc() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: 7f4c9176f760 ("iommu/tegra: Allow devices to be grouped") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
7f4c9176 |
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12-Oct-2017 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra: Allow devices to be grouped Implement the ->device_group() and ->of_xlate() callbacks which are used in order to group devices. Each group can then share a single domain. This is implemented primarily in order to achieve the same semantics on Tegra210 and earlier as on Tegra186 where the Tegra SMMU was replaced by an ARM SMMU. Users of the IOMMU API can now use the same code to share domains between devices, whereas previously they used to attach each device individually. Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
96302d89 |
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30-Aug-2017 |
Joerg Roedel <jroedel@suse.de> |
arm/tegra: Call bus_set_iommu() after iommu_device_register() The bus_set_iommu() function will call the add_device() call-back which needs the iommu to be registered. Reported-by: Jon Hunter <jonathanh@nvidia.com> Fixes: 0b480e447006 ('iommu/tegra: Add support for struct iommu_device') Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
0b480e44 |
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09-Aug-2017 |
Joerg Roedel <jroedel@suse.de> |
iommu/tegra: Add support for struct iommu_device Add a struct iommu_device to each tegra-smmu and register it with the iommu-core. Also link devices added to the driver to their respective hardware iommus. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
d92e1f84 |
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21-Jul-2017 |
Robin Murphy <robin.murphy@arm.com> |
iommu/tegra-smmu: Add iommu_group support As the last step to making groups mandatory, clean up the remaining drivers by adding basic support. Whilst it may not perfectly reflect the isolation capabilities of the hardware (tegra_smmu_swgroup sounds suspiciously like something that might warrant representing at the iommu_group level), using generic_device_group() should at least maintain existing behaviour with respect to the API. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
461a6946 |
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26-Apr-2017 |
Joerg Roedel <jroedel@suse.de> |
iommu: Remove pci.h include from trace/events/iommu.h The include file does not need any PCI specifics, so remove that include. Also fix the places that relied on it. Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
11cec15b |
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06-Aug-2015 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra-smmu: Parameterize number of TLB lines The number of TLB lines was increased from 16 on Tegra30 to 32 on Tegra114 and later. Parameterize the value so that the initial default can be set accordingly. On Tegra30, initializing the value to 32 would effectively disable the TLB and hence cause massive latencies for memory accesses translated through the SMMU. This is especially noticeable for isochronuous clients such as display, whose FIFOs would continuously underrun. Fixes: 891846516317 ("memory: Add NVIDIA Tegra memory controller support") Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
4080e99b |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Factor out tegra_smmu_set_pde() This code is used both when creating a new page directory entry and when tearing it down, with only the PDE value changing between both cases. Factor the code out so that it can be reused. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [treding@nvidia.com: make commit message more accurate] Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
7ffc6f06 |
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06-Aug-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Extract tegra_smmu_pte_get_use() Extract the use count reference accounting into a separate function and separate it from allocating the PTE. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [treding@nvidia.com: extract and write commit message] Signed-off-by: Thierry Reding <treding@nvidia.com>
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707917cb |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Use __GFP_ZERO to allocate zeroed pages Rather than explicitly zeroing pages allocated via alloc_page(), add __GFP_ZERO to the gfp mask to ask the allocator for zeroed pages. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
05a65f06 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Remove PageReserved manipulation Remove the unnecessary manipulation of the PageReserved flags in the Tegra SMMU driver. None of this is required as the page(s) remain private to the SMMU driver. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
e3c97196 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Convert to use DMA API Use the DMA API instead of calling architecture internal functions in the Tegra SMMU driver. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
d62c7a88 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: smmu_flush_ptc() wants device addresses Pass smmu_flush_ptc() the device address rather than struct page pointer. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
b8fe0382 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Split smmu_flush_ptc() smmu_flush_ptc() is used in two modes: one is to flush an individual entry, the other is to flush all entries. We know at the call site which we require. Split the function into smmu_flush_ptc_all() and smmu_flush_ptc(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
4b3c7d10 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Move flush_dcache to tegra-smmu.c Drivers should not be using __cpuc_* functions nor outer_cache_flush() directly. This change partly cleans up tegra-smmu.c. The only difference between cache handling of the tegra variants is Denver, which omits the call to outer_cache_flush(). This is due to Denver being an ARM64 CPU, and the ARM64 architecture does not provide this function. (This, in itself, is a good reason why these should not be used.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [treding@nvidia.com: fix build failure on 64-bit ARM] Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
32924c76 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Use kcalloc() to allocate counter array Use kcalloc() to allocate the use-counter array for the page directory entries/page tables. Using kcalloc() allows us to be provided with zero-initialised memory from the allocators, rather than initialising it ourselves. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
853520fa |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Store struct page pointer for page tables Store the struct page pointer for the second level page tables, rather than working back from the page directory entry. This is necessary as we want to eliminate the use of physical addresses used with arch-private functions, switching instead to use the streaming DMA API. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
0b42c7c1 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Fix page table lookup in unmap/iova_to_phys methods Fix the page table lookup in the unmap and iova_to_phys methods. Neither of these methods should allocate a page table; a missing page table should be treated the same as no mapping present. More importantly, using as_get_pte() for an IOVA corresponding with a non-present page table entry increments the use-count for the page table, on the assumption that the caller of as_get_pte() is going to setup a mapping. This is an incorrect assumption. Fix both of these bugs by providing a separate helper which only looks up the page table, but never allocates it. This is akin to pte_offset() for CPU page tables. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
34d35f8c |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Add iova_pd_index() and iova_pt_index() helpers Add a pair of helpers to get the page directory and page table indexes. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
8482ee5e |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Factor out common PTE setting Factor out the common PTE setting code into a separate function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
b98e34f0 |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Fix unmap() method The Tegra SMMU unmap path has several problems: 1. as_pte_put() can perform a write-after-free 2. tegra_smmu_unmap() can perform cache maintanence on a page we have just freed. 3. when a page table is unmapped, there is no CPU cache maintanence of the write clearing the page directory entry, nor is there any maintanence of the IOMMU to ensure that it sees the page table has gone. Fix this by getting rid of as_pte_put(), and instead coding the PTE unmap separately from the PDE unmap, placing the PDE unmap after the PTE unmap has been completed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
9113785c |
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27-Jul-2015 |
Russell King <rmk+kernel@arm.linux.org.uk> |
iommu/tegra-smmu: Fix iova_to_phys() method iova_to_phys() has several problems: (a) iova_to_phys() is supposed to return 0 if there is no entry present for the iova. (b) if as_get_pte() fails, we oops the kernel by dereferencing a NULL pointer. Really, we should not even be trying to allocate a page table at all, but should only be returning the presence of the 2nd level page table. This will be fixed in a subsequent patch. Treat both of these conditions as "no mapping" conditions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
d1313e78 |
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23-Jan-2015 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra-smmu: Add debugfs support Provide clients and swgroups files in debugfs. These files show for which clients IOMMU translation is enabled and which ASID is associated with each SWGROUP. Cc: Hiroshi Doyu <hdoyu@nvidia.com> Acked-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
804cb54c |
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27-Mar-2015 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra: smmu: Compute PFN mask at runtime The SMMU on Tegra30 and Tegra114 supports addressing up to 4 GiB of physical memory. On Tegra124 the addressable physical memory was extended to 16 GiB. The page frame number stored in PTEs therefore requires 20 or 22 bits, depending on SoC generation. In order to cope with this, compute the proper value at runtime. Reported-by: Joseph Lo <josephl@nvidia.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
471d9144 |
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27-Mar-2015 |
Thierry Reding <treding@nvidia.com> |
iommu/tegra: Setup aperture Each address space in the Tegra SMMU provides 4 GiB worth of addresses. Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
d5f1a81c |
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26-Mar-2015 |
Joerg Roedel <jroedel@suse.de> |
iommu/tegra-smmu: Make use of domain_alloc and domain_free Implement domain_alloc and domain_free iommu-ops as a replacement for domain_init/domain_destroy. Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
89184651 |
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16-Apr-2014 |
Thierry Reding <treding@nvidia.com> |
memory: Add NVIDIA Tegra memory controller support The memory controller on NVIDIA Tegra exposes various knobs that can be used to tune the behaviour of the clients attached to it. Currently this driver sets up the latency allowance registers to the HW defaults. Eventually an API should be exported by this driver (via a custom API or a generic subsystem) to allow clients to register latency requirements. This driver also registers an IOMMU (SMMU) that's implemented by the memory controller. It is supported on Tegra30, Tegra114 and Tegra124 currently. Tegra20 has a GART instead. The Tegra SMMU operates on memory clients and SWGROUPs. A memory client is a unidirectional, special-purpose DMA master. A SWGROUP represents a set of memory clients that form a logical functional unit corresponding to a single device. Typically a device has two clients: one client for read transactions and one client for write transactions, but there are also devices that have only read clients, but many of them (such as the display controllers). Because there is no 1:1 relationship between memory clients and devices the driver keeps a table of memory clients and the SWGROUPs that they belong to per SoC. Note that this is an exception and due to the fact that the SMMU is tightly integrated with the rest of the Tegra SoC. The use of these tables is discouraged in drivers for generic IOMMU devices such as the ARM SMMU because the same IOMMU could be used in any number of SoCs and keeping such tables for each SoC would not scale. Acked-by: Joerg Roedel <jroedel@suse.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
315786eb |
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25-Oct-2014 |
Olav Haugan <ohaugan@codeaurora.org> |
iommu: Add iommu_map_sg() function Mapping and unmapping are more often than not in the critical path. map_sg allows IOMMU driver implementations to optimize the process of mapping buffers into the IOMMU page tables. Instead of mapping a buffer one page at a time and requiring potentially expensive TLB operations for each page, this function allows the driver to map all pages in one go and defer TLB maintenance until after all pages have been mapped. Additionally, the mapping operation would be faster in general since clients does not have to keep calling map API over and over again for each physically contiguous chunk of memory that needs to be mapped to a virtually contiguous region. Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
98b773cf |
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20-Oct-2014 |
Wolfram Sang <wsa@kernel.org> |
iommu: drop owner assignment from platform_drivers A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
d943b0ff |
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11-Sep-2014 |
Kiran Padwal <kiran.padwal@smartplayin.com> |
iommu: Make of_device_id array const Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
7c2aa644 |
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05-Sep-2014 |
Joerg Roedel <jroedel@suse.de> |
iommu/tegra: Convert to iommu_capable() API function Cc: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
306a7f91 |
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17-Jul-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Move includes to include/soc/tegra In order to not clutter the include/linux directory with SoC specific headers, move the Tegra-specific headers out into a separate directory. Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
b22f6434 |
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27-Jun-2014 |
Thierry Reding <treding@nvidia.com> |
iommu: Constify struct iommu_ops This structure is read-only data and should never be modified. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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#
a33a97c5 |
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08-Oct-2013 |
Sachin Kamat <sachin.kamat@linaro.org> |
iommu/tegra-smmu: Staticize tegra_smmu_pm_ops 'tegra_smmu_pm_ops' is used only in this file. Make it static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
e56b3dab |
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17-Sep-2013 |
Thierry Reding <thierry.reding@gmail.com> |
iommu/tegra: Print phys_addr_t using %pa When enabling LPAE on ARM, phys_addr_t becomes 64 bits wide and printing a variable of that type using a simple %x format specifier causes the compiler to complain. Change the format specifier to %pa, which is used specifically for variables of type phys_addr_t. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
946a88df |
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14-Aug-2013 |
Julia Lawall <Julia.Lawall@lip6.fr> |
tegra: simplify use of devm_ioremap_resource Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
72ca55db |
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10-Apr-2013 |
Varun Sethi <Varun.Sethi@freescale.com> |
iommu/tegra: Fix printk formats for dma_addr_t Fix printk formats for dma_addr_t: drivers/iommu/tegra-smmu.c: In function 'smmu_iommu_iova_to_phys': >> drivers/iommu/tegra-smmu.c:774:2: warning: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'dma_addr_t' [-Wformat] -- drivers/iommu/tegra-gart.c: In function 'gart_iommu_iova_to_phys': >> drivers/iommu/tegra-gart.c:298:3: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'dma_addr_t' [-Wformat] Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
bb5547ac |
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28-Mar-2013 |
Varun Sethi <Varun.Sethi@freescale.com> |
iommu/fsl: Make iova dma_addr_t in the iommu_iova_to_phys API. This is required in case of PAMU, as it can support a window size of up to 64G (even on 32bit). Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
8add862f |
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30-Jan-2013 |
Al Viro <viro@zeniv.linux.org.uk> |
tegra: don't wank with d_find_alias() Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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#
496ad9aa |
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23-Jan-2013 |
Al Viro <viro@zeniv.linux.org.uk> |
new helper: file_inode(file) Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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#
573f4145 |
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15-Feb-2013 |
Stephen Warren <swarren@nvidia.com> |
iommu/tegra: assume CONFIG_OF in SMMU driver Tegra only supports, and always enables, device tree. Remove all ifdefs for DT support from the driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
a3b7256d |
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06-Feb-2013 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Fix incorrect mask for regbase This fixes kernel crash because of BUG() in register address validation. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
fe1229b9 |
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04-Feb-2013 |
Joerg Roedel <joro@8bytes.org> |
iommu/tegra: smmu: Use helper function to check for valid register offset Do not repeat the checking loop in the read and write functions. Use a single helper function for that check and call it in both accessors. Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
a6870e92 |
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31-Jan-2013 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Support variable MMIO ranges/blocks Presently SMMU registers are located in discontiguous 3 blocks. They are interleaved by MC registers. Ideally SMMU register blocks should be in an independent one block, but it is too late to change this H/W design. In the future Tegra chips over some generations, it is expected that some of register block "size" can be extended towards the end and also more new register blocks will be added at most a few blocks. The starting address of each existing block won't change. This patch allocates multiple number of register blocks dynamically based on the info passed from DT. Those ranges are verified in the accessors{read,write}. This may sacrifice some performance because a new accessors prevents compiler optimization of a fixed size register offset calculation. Since SMMU register accesses are not so frequent, this would be acceptable. This patch is necessary to unify "tegra-smmu.ko" over some Tegra SoC generations. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
0fde671b |
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04-Feb-2013 |
Sami Liedes <sliedes@nvidia.com> |
iommu/tegra: Add missing spinlock initialization Fix tegra_smmu_probe() to initialize client_lock spinlocks in per-address-space structures. Signed-off-by: Sami Liedes <sliedes@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
bc5e6dea |
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21-Jan-2013 |
Thierry Reding <thierry.reding@avionic-design.de> |
iommu: Convert to devm_ioremap_resource() Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: Joerg Roedel <joro@8bytes.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
d34d6517 |
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21-Dec-2012 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
Drivers: iommu: remove __dev* attributes. CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Ohad Ben-Cohen <ohad@wizery.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Omar Ramirez Luna <omar.luna@linaro.org> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Bharat Nihalani <bnihalani@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
f1bda29c |
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28-Nov-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Move bus_set_iommu after probe for multi arch For a single image to support multiple SoCs(GART/SMMU). Reported-by: Arto Merilainen <amerilainen@nvidia.com> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
37683e45 |
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28-Nov-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Remove unnecessary PTC/TLB flush all smmu_flush_regs() does TLB/PTC flush all when freeing a second level page table. This isn't necessay at all since each pte entry has been already maintained by address in the above flush_ptc_and_tlb(). Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
b334b648 |
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11-Nov-2012 |
Cyril Roelandt <tipecaml@gmail.com> |
iommu/tegra-smmu.c: fix dentry reference leak in smmu_debugfs_stats_show(). Call to d_find_alias() needs a corresponding dput(). Signed-off-by: Cyril Roelandt <tipecaml@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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#
cc95e347 |
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19-Sep-2012 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/ We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible to enable single zImage. Move tegra-ahb.h to a more central location (suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c include the header to ensure client and provider agree on the prototype. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
e68917a1 |
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02-Oct-2012 |
Stephen Warren <swarren@nvidia.com> |
iommu: tegra: remove include of <mach/iomap.h> Nothing from this file is used, and the file will hopefully be deleted soon. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joerg Roedel <joerg.roedel@amd.com>
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#
d0078e72 |
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17-Oct-2012 |
Hiro Sugawara <hsugawara@nvidia.com> |
iommu/tegra: smmu: Fix deadly typo Fix a deadly typo in macro definition. Cc: stable@vger.kernel.org Signed-off-by: Hiro Sugawara <hsugawara@nvidia.com> Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
e6bc5933 |
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04-Sep-2012 |
Stephen Warren <swarren@nvidia.com> |
dma: tegra: move smmu.h into SMMU driver There's no need to place these defines into arch/arm/mach-tegra/include/. Move them into the SMMU driver to clean up mach-tegra, as a pre-requisite for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Hiroshi Doyu <hdoyu@nvidia.com> Acked-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
5a2c937a |
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14-Sep-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Use debugfs_create_dir for directory The commit c3b1a35 "debugfs: make sure that debugfs_create_file() gets used only for regulars" doesn't allow to use debugfs_create_file() for dir. Keep debugfs data in smmu_device instead of directory's i_private. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
39abf8aa |
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02-Aug-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: debugfs for TLB/PTC statistics Add debugfs entries to collect TLB/PTC statistics. $ echo "reset" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ echo "on" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ echo "off" > /sys/kernel/debug/smmu/mc/{tlb,ptc} $ cat /sys/kernel/debug/smmu/mc/{tlb,ptc} hit:0014910c miss:00014d22 The above format is: hit:<HIT count><SPC>miss:<MISS count><SPC><CR+LF> fscanf(fp, "hit:%lx miss:%lx", &hit, &miss); Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
d1d076f1 |
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29-Jul-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Fix error initial value at domain_init err initial value should be -EAGAIN. Otherwise 2nd iteration always fails in the case as[0] is occupied. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
d2453b2c |
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29-Jul-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Cleanup with lesser nest Small clean up with lesser nest for readability. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
9579a974 |
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08-Jul-2012 |
Julia Lawall <Julia.Lawall@lip6.fr> |
iommu/tegra: remove invalid reference to list iterator variable If list_for_each_entry, etc complete a traversal of the list, the iterator variable ends up pointing to an address at an offset from the list head, and not a meaningful structure. Thus this value should not be used after the end of the iterator. Replace c->dev by dev, which is the value that c->dev has been compared to. This problem was found using Coccinelle (http://coccinelle.lip6.fr/). Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
f9a4f063 |
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17-Jul-2012 |
Joerg Roedel <joerg.roedel@amd.com> |
iommu/tegra: Don't call alloc_pdir with as->lock Instead of taking as->lock before calling alloc_pdir() and releasing it in that function to allocate memory, just take the lock only in the alloc_pdir function and run the loop without any lock held. This simplifies the complicated lock->unlock->alloc->lock->unlock sequence into alloc->lock->unlock. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
9e971a03 |
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02-Jul-2012 |
Hiroshi DOYU <hdoyu@nvidia.com> |
iommu/tegra: smmu: Fix unsleepable memory allocation at alloc_pdir() alloc_pdir() is called from smmu_iommu_domain_init() with spin_lock held. memory allocations in alloc_pdir() had to be atomic. Instead of converting into atomic allocation, this patch once releases a lock, does the allocation, holds the lock again and then sees if it's raced or not in order to avoid introducing mutex and preallocation. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reported-by: Chris Wright <chrisw@sous-sol.org> Cc: Chris Wright <chrisw@sous-sol.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
0bdbf4cc |
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02-Jul-2012 |
Hiroshi DOYU <hdoyu@nvidia.com> |
iommu/tegra: smmu: Remove unnecessary sanity check at alloc_pdir() alloc_pdir() is called with smmu->as[?].pdir_page == NULL. No need to check pdir_page again inside alloc_pdir(). Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
23349902 |
|
26-Jan-2012 |
Hiroshi DOYU <hdoyu@nvidia.com> |
iommu/tegra: Implement DOMAIN_ATTR_GEOMETRY attribute Implement the attribute for the Tegra IOMMU drivers. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
8f53dc72 |
|
26-Jun-2012 |
Hiroshi DOYU <hdoyu@nvidia.com> |
iommu/tegra: smmu: Fix unsleepable memory allocation allo_pdir() is called in smmu_iommu_domain_init() with spin_lock held. memory allocations in it have to be atomic/unsleepable. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reported-by: Chris Wright <chrisw@sous-sol.org> Acked-by: Chris Wright <chrisw@sous-sol.org> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
ff763629 |
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25-Jun-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Fix uninitialized var warning For the compiler warning, uninitizlized var when getting value by a pointer. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
0547c2f5 |
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25-Jun-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Remove unnecessary cleanups with devm_*() Remove unnecessary cleanup procedures with devm_*() functions. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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#
a3b24915 |
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25-Jun-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Simplify allocation at once To simplify the code, alloc necessary data at once. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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0760e8fa |
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25-Jun-2012 |
Hiroshi Doyu <hdoyu@nvidia.com> |
iommu/tegra: smmu: Add device tree support for SMMU The necessary info is expected to pass from DT. For more precise resource reservation, there shouldn't be any overlapping of register range between SMMU and MC. SMMU register offset needs to be calculated correctly, based on its register bank. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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90730917 |
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12-Apr-2012 |
Hiroshi DOYU <hdoyu@nvidia.com> |
iommu/tegra: smmu: Print device name correctly Print an attached device name correctly. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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7a31f6f4 |
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16-Nov-2011 |
Hiroshi DOYU <hdoyu@nvidia.com> |
ARM: IOMMU: Tegra30: Add iommu_ops for SMMU driver Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit). This patch implements struct iommu_ops for SMMU for the upper IOMMU API. This H/W module supports multiple virtual address spaces(domain x4), and manages 2 level H/W translation pagetable. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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