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c00743cb |
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13-Jan-2024 |
Yunsheng Lin <linyunsheng@huawei.com> |
RDMA/hns: Simplify 'struct hns_roce_hem' allocation 'struct hns_roce_hem' is used to refer to the last level of dma buffer managed by the hw, pointed by a single BA(base address) in the previous level of BT(base table), so the dma buffer in 'struct hns_roce_hem' must be contiguous. Right now the size of dma buffer in 'struct hns_roce_hem' is decided by mhop->buf_chunk_size in get_hem_table_config(), which ensure the mhop->buf_chunk_size is power of two of PAGE_SIZE, so there will be only one contiguous dma buffer allocated in hns_roce_alloc_hem(), which means hem->chunk_list and chunk->mem for linking multi dma buffers is unnecessary. This patch removes the hem->chunk_list and chunk->mem and other related macro and function accordingly. Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com> Link: https://lore.kernel.org/r/20240113085935.2838701-7-huangjunxian6@hisilicon.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
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5f652387 |
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22-Sep-2022 |
Chengchang Tang <tangchengchang@huawei.com> |
RDMA/hns: Remove redundant 'phy_addr' in hns_roce_hem_list_find_mtt() This parameter has never been used. Remove it to simplify the function. Link: https://lore.kernel.org/r/20220922123315.3732205-8-xuhaoyue1@hisilicon.com Signed-off-by: Chengchang Tang <tangchengchang@huawei.com> Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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29dc0635 |
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22-Sep-2022 |
Yunsheng Lin <linyunsheng@huawei.com> |
RDMA/hns: Remove redundant 'use_lowmem' argument from hns_roce_init_hem_table() As hns_roce_init_hem_table() is always called with use_lowmem being '1', and table->lowmem is set according to that argument, so remove table->lowmem too. Also, as the table->lowmem is used to indicate a dma buffer is allocated with GFP_HIGHUSER or GFP_KERNEL, and calling dma_alloc_coherent() with GFP_KERNEL seems like a common pattern. Link: https://lore.kernel.org/r/20220922123315.3732205-7-xuhaoyue1@hisilicon.com Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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68e11a60 |
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21-May-2021 |
Xi Wang <wangxi11@huawei.com> |
RDMA/hns: Clean the hardware related code for HEM Move the HIP06 related code to the hw v1 source file for HEM. Link: https://lore.kernel.org/r/1621589395-2435-6-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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82eb481d |
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21-May-2021 |
Weihang Li <liweihang@huawei.com> |
RDMA/hns: Use refcount_t APIs for HEM refcount_t is better than integer for reference counting, it will WARN on overflow/underflow and avoid use-after-free risks. Link: https://lore.kernel.org/r/1621589395-2435-5-git-send-email-liweihang@huawei.com Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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dc93a0d9 |
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10-Dec-2020 |
Lang Cheng <chenglang@huawei.com> |
RDMA/hns: Fix coding style issues Just format the code without modifying anything, including fixing some redundant and missing blanks and spaces and changing the variable definition order. Link: https://lore.kernel.org/r/1607650657-35992-8-git-send-email-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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d6d91e46 |
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23-Oct-2020 |
Weihang Li <liweihang@huawei.com> |
RDMA/hns: Add support for configuring GMV table HIP09 supports to store SGID/SMAC/VLAN together in a table named GMV. The driver needs to allocate memory for it and tell the information about this region to hardware. Link: https://lore.kernel.org/r/1603508836-33054-2-git-send-email-liweihang@huawei.com Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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82d07a4e |
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20-May-2020 |
Weihang Li <liweihang@huawei.com> |
RDMA/hns: Change all page_shift to unsigned page_shift is used to calculate the page size, it's always non-negative, and should be in type of unsigned. Link: https://lore.kernel.org/r/1589982799-28728-7-git-send-email-liweihang@huawei.com Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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2929c40f |
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28-Apr-2020 |
Xi Wang <wangxi11@huawei.com> |
RDMA/hns: Remove unused MTT functions The MTT (Memory Translate Table) interface is no longer used to configure the buffer address to BT (Base Address Table) that requires driver mapping. Because the MTT is not compatible with multi-hop addressing of the hip08, it is replaced by MTR (Memory Translate Region) interface, and all the MTT functions should be removed. Link: https://lore.kernel.org/r/1588071823-40200-3-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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3c873161 |
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13-Apr-2020 |
Xi Wang <wangxi11@huawei.com> |
RDMA/hns: Add support for addressing when hopnum is 0 Currently, WQE and EQE table have already used the mtr interface to config and access memory by multi-hop addressing when hopnum is from 1 to 3. But if hopnum is 0, each table need write its own but repetitive logic, and many duplicate code exists in the mtr interfaces invoke process. So wraps the public logic as 3 functions: hns_roce_mtr_create(), hns_roce_mtr_destroy() and hns_roce_mtr_map() to support hopnum ranges from 0 to 3. In addition, makes the mtr interfaces easier to use. Link: https://lore.kernel.org/r/1586779091-51410-2-git-send-email-liweihang@huawei.com Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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531eb45b |
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31-Oct-2019 |
Sirong Wang <wangsirong@huawei.com> |
RDMA/hns: Correct the value of HNS_ROCE_HEM_CHUNK_LEN Size of pointer to buf field of struct hns_roce_hem_chunk should be considered when calculating HNS_ROCE_HEM_CHUNK_LEN, or sg table size will be larger than expected when allocating hem. Fixes: 9a4435375cd1 ("IB/hns: Add driver files for hns RoCE driver") Link: https://lore.kernel.org/r/1572575610-52530-2-git-send-email-liweihang@hisilicon.com Signed-off-by: Sirong Wang <wangsirong@huawei.com> Signed-off-by: Weihang Li <liweihang@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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6def7de6 |
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08-Aug-2019 |
Lang Cheng <chenglang@huawei.com> |
RDMA/hns: Update some comments style Here removes some useless comments and adds necessary spaces to another comments. Signed-off-by: Lang Cheng <chenglang@huawei.com> Link: https://lore.kernel.org/r/1565276034-97329-7-git-send-email-oulijun@huawei.com Signed-off-by: Doug Ledford <dledford@redhat.com>
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da392921 |
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16-Jun-2019 |
Leon Romanovsky <leon@kernel.org> |
RDMa/hns: Don't stuck in endless timeout loop The "end" variable is declared as unsigned and can't be negative, it leads to the situation where timeout limit is not honored, so let's convert logic to ensure that loop is bounded. drivers/infiniband/hw/hns/hns_roce_hw_v1.c: In function _hns_roce_v1_clear_hem_: drivers/infiniband/hw/hns/hns_roce_hw_v1.c:2471:12: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] 2471 | if (end < 0) { | ^ Fixes: 669cefb654cb ("RDMA/hns: Remove jiffies operation in disable interrupt context") Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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38389eaa |
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08-Jun-2019 |
Lijun Ou <oulijun@huawei.com> |
RDMA/hns: Add mtr support for mixed multihop addressing Currently, the MTT(memory translate table) design required a buffer space must has the same hopnum, but the hip08 hw can support mixed hopnum config in a buffer space. This patch adds the MTR(memory translate region) design for supporting mixed multihop. Signed-off-by: Xi Wang <wangxi11@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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0e40dc2f |
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18-Dec-2018 |
Yangyang Li <liyangyang20@huawei.com> |
RDMA/hns: Add timer allocation support for hip08 This patch adds qpc timer and cqc timer allocation support for hardware timeout retransmission in kernel space driver. Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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6a157f7d |
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18-Dec-2018 |
Yangyang Li <liyangyang20@huawei.com> |
RDMA/hns: Add SCC context allocation support for hip08 This patch adds SCC context allocation and initialization support for DCQCN in kernel space driver. Signed-off-by: Yangyang Li <liyangyang20@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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5c1f167a |
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24-Nov-2018 |
Lijun Ou <oulijun@huawei.com> |
RDMA/hns: Init SRQ table for hip08 This patch inits hem resource for SRQ table, includes SRQWQE and SRQWQE index resource. Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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378efe79 |
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28-Nov-2017 |
Wei Hu\(Xavier\) <xavier.huwei@huawei.com> |
RDMA/hns: Get rid of page operation after dma_alloc_coherent In general, dma_alloc_coherent() returns a CPU virtual address and a DMA address, and we have no guarantee that the underlying memory even has an associated struct page at all. This patch gets rid of the page operation after dma_alloc_coherent, and records the VA returned form dma_alloc_coherent in the struct of hem in hns RoCE driver. Fixes: 9a44353("IB/hns: Add driver files for hns RoCE driver") Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Yixian Liu <liuyixian@huawei.com> Signed-off-by: Xiping Zhang (Francis) <zhangxiping3@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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e92f2c18 |
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10-Nov-2017 |
oulijun <oulijun@huawei.com> |
RDMA/hns: Configure TRRL field in hip08 RoCE device The TRRL(Target RDMA Read/aTOMIC List) record the information of receiving RDMA READ or ATOMIC operation in hip08. It will be used the hardware. The driver need to assign a continuous physical address for trrl_ba field of qp context. Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Yixian Liu <liuyixian@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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78928a17 |
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30-Aug-2017 |
Wei Hu(Xavier) <xavier.huwei@huawei.com> |
RDMA/hns: Fix inconsistent warning This patch fixes smatch inconsistent warning as below: drivers/infiniband/hw/hns/hns_roce_hem.h:136 hns_roce_hem_first() warn: inconsistent indenting Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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6a93c77a |
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30-Aug-2017 |
Shaobo Xu <xushaobo2@huawei.com> |
RDMA/hns: Update the interfaces for MTT/CQE multi hop addressing in hip08 The MTT(SQWQE/SGE/RQWQE) and CQE in hip08 can support multi hop addressing. The address of MTT/CQE can be retrieved by the BT (Base Address Table) with multi hop addressing. This patch is to update the interfaces in HEM to support multi hop addressing for the MTT/CQE. Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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a25d13cb |
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30-Aug-2017 |
Shaobo Xu <xushaobo2@huawei.com> |
RDMA/hns: Add the interfaces to support multi hop addressing for the contexts in hip08 The contexts (QPC/MTPT/CQC/SRQC) in hip08 can support multi hop addressing. The address of context can be retrieved by the BT (Base Address Table) with multi hop addressing. The first hop BT BA can be retrieved from the RAM in the chip by the bt_idx and bt_num. This patch is to add the interfaces in HEM to support multi hop addressing for the contexts. Signed-off-by: Shaobo Xu <xushaobo2@huawei.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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97f0e39f |
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20-Sep-2016 |
Wei Hu (Xavier) <xavier.huwei@huawei.com> |
IB/hns: Fix bug of clear hem In hip06, there's no interface to release hem memory. So, hardware can't identify whether hem memory released or not. If all context in a hem memory released, the related hem memory will be released by driver and reused by others. But, hardware don't know that this memory can't be used already. In order to fix this bug, hns roce driver reserved 128K memory for each type of hem(QPC/CQC/MTPT). While unmap hem memory, hns roce driver will write base address of reserved memory according to hem type. Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: Dongdong Huang(Donald) <hdd.huang@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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9a443537 |
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21-Jul-2016 |
oulijun <oulijun@huawei.com> |
IB/hns: Add driver files for hns RoCE driver These are the various new source code files for the Hisilicon RoCE driver for ARM architecture. Signed-off-by: Wei Hu <xavier.huwei@huawei.com> Signed-off-by: Nenglong Zhao <zhaonenglong@hisilicon.com> Signed-off-by: Lijun Ou <oulijun@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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