#
59738ab2 |
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14-Jul-2023 |
Rob Herring <robh@kernel.org> |
I2C: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
27ec43c7 |
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08-Aug-2023 |
Parker Newman <pnewman@connecttech.com> |
i2c: tegra: Fix i2c-tegra DMA config option processing Tegra processors prior to Tegra186 used APB DMA for I2C requiring CONFIG_TEGRA20_APB_DMA=y while Tegra186 and later use GPC DMA requiring CONFIG_TEGRA186_GPC_DMA=y. The check for if the processor uses APB DMA is inverted and so the wrong DMA config options are checked. This means if CONFIG_TEGRA20_APB_DMA=y but CONFIG_TEGRA186_GPC_DMA=n with a Tegra186 or later processor the driver will incorrectly think DMA is enabled and attempt to request DMA channels that will never be availible, leaving the driver in a perpetual EPROBE_DEFER state. Fixes: 48cb6356fae1 ("i2c: tegra: Add GPCDMA support") Signed-off-by: Parker Newman <pnewman@connecttech.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Acked-by: Akhil R <akhilrajeev@nvidia.com> Link: https://lore.kernel.org/r/fcfcf9b3-c8c4-9b34-2ff8-cd60a3d490bd@connecttech.com Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
b3497ef4 |
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07-Jul-2023 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Fix failure during probe deferral cleanup If the driver fails to obtain a DMA channel, it will initiate cleanup and try to release the DMA channel that couldn't be retrieved. This will cause a crash because the cleanup will try to dereference an ERR_PTR()- encoded error code. However, there's nothing to clean up at this point yet, so we can avoid this by simply resetting the DMA channel to NULL instead of storing the error code. Fixes: fcc8a89a1c83 ("i2c: tegra: Share same DMA channel for RX and TX") Signed-off-by: Thierry Reding <treding@nvidia.com> Tested-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
4f5d68c8 |
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06-May-2023 |
Michał Mirosław <mirq-linux@rere.qmqm.pl> |
i2c: tegra: allow VI support to be compiled out Save a bit of code for older Tegra platforms by compiling out VI's I2C mode support that's used only for Tegra210. $ size i2c-tegra.o text data bss dec hex filename 11381 292 8 11681 2da1 i2c-tegra.o (full) 10193 292 8 10493 28fd i2c-tegra.o (no-dvc) 9145 292 8 9445 24e5 i2c-tegra.o (no-vi,no-dvc) Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
a55efa7e |
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06-May-2023 |
Michał Mirosław <mirq-linux@rere.qmqm.pl> |
i2c: tegra: allow DVC support to be compiled out Save a bit of code for newer Tegra platforms by compiling out DVC's I2C mode support that's used only for Tegra2. $ size i2c-tegra.o text data bss dec hex filename - 11381 292 8 11681 2da1 i2c-tegra.o + 10193 292 8 10493 28fd i2c-tegra.o Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
fcc8a89a |
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27-Apr-2023 |
Akhil R <akhilrajeev@nvidia.com> |
i2c: tegra: Share same DMA channel for RX and TX Allocate only one DMA channel for I2C and share it for both TX and RX instead of using two different DMA hardware channels with the same slave ID. Since I2C supports only half duplex, there is no impact on perf with this. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
e190a0c3 |
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08-May-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
i2c: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Alain Volmat <alain.volmat@foss.st.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Jochen Friedrich <jochen@scram.de> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Asmaa Mnebhi <asnaa@nvidia.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Chris Pringle <chris.pringle@phabrix.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Tali Perry <tali.perry@nuvoton.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
9f855779 |
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27-Apr-2023 |
Akhil R <akhilrajeev@nvidia.com> |
i2c: tegra: Fix PEC support for SMBUS block read Update the msg->len value correctly for SMBUS block read. The discrepancy went unnoticed as msg->len is used in SMBUS transfers only when a PEC byte is added. Fixes: d7583c8a5748 ("i2c: tegra: Add SMBus block read function") Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
5bf71889 |
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17-Nov-2022 |
Akhil R <akhilrajeev@nvidia.com> |
i2c: tegra: Set ACPI node as primary fwnode Set ACPI node as the primary fwnode of I2C adapter to allow enumeration of child devices from the ACPI table Signed-off-by: Zubair Waheed <zwaheed@nvidia.com> Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
cdbf2625 |
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20-Oct-2022 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Allocate DMA memory for DMA engine When the I2C controllers are running in DMA mode, it is the DMA engine that performs the memory accesses rather than the I2C controller. Pass the DMA engine's struct device pointer to the DMA API to make sure the correct DMA operations are used. This fixes an issue where the DMA engine's SMMU stream ID needs to be misleadingly set for the I2C controllers in device tree. Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
48cb6356 |
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06-Sep-2022 |
Akhil R <akhilrajeev@nvidia.com> |
i2c: tegra: Add GPCDMA support Enable support for GPCDMA, which is used in I2C controllers in Tegra 186 and above. The chips before that used APB DMA. This change works under the presumption that all chips apart from those supporting APB DMA is using GPCDMA. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
ea1558ce |
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11-Aug-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
i2c: move drivers from strlcpy to strscpy Follow the advice of the below link and prefer 'strscpy'. Conversion is easy because no driver used the return value and has been done with a simple sed invocation. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
d7583c8a |
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10-Feb-2022 |
Akhil R <akhilrajeev@nvidia.com> |
i2c: tegra: Add SMBus block read function Emulate SMBus block read using ContinueXfer to read the length byte Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
50665d58 |
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10-Dec-2021 |
Akhil R <akhilrajeev@nvidia.com> |
i2c: tegra: use i2c_timings for bus clock freq Use i2c_timings struct and corresponding methods to get bus clock frequency Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
bd2fdedb |
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25-Nov-2021 |
Akhil R <akhilrajeev@nvidia.com> |
i2c: tegra: Add the ACPI support Add support for the ACPI based device registration so that the driver can be also enabled through ACPI table. This does not include the ACPI support for Tegra VI and DVC I2C. Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
ef3fe574 |
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19-Oct-2021 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Ensure that device is suspended before driver is removed Tegra I2C device isn't guaranteed to be suspended after removal of the driver since driver uses pm_runtime_put() that is asynchronous and pm_runtime_disable() cancels pending power-change requests. This means that potentially refcount of the clocks may become unbalanced after removal of the driver. This a very minor problem which unlikely to happen in practice and won't cause any visible problems, nevertheless let's replace pm_runtime_disable() with pm_runtime_force_suspend() and use pm_runtime_put_sync() which disables RPM of the device and puts it into suspend before driver is removed. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
3928bbb0 |
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12-Jan-2021 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Use threaded interrupt Switch to use threaded interrupt context in order to avoid checking of "are we in interrupt?" for the code that may sleep in the IRQ handler. I2C doesn't require a very low interrupt-handling latency, hence this change doesn't introduce any noticeable effects. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
2f3a0828 |
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12-Jan-2021 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Create i2c_writesl_vi() to use with VI I2C for filling TX FIFO VI I2C controller has known hardware bug where immediate multiple writes to TX_FIFO register gets stuck. Recommended software work around is to read I2C register after each write to TX_FIFO register to flush out the data. This patch implements this work around for VI I2C controller. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
27b7c6e0 |
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11-Jan-2021 |
Mikko Perttunen <mperttunen@nvidia.com> |
i2c: tegra: Wait for config load atomically while in ISR Upon a communication error, the interrupt handler can call tegra_i2c_disable_packet_mode. This causes a sleeping poll to happen unless the current transaction was marked atomic. Fix this by making the poll happen atomically if we are in an IRQ. This matches the behavior prior to the patch mentioned in the Fixes tag. Fixes: ede2299f7101 ("i2c: tegra: Support atomic transfers") Cc: stable@vger.kernel.org Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
53fd42ff |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Improve driver module description Use proper spelling of "NVIDIA" and don't designate driver as Tegra2-only since newer SoC generations are supported as well. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
c886a4a0 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Clean up whitespaces, newlines and indentation Some places in the code are missing newlines or have unnecessary whitespaces and newlines. This creates inconsistency of the code and hurts readability. This patch removes the unnecessary and adds necessary whitespaces / newlines, clears indentation of the code. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
94a5573f |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Clean up and improve comments Make all comments to be consistent in regards to capitalization and punctuation, correct spelling and grammar errors, improve wording. Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
76d06443 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Clean up printk messages This patch unifies style of all messages in the driver by starting them with a lowercase letter and using consistent capitalization and wording for all messages. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
a99042e7 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Clean up variable names Rename "ret" variables to "err" in order to make code a bit more expressive, emphasizing that the returned value is an error code. Same vice versa, where appropriate. Rename variable "reg" to "val" in order to better reflect the actual usage of the variable in the code and to make naming consistent with the rest of the code. Use briefer names for a few members of the tegra_i2c_dev structure in order to improve readability of the code. All dev/&pdev->dev are replaced with i2c_dev->dev in order to have uniform code style across the driver. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
89e3748a |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Improve formatting of variables Reorder definition of variables in the code to have them sorted by length and grouped logically, also replace "unsigned long" with "u32". Do this in order to make code easier to read. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
3b3b8e59 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Check errors for both positive and negative values The driver's code is inconsistent in regards to the error values checking. The correct way should be to check both positive and negative values. This patch cleans up the error-checks in the code. Note that the pm_runtime_get_sync() could return positive value on success, hence only relevant parts of the code are changed by this patch. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
d380d48f |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Factor out hardware initialization into separate function Factor out hardware initialization into a separate function from the probe function. The only place where runtime PM needs to be resumed during probe is the place of hardware initialization, hence it makes sense to factor out it in order to have a bit cleaner error handling in tegra_i2c_probe(). Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
507ae6ab |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Factor out register polling into separate function Factor out register polling into a separate function in order to remove boilerplate code and make code cleaner. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
4be62340 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Factor out packet header setup from tegra_i2c_xfer_msg() The code related to packet header setting up is a bit messy and makes tegra_i2c_xfer_msg() more difficult to read than it could be. Let's factor the packet header setup from tegra_i2c_xfer_msg() into separate function in order to make code easier to read and follow. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
4a8e0f87 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Factor out error recovery from tegra_i2c_xfer_msg() Factor out error recovery code from tegra_i2c_xfer_msg() in order to make this function easier to read and follow. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
e57ac5ab |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Rename wait/poll functions Drop '_timeout' postfix from the wait/poll completion function names in order to make the names shorter, making code cleaner a tad. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
8d57c2f3 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Remove "dma" variable from tegra_i2c_xfer_msg() The "dma" variable of tegra_i2c_xfer_msg() function doesn't bring much in regards to readability and generation of the code. Besides readability, it's also not very nice that the is_curr_dma_xfer is initialized in tegra_i2c_xfer_msg() and then could be overridden by tegra_i2c_config_fifo_trig(). In a result, the "dma" variable creates slight confusion since it's not instantly obvious why it's set after tegra_i2c_config_fifo_trig(). Hence should be better to have the variable removed. This makes code more consistent. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
d6a7969b |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Remove redundant check in tegra_i2c_issue_bus_clear() The tegra_i2c_wait_for_config_load() checks for 'has_config_load_reg' by itself, hence there is no need to duplicate the check. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
055ba331 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Remove likely/unlikely from the code The likely/unlikely annotations should be used only in a hot paths of performance-critical code. The I2C driver doesn't have such paths, and thus, there is no justification for usage of likely/unlikely annotations in the code. Hence remove them. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
56f1cd34 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Remove outdated barrier() The barrier() was intended to reduce possibility of racing with the interrupt handler, but driver's code evolved significantly and today's driver enables interrupt only when it waits for completion notification. Hence barrier() has no good use anymore, let's remove it. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
f1c2ff98 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Clean up variable types Don't use signed types for unsigned values and use consistent types for sibling variables. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
df384fa5 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Reorder location of functions in the code Reorder location of functions in the code in order to have definition of functions closer to the place of the invocation. This change makes easier to navigate around the code and removes the need to have a prototype for tegra_i2c_init(). Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
55c52f16 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Clean up probe function The driver's probe function code is a bit difficult to read. This patch reorders code of the probe function, forming groups of code that are easy to work with. The probe tear-down order now matches the driver-removal order. Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
6fe3e201 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Move out all device-tree parsing into tegra_i2c_parse_dt() Move out code related to device-tree parsing from the probe function into tegra_i2c_parse_dt() in order to make code more consistent. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
586a97d9 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Use clk-bulk helpers Use clk-bulk helpers and factor out clocks initialization into separate function in order to make code cleaner. The clocks initialization now performed after reset-control initialization in order to avoid a noisy -PROBE_DEFER errors on T186+ from the clk-bulk helper which doesn't silence this error code. Hence reset_control_get() now may return -EPROBE_DEFER on newer Tegra SoCs because they use BPMP driver that provides reset controls and BPMP doesn't come up early during boot. Previously rst was protected by the clocks retrieval and now this patch makes dev_err_probe() to be used for the rst error handling. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
20b9a6c3 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Use platform_get_irq() Use common helper for retrieval of the interrupt number in order to make code cleaner. Note that platform_get_irq() prints error message by itself. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
f7d62a11 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Use devm_platform_get_and_ioremap_resource() Driver now uses devm_platform_get_and_ioremap_resource() which replaces the typical boilerplate code and makes code cleaner. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
85934909 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Use reset_control_reset() Use a single reset_control_reset() instead of assert/deasset couple in order to make code cleaner a tad. Note that the reset_control_reset() uses 1 microsecond delay instead of 2 that was used previously, but this shouldn't matter because one microsecond is a default reset time for most of Tegra peripherals and TRM doesn't mention anything special in regards to I2C controller's reset propagation time. In addition don't ignore potential error of the reset control by emitting a noisy warning if it fails, which will indicate an existence of a severe problem, while still allow machine to boot up. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
d3dfd625 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Remove error message used for devm_request_irq() failure The error message prints number of vIRQ, which isn't a useful information. In practice devm_request_irq() never fails, hence let's remove the bogus message in order to make code cleaner. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
76bc845a |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Runtime PM always available on Tegra The runtime PM is guaranteed to be always available on Tegra after commit 40b2bb1b132a ("ARM: tegra: enforce PM requirement"). Hence let's remove all the RPM-availability checking and handling from the code. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
8ff72731 |
|
29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Remove i2c_dev.clk_divisor_non_hs_mode member The "non_hs_mode" divisor value is fixed, thus there is no need to have the variable i2c_dev.clk_divisor_non_hs_mode struct member. Let's remove it and move the mode selection into tegra_i2c_init() where it can be united with the timing selection. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
8548a75f |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Initialize div-clk rate unconditionally It doesn't make sense to conditionalize the div-clk rate changes because rate is fixed and it won't ever change once it's set at the driver's probe time. All further changes are NO-OPs because CCF caches rate and skips rate-change if rate is unchanged. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
ed022e5d |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Mask interrupt in tegra_i2c_issue_bus_clear() The tegra_i2c_issue_bus_clear() may fail and in this case BUS_CLR_DONE stays unmasked. Hence let's mask it for consistency. This patch doesn't fix any known problems. Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
c5418d4c |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Handle potential error of tegra_i2c_flush_fifos() Technically the tegra_i2c_flush_fifos() may fail and transfer should be aborted in this case, but this shouldn't ever happen in practice unless there is a bug somewhere in the driver. Let's add the error check just for completeness. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
e4fc2efb |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Add missing pm_runtime_put() The pm_runtime_get_sync() always bumps refcount regardless of whether it succeeds or fails. Hence driver is responsible for restoring of the RPM refcounting. This patch adds missing RPM puts which restore refcounting in a case of pm_runtime_get_sync() error. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
900aed24 |
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29-Sep-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Make tegra_i2c_flush_fifos() usable in atomic transfer The tegra_i2c_flush_fifos() shouldn't sleep in atomic transfer and jiffies are not updating if interrupts are disabled. Let's switch to use iopoll API helpers for register-polling. The iopoll API provides helpers for both atomic and non-atomic cases. Note that this patch doesn't fix any known problem because normally FIFO is flushed at the time of starting a new transfer. Reviewed-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
afca861b |
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27-Jul-2020 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Avoid tegra_i2c_init_dma() for Tegra210 vi i2c VI I2C is on host1x bus so APB DMA can't be used for Tegra210 VI I2C and there are no tx and rx dma channels for VI I2C. So, avoid attempt of requesting DMA channels. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
0d722620 |
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27-Jul-2020 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Fix runtime resume to re-init VI I2C VI I2C is on host1x bus and is part of VE power domain. During suspend/resume VE power domain goes through power off/on. So, controller reset followed by i2c re-initialization is required after the domain power up. This patch fixes it. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
42aa38b5 |
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27-Jul-2020 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Fix the error path in tegra_i2c_runtime_resume tegra_i2c_runtime_resume does not disable prior enabled clocks properly. This patch fixes it. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
7232f53e |
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27-Jul-2020 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Remove NULL pointer check before clk_enable/disable/prepare/unprepare clk_enable, clk_disable, clk_prepare, and clk_unprepare APIs have implementation for checking clk pointer not NULL and clock consumers can safely call these APIs without NULL pointer check. So, this patch cleans up Tegra i2c driver to remove explicit checks before these APIs. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
9e29420d |
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27-Jul-2020 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Don't mark VI I2C as IRQ safe runtime PM Tegra VI I2C is part of VE power domain and typically used for camera usecases. VE power domain is not always on and is non-IRQ safe. So, IRQ safe device cannot be attached to a non-IRQ safe domain as it prevents powering off the PM domain and generic power domain driver will warn. Current driver marks all I2C devices as IRQ safe and VI I2C device does not require IRQ safe as it will not be used for atomic transfers. This patch has fix to make VI I2C as non-IRQ safe. Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
c73178b9 |
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07-Jun-2019 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Add support for the VI I2C on Tegra210 Tegra210 has an extra instance of the I2C controller that is in the domain of host1x and usually used for camera use-cases. The programming model for the VI variant of the controller is roughly the same as for the other variants, except that the I2C registers start at an offset and are spaced further apart. VI I2C also doesn't support slave mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
82dd45f5 |
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01-Apr-2020 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Use FIELD_PREP/FIELD_GET macros Using these macros helps increase readability of the code. Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
a70ff656 |
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24-Mar-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Synchronize DMA before termination DMA transfer could be completed, but CPU (which handles DMA interrupt) may get too busy and can't handle the interrupt in a timely manner, despite of DMA IRQ being raised. In this case the DMA state needs to synchronized before terminating DMA transfer in order not to miss the DMA transfer completion. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
566c05f7 |
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24-Mar-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Better handle case where CPU0 is busy for a long time Boot CPU0 always handle I2C interrupt and under some rare circumstances (like running KASAN + NFS root) it may stuck in uninterruptible state for a significant time. In this case we will get timeout if I2C transfer is running on a sibling CPU, despite of IRQ being raised. In order to handle this rare condition, the IRQ status needs to be checked after completion timeout. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
26ca88aa |
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06-May-2020 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Keep IRQs enabled during suspend/resume One of the I2C controllers on Tegra SoCs is typically connected to a system PMIC, which provides controls for critical power supplies for most platforms. Some drivers, such as PCI, need to disable these regulators during a very late stage during suspend and resume them at a very early stage during resume. To support these use-cases, keep interrupts disabled during suspend/ resume. Suggested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
44c99904 |
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13-Dec-2019 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Restore pinmux on system resume Depending on the board design, the I2C controllers found on Tegra SoCs may require pinmuxing in order to function. This is done as part of the driver's runtime suspend/resume operations. However, the PM core does not allow devices to go into runtime suspend during system sleep to avoid potential races with the suspend/resume of their parents. As a result of this, when Tegra SoCs resume from system suspend, their I2C controllers may have lost the pinmux state in hardware, whereas the pinctrl subsystem is not aware of this. To fix this, make sure that if the I2C controller is not runtime suspended, the runtime suspend code is still executed in order to disable the module clock (which we don't need to be enabled during sleep) and set the pinmux to the idle state. Conversely, make sure that the I2C controller is properly resumed when waking up from sleep so that pinmux settings are properly restored. This fixes a bug seen with DDC transactions to an HDMI monitor timing out when resuming from system suspend. Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
78ad7342 |
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30-Apr-2020 |
Thierry Reding <treding@nvidia.com> |
Revert "i2c: tegra: Fix suspending in active runtime PM state" This reverts commit 9f42de8d4ec2304f10bbc51dc0484f3503d61196. It's not safe to use pm_runtime_force_{suspend,resume}(), especially during the noirq phase of suspend. See also the guidance provided in commit 1e2ef05bb8cf ("PM: Limit race conditions between runtime PM and system sleep (v2)"). Signed-off-by: Thierry Reding <treding@nvidia.com>
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#
8839e460 |
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27-Apr-2020 |
Wolfram Sang <wsa@kernel.org> |
Revert "i2c: tegra: Better handle case where CPU0 is busy for a long time" This reverts commit a900aeac253729411cf33c6cb598c152e9e4137f because regressions were showing up. Suggested-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/dmaengine/20200319201140.17451-1-digetx@gmail.com/ Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
deb821ff |
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27-Apr-2020 |
Wolfram Sang <wsa@kernel.org> |
Revert "i2c: tegra: Synchronize DMA before termination" This reverts commit 8814044fe0fa182abc9ff818d3da562de98bc9a7 because regressions were showing up. Suggested-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/dmaengine/20200319201140.17451-1-digetx@gmail.com/ Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
8814044f |
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24-Mar-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Synchronize DMA before termination DMA transfer could be completed, but CPU (which handles DMA interrupt) may get too busy and can't handle the interrupt in a timely manner, despite of DMA IRQ being raised. In this case the DMA state needs to synchronized before terminating DMA transfer in order not to miss the DMA transfer completion. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
a900aeac |
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24-Mar-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Better handle case where CPU0 is busy for a long time Boot CPU0 always handle I2C interrupt and under some rare circumstances (like running KASAN + NFS root) it may stuck in uninterruptible state for a significant time. In this case we will get timeout if I2C transfer is running on a sibling CPU, despite of IRQ being raised. In order to handle this rare condition, the IRQ status needs to be checked after completion timeout. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
90224e64 |
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24-Mar-2020 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
i2c: drivers: Use generic definitions for bus frequencies Since we have generic definitions for bus frequencies, let's use them. Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: Robert Richter <rrichter@marvell.com> Reviewed-by: Thor Thayer <thor.thayer@linux.intel.com> Acked-by: Elie Morisse <syniurge@gmail.com> Acked-by: Nehal Shah <nehal-bakulchandra.shah@amd.com> Reviewed-by: Brendan Higgins <brendanhiggins@google.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
b3ec9469 |
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13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Check DMA completion status in addition to left time It is more robust to check completion status in addition to the left time in a case of DMA transfer because transfer's completion happens in two phases [one is ISR, other is tasklet] and thus it is possible that DMA is completed while I2C completion awaiting times out because of the deferred notification done by the DMA driver. The DMA completion status becomes 100% actual after DMA synchronization. This fixes spurious DMA timeouts when system is under load. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
28d98666 |
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13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Always terminate DMA transfer It is possible that I2C could error out in the middle of DMA transfer and in this case DMA channel needs to be reset, otherwise a follow up transfer will fail because DMA channel stays blocked. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
4211ffc3 |
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13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Use relaxed versions of readl/writel There is nothing to synchronize in regards to memory accesses for PIO transfers and for DMA transfers the DMA API takes care of the syncing. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
ae6028a6 |
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13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Rename I2C_PIO_MODE_MAX_LEN to I2C_PIO_MODE_PREFERRED_LEN DMA is preferred for a larger transfers, while PIO is preferred for a smaller transfers to avoid unnecessary DMA overhead. There is no strict size limitations for the PIO-mode transfers, so let's rename the constant for clarity. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
ede2299f |
|
13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Support atomic transfers System shutdown may happen with interrupts being disabled and in this case kernel may hang if atomic transfer isn't supported by driver. There were several occurrences where I found my Nexus 7 completely discharged despite of being turned off and then one day I spotted this in the log: reboot: Power down ------------[ cut here ]------------ WARNING: CPU: 0 PID: 1 at drivers/i2c/i2c-core.h:40 i2c_transfer+0x95/0x9c No atomic I2C transfer handler for 'i2c-1' Modules linked in: tegra30_devfreq CPU: 0 PID: 1 Comm: systemd-shutdow Not tainted 5.4.0-next-20191202-00120-gf7ecd80fb803-dirty #3195 Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) [<c010e4b5>] (unwind_backtrace) from [<c010a0fd>] (show_stack+0x11/0x14) [<c010a0fd>] (show_stack) from [<c09995e5>] (dump_stack+0x85/0x94) [<c09995e5>] (dump_stack) from [<c011f3d1>] (__warn+0xc1/0xc4) [<c011f3d1>] (__warn) from [<c011f691>] (warn_slowpath_fmt+0x61/0x78) [<c011f691>] (warn_slowpath_fmt) from [<c069a8dd>] (i2c_transfer+0x95/0x9c) [<c069a8dd>] (i2c_transfer) from [<c05667f1>] (regmap_i2c_read+0x4d/0x6c) [<c05667f1>] (regmap_i2c_read) from [<c0563601>] (_regmap_raw_read+0x99/0x1cc) [<c0563601>] (_regmap_raw_read) from [<c0563757>] (_regmap_bus_read+0x23/0x38) [<c0563757>] (_regmap_bus_read) from [<c056293d>] (_regmap_read+0x3d/0xfc) [<c056293d>] (_regmap_read) from [<c0562d3b>] (_regmap_update_bits+0x87/0xc4) [<c0562d3b>] (_regmap_update_bits) from [<c0563add>] (regmap_update_bits_base+0x39/0x50) [<c0563add>] (regmap_update_bits_base) from [<c056fd39>] (max77620_pm_power_off+0x29/0x2c) [<c056fd39>] (max77620_pm_power_off) from [<c013bbdd>] (__do_sys_reboot+0xe9/0x170) [<c013bbdd>] (__do_sys_reboot) from [<c0101001>] (ret_fast_syscall+0x1/0x28) Exception stack(0xde907fa8 to 0xde907ff0) 7fa0: 00000000 00000000 fee1dead 28121969 4321fedc 00000000 7fc0: 00000000 00000000 00000000 00000058 00000000 00000000 00000000 00000000 7fe0: 0045adf0 bed9abb8 004444a0 b6c666d0 ---[ end trace bdd18f87595b1a5e ]--- The atomic transferring is implemented by enforcing PIO mode for the transfer and by polling interrupt status until transfer is completed or failed. Now system shuts down properly every time. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
b5d5605c |
|
13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Prevent interrupt triggering after transfer timeout Potentially it is possible that interrupt may fire after transfer timeout. That may not end up well for the next transfer because interrupt handling may race with hardware resetting. This is very unlikely to happen in practice, but anyway let's prevent the potential problem by enabling interrupt only at the moments when it is actually necessary to get some interrupt event. Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
24a49678 |
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13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Properly disable runtime PM on driver's probe error One of the recent Tegra I2C commits made a change that resumes runtime PM during driver's probe, but it missed to put the RPM in a case of error. Note that it's not correct to use pm_runtime_status_suspended because it breaks RPM refcounting. Fixes: 8ebf15e9c869 ("i2c: tegra: Move suspend handling to NOIRQ phase") Cc: <stable@vger.kernel.org> # v5.4+ Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
9f42de8d |
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13-Jan-2020 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Fix suspending in active runtime PM state I noticed that sometime I2C clock is kept enabled during suspend-resume. This happens because runtime PM defers dynamic suspension and thus it may happen that runtime PM is in active state when system enters into suspend. In particular I2C controller that is used for CPU's DVFS is often kept ON during suspend because CPU's voltage scaling happens quite often. Fixes: 8ebf15e9c869 ("i2c: tegra: Move suspend handling to NOIRQ phase") Cc: <stable@vger.kernel.org> # v5.4+ Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
79e4be2c |
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13-Nov-2019 |
Peter Ujfalusi <peter.ujfalusi@ti.com> |
i2c: tegra: Use dma_request_chan() directly for channel request dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
8ebf15e9 |
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10-Sep-2019 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Move suspend handling to NOIRQ phase Commit acc8abcb2a9c ("i2c: tegra: Add suspend-resume support") added suspend support for the Tegra I2C driver and following this change on Tegra30 the following WARNING is seen on entering suspend ... WARNING: CPU: 2 PID: 689 at /dvs/git/dirty/git-master_l4t-upstream/kernel/drivers/i2c/i2c-core.h:54 __i2c_transfer+0x35c/0x70c i2c i2c-4: Transfer while suspended Modules linked in: brcmfmac brcmutil CPU: 2 PID: 689 Comm: rtcwake Not tainted 5.3.0-rc7-g089cf7f6ecb2 #1 Hardware name: NVIDIA Tegra SoC (Flattened Device Tree) [<c0112264>] (unwind_backtrace) from [<c010ca94>] (show_stack+0x10/0x14) [<c010ca94>] (show_stack) from [<c0a77024>] (dump_stack+0xb4/0xc8) [<c0a77024>] (dump_stack) from [<c0124198>] (__warn+0xe0/0xf8) [<c0124198>] (__warn) from [<c01241f8>] (warn_slowpath_fmt+0x48/0x6c) [<c01241f8>] (warn_slowpath_fmt) from [<c06f6c40>] (__i2c_transfer+0x35c/0x70c) [<c06f6c40>] (__i2c_transfer) from [<c06f7048>] (i2c_transfer+0x58/0xf4) [<c06f7048>] (i2c_transfer) from [<c06f7130>] (i2c_transfer_buffer_flags+0x4c/0x70) [<c06f7130>] (i2c_transfer_buffer_flags) from [<c05bee78>] (regmap_i2c_write+0x14/0x30) [<c05bee78>] (regmap_i2c_write) from [<c05b9cac>] (_regmap_raw_write_impl+0x35c/0x868) [<c05b9cac>] (_regmap_raw_write_impl) from [<c05b984c>] (_regmap_update_bits+0xe4/0xec) [<c05b984c>] (_regmap_update_bits) from [<c05bad04>] (regmap_update_bits_base+0x50/0x74) [<c05bad04>] (regmap_update_bits_base) from [<c04d453c>] (regulator_disable_regmap+0x44/0x54) [<c04d453c>] (regulator_disable_regmap) from [<c04cf9d4>] (_regulator_do_disable+0xf8/0x268) [<c04cf9d4>] (_regulator_do_disable) from [<c04d1694>] (_regulator_disable+0xf4/0x19c) [<c04d1694>] (_regulator_disable) from [<c04d1770>] (regulator_disable+0x34/0x64) [<c04d1770>] (regulator_disable) from [<c04d2310>] (regulator_bulk_disable+0x28/0xb4) [<c04d2310>] (regulator_bulk_disable) from [<c0495cd4>] (tegra_pcie_power_off+0x64/0xa8) [<c0495cd4>] (tegra_pcie_power_off) from [<c0495f74>] (tegra_pcie_pm_suspend+0x25c/0x3f4) [<c0495f74>] (tegra_pcie_pm_suspend) from [<c05af48c>] (dpm_run_callback+0x38/0x1d4) [<c05af48c>] (dpm_run_callback) from [<c05afe30>] (__device_suspend_noirq+0xc0/0x2b8) [<c05afe30>] (__device_suspend_noirq) from [<c05b1c24>] (dpm_noirq_suspend_devices+0x100/0x37c) [<c05b1c24>] (dpm_noirq_suspend_devices) from [<c05b1ebc>] (dpm_suspend_noirq+0x1c/0x48) [<c05b1ebc>] (dpm_suspend_noirq) from [<c017d2c0>] (suspend_devices_and_enter+0x1d0/0xa00) [<c017d2c0>] (suspend_devices_and_enter) from [<c017dd10>] (pm_suspend+0x220/0x74c) [<c017dd10>] (pm_suspend) from [<c017c2c8>] (state_store+0x6c/0xc8) [<c017c2c8>] (state_store) from [<c02ef398>] (kernfs_fop_write+0xe8/0x1c4) [<c02ef398>] (kernfs_fop_write) from [<c0271e38>] (__vfs_write+0x2c/0x1c4) [<c0271e38>] (__vfs_write) from [<c02748dc>] (vfs_write+0xa4/0x184) [<c02748dc>] (vfs_write) from [<c0274b7c>] (ksys_write+0x9c/0xdc) [<c0274b7c>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x54) Exception stack(0xe9f21fa8 to 0xe9f21ff0) 1fa0: 0000006c 004b2438 00000004 004b2438 00000004 00000000 1fc0: 0000006c 004b2438 004b1228 00000004 00000004 00000004 0049e78c 004b1228 1fe0: 00000004 be9809b8 b6f0bc0b b6e96206 The problem is that the Tegra PCIe driver indirectly uses I2C for controlling some regulators and the I2C driver is now being suspended before the PCIe driver causing the PCIe suspend to fail. The Tegra PCIe driver is suspended during the NOIRQ phase and this cannot be changed due to other dependencies. Therefore, we also need to move the suspend handling for the Tegra I2C driver to the NOIRQ phase as well. In order to move the I2C suspend handling to the NOIRQ phase we also need to avoid calling pm_runtime_get/put() because per commit 1e2ef05bb8cf ("PM: Limit race conditions between runtime PM and system sleep (v2)") these cannot be called early in resume. The function tegra_i2c_init(), called during resume, calls pm_runtime_get/put() and so move these calls outside of tegra_i2c_init(), so this function can be used during the NOIRQ resume phase. Fixes: acc8abcb2a9c ("i2c: tegra: Add suspend-resume support") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
e5738bc4 |
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07-Jul-2019 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Compile PM functions unconditionally The I2C driver fails to probe if CONFIG_PM_SLEEP=n because runtime PM doesn't depend on the PM sleep and in this case the runtime PM ops are not included in the driver, resulting in I2C clock not being enabled. It's much cleaner to simply allow compiler to remove the dead code instead of messing with the #ifdefs. This patch fixes such errors when CONFIG_PM_SLEEP=n: tegra-i2c 7000c400.i2c: timeout waiting for fifo flush tegra-i2c 7000c400.i2c: Failed to initialize i2c controller Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
57ca968b |
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18-Jun-2019 |
Bitan Biswas <bbiswas@nvidia.com> |
i2c: tegra: remove BUG() macro The usage of BUG() macro is generally discouraged in kernel, unless it's a problem that results in a physical damage or loss of data. This patch removes unnecessary BUG() macros and replaces the rest with warning. Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
acc8abcb |
|
06-Jun-2019 |
Bitan Biswas <bbiswas@nvidia.com> |
i2c: tegra: Add suspend-resume support Post suspend I2C registers have power on reset values. Before any transfer initialize I2C registers to prevent I2C transfer timeout and implement suspend and resume callbacks needed. Fix below errors post suspend: 1) Tegra I2C transfer timeout during jetson tx2 resume: [ 27.520613] pca953x 1-0074: calling pca953x_resume+0x0/0x1b0 @ 2939, parent: i2c-1 [ 27.633623] tegra-i2c 3160000.i2c: i2c transfer timed out [ 27.639162] pca953x 1-0074: Unable to sync registers 0x3-0x5. -110 [ 27.645336] pca953x 1-0074: Failed to sync GPIO dir registers: -110 [ 27.651596] PM: dpm_run_callback(): pca953x_resume+0x0/0x1b0 returns -110 [ 27.658375] pca953x 1-0074: pca953x_resume+0x0/0x1b0 returned -110 after 127152 usecs [ 27.666194] PM: Device 1-0074 failed to resume: error -110 2) Tegra I2C transfer timeout error on jetson Xavier post resume. Remove i2c bus lock-unlock calls in resume callback as i2c_mark_adapter_* (suspended-resumed) help ensure i2c core calls from client are not executed before i2c-tegra resume. Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
d680a50c |
|
26-May-2019 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Avoid error message on deferred probe If the driver defers probe because of a missing clock, avoid outputting an error message. The clock will show up eventually. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
fbbe4941 |
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11-Jun-2019 |
Bitan Biswas <bbiswas@nvidia.com> |
i2c: tegra: fix msleep warning Fix checkpatch.pl WARNING for delay of approximately 1msec in flush i2c FIFO polling loop by using usleep_range(1000, 2000): WARNING: msleep < 20ms can sleep for up to 20ms; see ... Documentation/timers/timers-howto.txt + msleep(1); Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
9d174476 |
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11-Jun-2019 |
Bitan Biswas <bbiswas@nvidia.com> |
i2c: tegra: add spinlock definition comment Fix checkpatch.pl CHECK as follows: CHECK: spinlock_t definition without comment + spinlock_t xfer_lock; Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
26955a7b |
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11-Jun-2019 |
Bitan Biswas <bbiswas@nvidia.com> |
i2c: tegra: fix alignment and spacing violations Fix checkpatch.pl alignment and blank line check(s) in i2c-tegra.c Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
233d0ab6 |
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11-Jun-2019 |
Bitan Biswas <bbiswas@nvidia.com> |
i2c: tegra: remove unnecessary variable init Remove variable initializations in functions that are followed by assignments before use Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
c84663cb |
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11-Jun-2019 |
Bitan Biswas <bbiswas@nvidia.com> |
i2c: tegra: clean up macros Clean up macros by: 1) removing unused macros 2) replace constants by macro BIT() Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
89328b1b |
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21-Feb-2019 |
Jonathan Hunter <jonathanh@nvidia.com> |
i2c: tegra: Only display error messages if DMA setup fails Commit 86c92b9965ff ("i2c: tegra: Add DMA support") added DMA support to the Tegra I2C driver for Tegra devices that support the APB DMA controller. One side-effect of this change is that even for Tegra devices that do not have an APB DMA controller and hence, cannot support DMA tranfers for I2C transactions, the following error messages are still displayed ... ERR KERN tegra-i2c 31c0000.i2c: cannot use DMA: -19 ERR KERN tegra-i2c 31c0000.i2c: falling back to PIO There is no point displaying the above messages for devices that do not have an APB DMA controller and so fix this by returning from the tegra_i2c_init_dma() function if 'has_apb_dma' is not true. Furthermore, if CONFIG_TEGRA20_APB_DMA is not set, then rather than printing an error message, print an debug message as for whatever reason this could be intentional. Fixes: 86c92b9965ff ("i2c: tegra: Add DMA support") Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
6b9932bc |
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19-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: remove multi-master support Multi-master support is defeatured on Tegra210 and Tegra186 due to known bugs. This patch removes multi-master support for Tegra210 and Tegra186 I2C HW feature. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
9ffc125c |
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19-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: remove master fifo support on tegra186 Tegra186 does not have master FIFO control register and instead uses FIFO control register like prior Tegra chipset. This patch fixes this and prevents crashing during boot when accessing FIFO control registers. Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
bb0e9b1d |
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15-Feb-2019 |
Colin Ian King <colin.king@canonical.com> |
i2c: tegra: change phrasing, "fallbacking" to "falling back" The phrasing in two dev_err messages is using fallbacking which os less understandable than "falling back", so fix this up. Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
0940d249 |
|
12-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: add i2c interface timing support This patch adds I2C interface timing registers support for proper bus rate configuration along with meeting the I2C spec setup and hold times based on the tuning performed on Tegra210, Tegra186 and Tegra194 platforms. I2C_INTERFACE_TIMING_0 register contains TLOW and THIGH field and Tegra I2C controller design uses them as a part of internal clock divisor. I2C_INTERFACE_TIMING_1 register contains the setup and hold times for start and stop conditions. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
80d40626 |
|
12-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: update transfer timeout Tegra194 allows max of 64K bytes and Tegra186 and prior allows max of 4K bytes of transfer per packet. one sec timeout is not enough for transfers more than 10K bytes at STD bus rate. This patch updates I2C transfer timeout based on the transfer size and I2C bus rate to allow enough time during max transfer size at lower bus speed. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
86c92b99 |
|
12-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Add DMA support This patch adds DMA support for Tegra I2C. Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for transfer size of the max FIFO depth and DMA mode is used for transfer size higher than max FIFO depth to save CPU overhead. PIO mode needs full intervention of CPU to fill or empty FIFO's and also need to service multiple data requests interrupt for the same transaction. This adds delay between data bytes of the same transfer when CPU is fully loaded and some slave devices has internal timeout for no bus activity and stops transaction to avoid bus hang. DMA mode is helpful in such cases. DMA mode is also helpful for Large transfers during downloading or uploading FW over I2C to some external devices. Tegra210 and prior Tegra chips use APBDMA driver which is replaced with GPCDMA on Tegra186 and Tegra194. This patch uses has_apb_dma flag in hw_feature to differentiate DMA driver change between Tegra chipset. APBDMA driver is registered from module-init level and this patch also has a change to register I2C driver at module-init level rather than subsys-init to avoid deferring I2C probe till APBDMA driver is registered. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
b03ff2a2 |
|
12-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: update maximum transfer size Tegra194 supports maximum 64K bytes per packet including 12 bytes of packet header irrespective of PIO or DMA mode transfer. This patch updates Tegra194 max write length to account for packet header size for transfers. Cc: stable@vger.kernel.org # 4.20+ Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
f4e3f4ae |
|
12-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: fix maximum transfer size Tegra186 and prior supports maximum 4K bytes per packet transfer including 12 bytes of packet header. This patch fixes max write length limit to account packet header size for transfers. Cc: stable@vger.kernel.org # 4.4+ Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
ce956242 |
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12-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: add bus clear Master Support Bus clear feature of Tegra I2C controller helps to recover from bus hang when I2C master loses the bus arbitration due to the slave device holding SDA LOW continuously for some unknown reasons. Per I2C specification, the device that held the bus LOW should release it within 9 clock pulses. During bus clear operation, Tegra I2C controller sends 9 clock pulses and terminates the transaction with STOP condition. Upon successful bus clear operation, bus goes to idle state and driver retries the transaction. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
ca865548 |
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12-Feb-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: sort all the include headers alphabetically This patch sorts all the include headers alphabetically for the I2C Tegra driver. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
b67d4530 |
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08-Jan-2019 |
Sowjanya Komatineni <skomatineni@nvidia.com> |
i2c: tegra: Fix Maximum transfer size Tegra194 supports maximum 64K Bytes transfer per packet. Tegra186 and prior supports maximum 4K Bytes transfer per packet. This patch fixes this payload difference between Tegra194 and prior Tegra chipsets using separate i2c_adapter_quirks. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
d6f04533 |
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17-Dec-2018 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Switch to SPDX identifier Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
0604ee4a |
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17-Dec-2018 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Add missing kerneldoc for some fields Not all fields were properly documented. Add kerneldoc for the missing fields to prevent the build from flagging them. Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
c990bbaf |
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17-Dec-2018 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Cleanup kerneldoc comments Some of the kerneldoc uses a strange spelling for abbreviations. Turn them into all-uppercase and clean up some whitespace issues while at it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
3782cc37 |
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11-Sep-2018 |
jun qian <hangdianqj@163.com> |
i2c: tegra: replace spin_lock_irqsave with spin_lock in ISR As you are already in ISR, it is unnecessary to call spin_lock_irqsave. Signed-off-by: jun qian <hangdianqj@163.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
c96c0f26 |
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23-Jul-2018 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
i2c: tegra: use core to detect 'no zero length' quirk And don't reimplement in the driver. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
54836e2d |
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03-Jul-2018 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Fix NACK error handling On Tegra30 Cardhu the PCA9546 I2C mux is not ACK'ing I2C commands on resume from suspend (which is caused by the reset signal for the I2C mux not being configured correctl). However, this NACK is causing the Tegra30 to hang on resuming from suspend which is not expected as we detect NACKs and handle them. The hang observed appears to occur when resetting the I2C controller to recover from the NACK. Commit 77821b4678f9 ("i2c: tegra: proper handling of error cases") added additional error handling for some error cases including NACK, however, it appears that this change conflicts with an early fix by commit f70893d08338 ("i2c: tegra: Add delay before resetting the controller after NACK"). After commit 77821b4678f9 was made we now disable 'packet mode' before the delay from commit f70893d08338 happens. Testing shows that moving the delay to before disabling 'packet mode' fixes the hang observed on Tegra30. The delay was added to give the I2C controller chance to send a stop condition and so it makes sense to move this to before we disable packet mode. Please note that packet mode is always enabled for Tegra. Fixes: 77821b4678f9 ("i2c: tegra: proper handling of error cases") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@vger.kernel.org
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#
c5907c6b |
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18-Jun-2018 |
Thierry Reding <treding@nvidia.com> |
i2c: tegra: Add support for Tegra194 In order to support advanced features, the I2C FIFO interface was changed in the version of the Tegra I2C controller found in Tegra194. The changes are backwards incompatible, so the driver needs to be programmed in a slightly different way on new chips. Add support for MST FIFO programming and add an OF match entry for Tegra194. At the same time, mark all prior generations of this controller as not having the MST FIFO interface. Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
535ba904 |
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13-May-2018 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Remove suspend-resume Nothing prevents I2C clients to access I2C while Tegra's driver is being suspended, this results in -EBUSY error returned to the clients and that may have unfortunate consequences. In particular this causes problems for the TPS6586x MFD driver which emits hundreds of "failed to read interrupt status" error messages on resume from suspend. This happens if TPS6586X is used to wake system from suspend by the expired RTC alarm timer because TPS6586X is an I2C device driver and its IRQ handler reads the status register while Tegra's I2C driver is suspended, i.e. just after kernel enabled IRQ's during of resume-from-suspend process. Note that the removed tegra_i2c_resume() invoked tegra_i2c_init() which performs HW reset. That seems was also not entirely correct because moving tegra_i2c_resume to an earlier stage of resume-from-suspend process causes I2C transfer to fail in the case of TPS6586X. It is fine to remove the HW-reinitialization for now because it should be only needed in a case of using lowest power-mode during suspend, which upstream kernel doesn't support. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
ae3923a2 |
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21-Aug-2017 |
Bhumika Goyal <bhumirks@gmail.com> |
i2c: busses: make i2c_adapter_quirks const Make these const as they are only stored as a reference in the quirks field of an i2c_adapter structure, which is const. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
94d3b651 |
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19-Jul-2017 |
Philipp Zabel <p.zabel@pengutronix.de> |
i2c: tegra: explicitly request exclusive reset control Commit a53e35db70d1 ("reset: Ensure drivers are explicit when requesting reset lines") started to transition the reset control request API calls to explicitly state whether the driver needs exclusive or shared reset control behavior. Convert all drivers requesting exclusive resets to the explicit API call so the temporary transition helpers can be removed. No functional changes. Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-i2c@vger.kernel.org Cc: linux-tegra@vger.kernel.org Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
fbf8090b |
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06-Sep-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Fix assignment of boolean variables Fix the following warnings reported by coccinelle for the Tegra I2C driver. drivers/i2c/busses/i2c-tegra.c:513:2-23: WARNING: Assignment of bool to 0/1 drivers/i2c/busses/i2c-tegra.c:539:3-24: WARNING: Assignment of bool to 0/1 Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
77821b46 |
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31-Aug-2016 |
Shardar Shariff Md <smohammed@nvidia.com> |
i2c: tegra: proper handling of error cases To summarize the issue observed in error cases: SW Flow: For i2c message transfer, packet header and data payload is posted and then required error/packet completion interrupts are enabled later. HW flow: HW process the packet just after packet header is posted, if ARB lost/NACK error occurs (SW will not handle immediately when error happens as error interrupts are not enabled at this point). HW assumes error is acknowledged and clears current data in FIFO, But SW here posts the remaining data payload which still stays in FIFO as stale data (data without packet header). Now once the interrupts are enabled, SW handles ARB lost/NACK error by clearing the ARB lost/NACK interrupt. Now HW assumes that SW attended the error and will parse/process stale data (data without packet header) present in FIFO which causes invalid NACK errors. Fix: Enable the error interrupts before posting the packet into FIFO which make sure HW to not clear the fifo. Also disable the packet mode before acknowledging errors (ARB lost/NACK error) to not process any stale data. As error interrupts are enabled before posting the packet header use spinlock to avoid preempting. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
2bc445e2 |
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31-Aug-2016 |
Shardar Shariff Md <smohammed@nvidia.com> |
i2c: tegra: use atomic poll function during configuration Use readl_poll_timeout_atomic() function as *wait_for_config_load() function can be called from interrupt context. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
89120d66 |
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31-Aug-2016 |
Shardar Shariff Md <smohammed@nvidia.com> |
i2c: tegra: add separate function for config_load programing Define separate function for configuration load register handling to make it use by different functions later. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
2148c01c |
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31-Aug-2016 |
Shardar Shariff Md <smohammed@nvidia.com> |
i2c: tegra: If fifo flush fails return error During i2c controller initialization, when fifo flush fails return error instead of returning the error during exit. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
685143a1 |
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31-Aug-2016 |
Shardar Shariff Md <smohammed@nvidia.com> |
i2c: tegra: use readl_poll_timeout after config_load reg programmed After CONFIG_LOAD register is programmed instead of explicitly waiting for timeout, use readl_poll_timeout() to check for register value to get updated or wait till timeout. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
718917b9 |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Add pinctrl support On Tegra124/132 the pins for I2C6 are shared with the Display Port AUX (DPAUX) channel and on Tegra210 the pins for I2C4 and I2C6 are shared with DPAUX1 and DPAUX0, respectively. The multiplexing of the pins is handled by a register in the DPAUX and so the Tegra DPAUX driver has been updated to register a pinctrl device for managing these pins. The pins for these particular I2C devices are bound to the I2C device prior to probing. However, these I2C devices are in a different power partition to the DPAUX devices that own the pins. Hence, it is desirable to place the pins in the 'idle' state and allow the DPAUX power partition to switch off, when these I2C devices is not in use. Therefore, add calls to place the I2C pins in the 'default' and 'idle' states when the I2C device is runtime resumed and suspended, respectively. Please note that the pinctrl functions that set the state of the pins check to see if the devices has pins associated and will return zero if they do not. Therefore, it is safe to call these pinctrl functions even for I2C devices that do not have any pins associated. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
1f50ad2c |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Add runtime power-management support Update the Tegra I2C driver to use runtime PM and move the code in the tegra_i2c_clock_enable/disable() functions to the PM runtime resume and suspend callbacks, respectively. Note that given that CONFIG_PM is not mandatory for Tegra, if CONFIG_PM is not enabled and so runtime PM is not enabled, ensure that the I2C clocks are turned on during probe and kept on by calling the resume callback directly. In the function tegra_i2c_init(), the variable 'err' does not need to be initialised to zero in tegra_i2c_init() because it is initialised when pm_runtime_get_sync() is called. Furthermore, to ensure we only return 0 from tegra_i2c_init(), it is necessary to re-initialise 'err' to 0 after a successful call to pm_runtime_get_sync() because it can return a positive value on success. However, alternatively re-initialise 'err' by using the return value of the function tegra_i2c_flush_fifos() because it can only be 0 or -ETIMEDOUT. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
f4c2d89b |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Simplify I2C resume The I2C adapter is unlocked regardless of whether the tegra_i2c_init() called during the resume is successful or not. However, if the tegra_i2c_init() is not successful, then ->is_suspended is not set to false. Simplify the resume code by only setting ->is_suspended to false if tegra_i2c_init() is successful and return the error code from tegra_i2c_init(). Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
0da9ab89 |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Use device name for adapter name All Tegra I2C devices have the name "Tegra I2C adapter" which is not very useful when viewing the I2C adapter names via the sysfs. Therefore, use the device name, which is unique for each I2C device, instead. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
a9e32cd8 |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Remove non device-tree support Tegra has only supported device-tree for platform/board configuration for quite some time now and so simplify the Tegra I2C driver by dropping code for non device-tree platforms/boards. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
e8e999cb |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Add missing new line characters Add missing new line characters for the various error messages. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
f5076685 |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Fix missing blank lines after declarations Checkpatch warns about missing blank lines after declarations in the Tegra I2C driver and so fix these. Note that the initialisation of 'val' to zero in tegra_dvc_init() is unnecessary and so remove this. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
2929be29 |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Use BIT macro Checkpatch warns about spacing around the '<<' operator in the Tegra I2C driver and so fix these by converting the bit definitions that are using this operator to use the BIT macro. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
c7ae44e8 |
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26-Aug-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Fix lines over 80 characters Checkpatch warns about some lines over 80 characters in the Tegra I2C driver and so fix these. While we are at it, prefix the second instance of "STOP condition" in the comment with a "the". Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
ea734404 |
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09-Aug-2016 |
Wolfram Sang <wsa-dev@sang-engineering.com> |
i2c: don't print error when adding adapter fails The core will do this for us now. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Peter Korsgaard <peter@korsgaard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Horman <nhorman@tuxdriver.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
eab09988 |
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14-Jun-2016 |
Jon Hunter <jonathanh@nvidia.com> |
i2c: tegra: Correct error path in probe Commit 497fbe24987b ("i2c: tegra: enable multi master mode for tegra210") enables the Tegra I2C 'div_clk' for adapters using the multi-master mode during the device probe. Although the probe error path was updated to disable the clock on probe failure, there is one place after calling tegra_i2c_init() where the clock will not be disabled on failure. Correct the error path so that the 'div_clk' is disabled if calling tegra_i2c_init() fails. Fixes: 497fbe24987b ("i2c: tegra: enable multi master mode for tegra210") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
21e9efd9 |
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25-Apr-2016 |
Shardar Shariff Md <smohammed@nvidia.com> |
i2c: tegra: disable clock before returning error Disable clock before returning error in tegra_i2c_init() as its leaves i2c clock ON in case of error and never turns off again as it will have unbalanced clock enable/disable Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
497fbe24 |
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14-Mar-2016 |
Shardar Shariff Md <smohammed@nvidia.com> |
i2c: tegra: enable multi master mode for tegra210 Enable multi-master mode in I2C_CNFG reg based on hw features. Using single/multi-master mode bit introduced for Tegra210, whereas multi-master mode is enabled by default in HW for T124 and earlier Tegra SOC. Enabling this bit doesn't explicitly start treating the bus has having multiple masters, but will start checking for arbitration lost and reporting when it occurs. The Tegra210 I2C controller supports single/multi master mode. Add chipdata for Tegra210 and its compatibility string so that Tegra210 will select data that enables multi master mode correctly. Do below prerequisites for multi-master bus if "multi-master" dt property entry is added. 1. Enable 1st level clock always set. 2. Disable 2nd level clock gating (slcg which is supported from T124 SOC and later chips) Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
da4753e9 |
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21-Feb-2016 |
Wolfram Sang <wsa@kernel.org> |
i2c: tegra: don't open code of_device_get_match_data() This change will also make Coverity happy by avoiding a theoretical NULL pointer dereference; yet another reason is to use the above helper function to tighten the code and make it more readable. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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#
26f590e6 |
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06-Sep-2015 |
Barry Song <21cnbao@gmail.com> |
i2c: tegra: drop duplicated code for assigning algo This code is repeated in probe: i2c_dev->adapter.algo = &tegra_i2c_algo; Cc: Donglin Peng <pengdonglin137@163.com> Signed-off-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
d57f5ded |
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30-Jun-2015 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: add support for fast plus (FM+) mode clock rate Tegra I2C controller required to configure the clock divisor register inside controller to different value based on the clock speed. The recommended clock divisor for the I2C controller for standard/fast mode is 0x19 and for fast-mode plus is 0x10. Add support to configure clock divisor register of I2C controller based on bus clock rate. This clock divisor is supported form T114 onwards. Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
6f4664b2 |
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30-Jun-2015 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: update CONFIG_LOAD for new conifiguration Once the new configuration is set on the conifg register of I2C controller, it is require to update the CONFIG_LOAD register to transfer the new SW configuration to actual HW internal registers that would be used in the actual logic. It is like, SW is programming only shadow registers through regular configuration and when these load_config bit fields are set to 1, it causes the regular/shadows registers configuration transferred to the HW internal active registers. So SW has to set these bit fields at the end of all regular registers configuration. And these config_load bits are HW auto-clear bits. HW clears these bit fields once the register configuration is moved to HW internal active registers. So SW has to wait until these bits are auto-cleared before going for any further programming This mechanism is supported on T124 and after this SoCs. Signed-off-by: Chaitanya Bandi <bandik@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
3aaa34b9 |
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16-Jun-2015 |
Wolfram Sang <wsa@kernel.org> |
i2c: tegra: apply size limit quirk payload_size is a 12 bit field in the HW register, so add a limit for this size. That way we gracefully reject the message beforehand instead of generating an OOPS while transferring. Verified using some older Tegra2 documentation and a more recent Jetson TK1 board. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
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#
4bb28e37 |
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16-Jun-2015 |
Wolfram Sang <wsa@kernel.org> |
i2c: tegra: don't advertise SMBUS_QUICK This HW cannot send 0-byte-length messages and the driver discards them. So, we should not advertise SMBUS_QUICK. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
6973a39c |
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01-Mar-2015 |
Nicholas Mc Guire <hofrat@osadl.org> |
i2c: tegra: match return type of wait_for_completion_timeout return type of wait_for_completion_timeout is unsigned long not int. As ret was only used for wait_for_completion_timeout here it is renamed to time_left the type changed to unsigned long and references fixed up. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
8c340f60 |
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26-Jan-2015 |
Dmitry Osipenko <digetx@gmail.com> |
i2c: tegra: Maintain CPU endianness Support CPU BE mode by adding endianness conversion for memcpy interactions. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
1ecc4335 |
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20-Oct-2014 |
Wolfram Sang <wsa@kernel.org> |
i2c: busses: drop owner assignment from platform_drivers A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
c9a9ef41 |
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04-Sep-2014 |
Mikko Perttunen <mperttunen@nvidia.com> |
i2c: tegra: Move clk_prepare/clk_set_rate to probe Currently the i2c-tegra bus driver prepares, enables and set_rates its clocks separately for each transfer. This causes locking problems when doing I2C transfers from clock notifiers; see http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/268653.html This patch moves clk_prepare/unprepare and clk_set_rate calls to the probe function, leaving only clk_enable/disable to be done on each transfer. This solves the locking issue. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
6025189a |
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10-Jul-2014 |
Wolfram Sang <wsa@kernel.org> |
i2c: i2c-tegra: Drop class based scanning to improve bootup time This driver has been flagged to drop class based instantiation. The removal improves boot-up time and is unneeded for embedded controllers. Users have been warned to switch for some time now, so we can actually do the removal. Keep the DEPRECATED flag, so the core can inform users that the behaviour finally changed now. After another transition period, this flag can go, too. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com>
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#
46797a2a |
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12-May-2014 |
Jingoo Han <jg1.han@samsung.com> |
i2c: remove unnecessary OOM messages The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. For example, k.alloc and v.alloc failures use dump_stack(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Jean Delvare <jdelvare@suse.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Felipe Balbi <balbi@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
02c2a282 |
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10-Feb-2014 |
Wolfram Sang <wsa@kernel.org> |
i2c: i2c-tegra: deprecate class based instantiation Warn users that class based instantiation is going away soon in favour of more robust probing and faster bootup times. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Stephen Warren <swarren@nvidia.com>
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#
dda9d6a8 |
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06-Nov-2013 |
Stephen Warren <swarren@nvidia.com> |
i2c: tegra: use reset framework Tegra's clock driver now provides an implementation of the common reset API (include/linux/reset.h). Use this instead of the old Tegra- specific API; that will soon be removed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Thierry Reding <treding@nvidia.com>
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#
16735d02 |
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14-Nov-2013 |
Wolfram Sang <wsa@kernel.org> |
tree-wide: use reinit_completion instead of INIT_COMPLETION Use this new function to make code more comprehensible, since we are reinitialzing the completion, not initializing. [akpm@linux-foundation.org: linux-next resyncs] Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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#
687b81d0 |
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10-Jul-2013 |
Wolfram Sang <wsa@kernel.org> |
i2c: move OF helpers into the core I2C of helpers used to live in of_i2c.c but experience (from SPI) shows that it is much cleaner to have this in the core. This also removes a circular dependency between the helpers and the core, and so we can finally register child nodes in the core instead of doing this manually in each driver. So, fix the drivers and documentation, too. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
00d083f9 |
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12-May-2013 |
Wolfram Sang <wsa@kernel.org> |
drivers/i2c/busses: don't check resource with devm_ioremap_resource devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Barry Song <Baohua.Song@csr.com>
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#
49a64ac5 |
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21-Mar-2013 |
Stephen Warren <swarren@nvidia.com> |
i2c: tegra: assume CONFIG_OF, remove platform data Tegra only supports, and always enables, device tree. Remove all ifdefs and runtime checks for DT support from the driver. Platform data is therefore no longer required. Delete the header that defines it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
132c803f |
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14-Mar-2013 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: check the clk_prepare_enable() return value NVIDIA's Tegra SoC allows read/write of controller register only if controller clock is enabled. System hangs if read/write happens to registers without enabling clock. clk_prepare_enable() can be fail due to unknown reason and hence adding check for return value of this function. If this function success then only access register otherwise return to caller with error. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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#
58823c72 |
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14-Feb-2013 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: remove warning dump if timeout happen in transfer If timeout error occurs in the i2c transfer then it was dumping warning of call stack. Remove the warning dump as there is may be possibility that some slave devices are busy and not responding the i2c communication. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
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#
61fd290d |
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11-Jan-2013 |
Prashant Gaikwad <pgaikwad@nvidia.com> |
ARM: tegra: migrate to new clock code Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
2a2897ba |
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05-Jan-2013 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: add support for Tegra114 SoC NVIDIA's Tegra114 has following enhanced feature in i2c controller: - Enable/disable control for per packet transfer complete interrupt. Earlier SoCs could not disable this. - Single clock source for standard/fast and HS mode clock speed. The clock divisor for fast/standard mode is added into the i2c controller to meet the HS and standard/fast mode of clock speed from single source. Add support for the above feature to make it functional on T114 SOCs. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
84dbf809 |
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21-Jan-2013 |
Thierry Reding <thierry.reding@avionic-design.de> |
i2c: Convert to devm_ioremap_resource() Convert all uses of devm_request_and_ioremap() to the newly introduced devm_ioremap_resource() which provides more consistent error handling. devm_ioremap_resource() provides its own error messages so all explicit error messages can be removed from the failure code paths. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
0b255e92 |
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27-Nov-2012 |
Bill Pemberton <wfp5p@virginia.edu> |
i2c: remove __dev* attributes from subsystem CONFIG_HOTPLUG is going away as an option. As result the __dev* markings will be going away. Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Acked-by: Peter Korsgaard <peter.korsgaard@barco.com> (for ocores and mux-gpio) Acked-by: Havard Skinnemoen <hskinnemoen@gmail.com> (for i2c-gpio) Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> (for puf3) Acked-by: Barry Song <baohua.song@csr.com> (for sirf) Reviewed-by: Jean Delvare <khali@linux-fr.org> [wsa: Fixed "foo* bar" flaws while we are here] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
91b370a0 |
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01-Nov-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: set irq name as device name When watching the irqs name of tegra i2c, all instances irq name shows as tegra_i2c. Passing the device name properly to have the irq names with instance like tegra-i2c.0, tegra-i2c.1 etc. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
fd301cc4 |
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18-Aug-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: dynamically control fast clk Tegra I2C driver enables the fast clock during initialization and does not disable till driver removed. Enable this clock before transfer and disable after transfer done. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
6ad068ed |
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18-Aug-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: I2_M_NOSTART functionality not supported in Tegra20 Tegra20 i2c controller does not support the continue transfer which implements the I2C_M_NOSTART functionality of i2c protocol mangling. Removing the I2C_M_NOSTART functionality support for Tegra20. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
14e92bd4 |
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08-Aug-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: pass proper name for getting clock Tegra's i2c controller require two clock sources named as div_clk and fast_clk. This change make sure that driver pass the correct clock's name when it acquires clock handle. Also change the variable name to reflect the correct clock handles. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
371e67c9 |
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18-Aug-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: protect suspend/resume callbacks with CONFIG_PM_SLEEP The CONFIG_PM doesn't actually enable any of the PM callbacks, it only allows to enable CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME. This means if CONFIG_PM is used to protect system sleep callbacks then it may end up unreferenced if only runtime PM is enabled. Hence protecting sleep callbacks with CONFIG_PM_SLEEP. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
5db20c49 |
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24-Jul-2012 |
Wolfram Sang <wsa@kernel.org> |
Revert "i2c: tegra: convert normal suspend/resume to *_noirq" This reverts commit 7c86d44cda2e715bc95f525fd0eac4bd6a66998e. Stephen says: IIRC, I proposed it before solely to solve some suspend/resume ordering issues, and Colin Cross NAKd it. These days, deferred probe should make this change unnecessary. Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
7c86d44c |
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10-Jul-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: convert normal suspend/resume to *_noirq To provide the late suspend and early resume for i2c driver, convert the suspend/resume as suspend-> suspend_noirq resume -> resume_noirq Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [wsa: fixed up to match previous pm_ops change] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
6a7b3c3c |
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11-Jul-2012 |
Rafael J. Wysocki <rjw@rjwysocki.net> |
i2c-tegra: Use struct dev_pm_ops for power management Make the Tegra I2C controller driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> [wsa] adapt to of_match_ptr change Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
02d8bf8d |
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10-Jul-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: use of_match_ptr() for match_table initialization In place of defining match_table for non-DT based as NULL, use of_match_ptr() for initialzing the of_match_table. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
9dce4bca |
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10-Jul-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: use clk_disable_unprepare in place of clk_disable Use clk_disable_unprepare() inplace of clk_disable(). This was missed as part of moving clock enable/disable to prepare/unprepare for using the common clock framework. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
57c0dc3e |
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10-Jul-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: remove unused member variable Remove unused member variable "iomem" of the i2c device structure. This variable becomes unused when converted all allocation to devm_* in following change: i2c: tegra: make all resource allocation through devm_* Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
9cbb6b2b |
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13-Jun-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: make all resource allocation through devm_* Use the devm_* for the memory region allocation, interrupt request, clock handler request. By doing this, it does not require to explicitly free it and hence saving some code. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
c8f5af2f |
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13-Jun-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: support for I2C_M_NOSTART functionality Adding support for functionality I2C_M_NOSTART. When multiple message transfer request made through i2c and if any message is flagged with I2C_M_NOSTART then it will not send the start/repeat-start and address of that message i.e. sends data directly. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
a7018104 |
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13-Jun-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: add PROTOCOL_MANGLING as supported functionality. The Tegra i2c driver supports the I2C_M_IGNORE_NAK and hence returning I2C_FUNC_PROTOCOL_MANGLING as supported functionality. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
ec7aaca2 |
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13-Jun-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: make sure register writes completes The Tegra PPSB (an peripheral bus) queues writes transactions. In order to guarantee that writes have completed before a certain time, a read transaction to a register on the same bus must be executed. This is necessary in situations such as when clearing an interrupt status or enable, so that when returning from an interrupt handler, the HW has already de-asserted its interrupt status output, which will avoid spurious interrupts. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
6f786aad |
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04-Jun-2012 |
Prashant Gaikwad <pgaikwad@nvidia.com> |
i2c: tegra: Add clk_prepare/clk_unprepare Use clk_prepare/clk_unprepare as required by the generic clk framework. Cc: w.sang@pengutronix.de Cc: linux-i2c@vger.kernel.org Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
c889e91d |
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06-May-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: notify transfer-complete after clearing status. The notification of the transfer complete by calling complete() should be done after clearing all interrupt status. This avoids the race condition of misconfigure the i2c controller in multi-core environment. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: stable@kernel.org
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#
353f56b5 |
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23-Apr-2012 |
Laxman Dewangan <ldewangan@nvidia.com> |
i2c: tegra: fix 10bit address configuration The slave address of device to be configured in packet header as follows: 7 bit address: PacketHeader3[7:1] 10 bit address: PacketHeader3[9:0] Fixing the code to make packet header3 properly. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
f70893d0 |
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01-Apr-2012 |
Alok Chauhan <alokc@nvidia.com> |
i2c: tegra: Add delay before resetting the controller after NACK NACK interrupt is generated before I2C controller generates the STOP condition on bus. Because of this reset of controller is happening before I2C controller could complete STOP condition. So wait for some time before resetting the controller so that STOP condition has delivered properly on bus. Added delay of 2 clock period before resetting the controller in case of NACK error. Signed-off-by: Alok Chauhan <alokc@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> [wsa: Reworded the commit msg and code comment a bit] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
bf6c2de1 |
|
03-Feb-2012 |
Alok Chauhan <alokc@nvidia.com> |
i2c: tegra: Remove unnecessary write to INT_STATUS The write is not necessary and may cause the I2C controller to misbehave. With this fix, I2C on Tegra30 works (at least, running i2cdump repeatedly on the WM8903 on Cardhu's I2C5/DVC bus). Signed-off-by: Alok Chauhan <alokc@nvidia.com> [swarren: Reworded commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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#
218d06d7 |
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19-Dec-2011 |
Shubhrajyoti Datta <omaplinuxkernel@gmail.com> |
i2c: tegra: Add devexit_p() for remove It was originally missed in the __devinit/__devexit annotations. Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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#
68fb6695 |
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17-Dec-2011 |
Stephen Warren <swarren@nvidia.com> |
i2c: tegra: Support DVC controller in device tree One of the Tegra I2C blocks is inside the DVC (Digital Voltage Controller) block. This block is identical to the rest of the I2C blocks, except that it only supports master mode, it has registers moved around, and it needs some extra init to get it into I2C mode. The register moves are handled by i2c_readl and i2c_writel This patch adds a new compatible value for controllers of this "DVC" type; I figured that this approach was reasonable, as opposed to adding an is-dvc property under the existing compatible value, since the HW truly is different. v2: Call of_device_is_compatible() to determine is_dvc, instead of storing the flag in tegra_i2c_of_match[]'s .data field. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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#
92891da1 |
|
17-Dec-2011 |
Stephen Warren <swarren@nvidia.com> |
i2c: tegra: Add __devinit/exit to probe/remove This fixes some section mismatch build warnings. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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#
93cf5d75 |
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29-Jul-2011 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
i2c: Add module.h to modular files prev. implicitly getting it These files use interfaces from linux/module.h, so they must include that file to avoid build errors when the implicit presence of module.h is removed. [with i2c-pxa-pci.c fix from Randy Dunlap <rdunlap@xenotime.net>] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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#
f533c61e |
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12-Oct-2011 |
Olof Johansson <olof@lixom.net> |
i2c-tegra: __iomem annotation fix drivers/i2c/busses/i2c-tegra.c:585:7: warning: incorrect type in assignment (different address spaces) drivers/i2c/busses/i2c-tegra.c:585:7: expected void *base drivers/i2c/busses/i2c-tegra.c:585:7: got void [noderef] <asn:2>* drivers/i2c/busses/i2c-tegra.c:619:16: warning: incorrect type in assignment (different address spaces) drivers/i2c/busses/i2c-tegra.c:619:16: expected void [noderef] <asn:2>*base drivers/i2c/busses/i2c-tegra.c:619:16: got void *base drivers/i2c/busses/i2c-tegra.c:689:10: warning: incorrect type in argument 1 (different address spaces) drivers/i2c/busses/i2c-tegra.c:689:10: expected void volatile [noderef] <asn:2>*addr drivers/i2c/busses/i2c-tegra.c:689:10: got void *base Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by; Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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#
96219c3a |
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30-Aug-2011 |
Doug Anderson <dianders@chromium.org> |
i2c-tegra: fix possible race condition after tx In tegra_i2c_fill_tx_fifo, once we have finished pushing all the bytes to the I2C hardware controller, the interrupt might happen before we have updated i2c_dev->msg_buf_remaining at the end of the function. Then, in tegra_i2c_isr, we will call again tegra_i2c_fill_tx_fifo triggering weird behaviour. This has been shown to happen under real conditions. Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Rhyland Klein <rklein@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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#
048e29cf |
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30-Aug-2011 |
Mike Rapoport <rppt@kernel.org> |
i2c-tegra: add I2C_FUNC_SMBUS_EMUL Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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406bd18a |
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30-Aug-2011 |
John Bonesio <bones@secretlab.ca> |
i2c-tegra: Add of_match_table This patch was intended to be part of 7ca2d1a105a239e300b937e9c41a10a4bd08f569 "i2c: Tegra: Add DeviceTree support". However, an early version of that patch, which was missing a chunk, was applied to next-i2c. This change is that missing chunk. Signed-off-by: John Bonesio <bones@secretlab.ca> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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5c470f39 |
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22-Jun-2011 |
John Bonesio <bones@secretlab.ca> |
i2c: Tegra: Add DeviceTree support This patch modifies the tegra i2c driver so that it can be initiailized using the device tree along with the devices connected to the i2c bus. Signed-off-by: John Bonesio <bones@secretlab.ca> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: OIof Johansson <olof@lixom.net> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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5afa9d35 |
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06-Jun-2011 |
Stephen Warren <swarren@nvidia.com> |
i2c: tegra: Assign unused slave address On Tegra, we should always use the "new" I2C slave controller, to avoid issues with the old controller. This was implemented in commit 65a1a0a "i2c: tegra: Enable new slave mode." There is currently no driver for the Tegra I2C slave controller upstream. Additionally, the controller cannot be completely disabled. Instead, we need to: a) Set I2C_SL_CNFG_NACK to make the controller automatically NACK any incoming transactions. b) The controller's definition of NACK isn't identical to the I2C protocol's definition. Specifically, it will perform a standard NACK, but *also* continue to hold the clock line low in expectation of receiving more data. This can hang the bus, or at least cause transaction timeouts, if something starts a transaction that matches the controller's slave address. Since the default address is 0x00, the general call address, this does occur in practice. To avoid this, we explicitly program a slave address that is reserved for future expansion. For current boards, this guarantees the address will never be used. If a future board ever needs to use this address, we can add platform data to determine a board-specific safe address. 0xfc is picked by this patch. This patch is based on a change previously posted by: Wei Ni <wni@nvidia.com> http://www.spinics.net/lists/linux-i2c/msg05437.html In turned based on internal changes by: Bharat Nihalani <bnihalani@nvidia.com> A semantically equivalent change has been contained in the various ChromeOS kernels for a while. I tested this change on top of 3.0-rc2 on Harmony, and interacted with the WM8903 I2C-based audio codec. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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40abcf77 |
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25-Apr-2011 |
Jay Cheng <jacheng@nvidia.com> |
i2c: tegra: Add de-bounce cycles. This enables debouncing of the I2C lines. The debounce period is 2 * the debounce register field value, in terms of the I2C block's main clock. The Tegra TRM indicates that a setting yielding >50nS is desirable. Hence, a setting of 2 => 4 clocks @ 72MHz => ~55nS. Signed-off-by: Ken Radtke <kradtke@nvidia.com> [swarren: Added commit description body, Fixed 80-column limit, Reverted file permission change] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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2078cf3b |
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25-Apr-2011 |
Erik Gilling <konkers@android.com> |
i2c: tegra: fix repeated start handling A repeated start should be used for all but the last msg in an xfer. The NOSTART flag is for skipping the START frame (addr/rw) Signed-off-by: Erik Gilling <konkers@android.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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cb63c62d |
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25-Apr-2011 |
Todd Poynor <toddpoynor@google.com> |
i2c: tegra: recover from spurious interrupt storm Re-init the I2C controller when an IRQ arrives with no I2C_INT_STATUS bits set to indicate why the interrupt was sent. Storms of such mystery interrupts are infrequently seen. Dump some more status when these interrupts arrive. Set an error for the current request and wake up the requester (rather than timing out the request or possibly silently ignoring the interrupts). If the I2C block is inside the DVC, also ACK the DVC I2C transfer done interrupt in the ISR error return path, as is done for the normal return path. Signed-off-by: Todd Poynor <toddpoynor@google.com> [swarren: Fix minor checkpatch whitespace issue, commit tag] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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65a1a0ac |
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25-Apr-2011 |
Kenneth Waters <kwaters@chromium.org> |
i2c: tegra: Enable new slave mode. For Tegra i2c controller to function properly new slave mode must be enabled. swarren notes: In particular, I found this was needed when working on enabling the Tegra audio driver on the Seaboard board. There are two different PCB layouts for this board; a "clamshell" version, which works just fine without this change, and the original non-clamshell version, which needs this change in order for I2C to operate correctly. Without it, I2C probing fails for some devices, e.g. with: wm8903 0-001a: Device with ID register 0 is not a WM8903 wm8903 0-001a: asoc: failed to probe CODEC wm8903.0-001a: -19 asoc: failed to instantiate card tegra-wm8903: -19 ALSA device list: No soundcards found. Signed-off-by: Rakesh Iyer <riyer@nvidia.com> Cc: stable <stable@kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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25985edc |
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30-Mar-2011 |
Lucas De Marchi <lucas.demarchi@profusion.mobi> |
Fix common misspellings Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
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db811ca0 |
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20-Feb-2011 |
Colin Cross <ccross@android.com> |
i2c: tegra: Add i2c support Adds I2C bus driver for nVidia Tegra SoCs. Tegra includes 4 I2C controllers, one of which is inside the Dynamic Voltage Controller and has a slightly different register map. Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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