#
bcfaaa97 |
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26-Aug-2023 |
Daniel Golle <daniel@makrotopia.org> |
i2c: mt65xx: allow optional pmic clock Using the I2C host controller on the MT7981 SoC requires 4 clocks to be enabled. One of them, the pmic clk, is only enabled in case 'mediatek,have-pmic' is also set which has other consequences which are not desired in this case. Allow defining a pmic clk even in case the 'mediatek,have-pmic' propterty is not present and the bus is not used to connect to a pmic, but may still require to enable the pmic clock. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
59738ab2 |
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14-Jul-2023 |
Rob Herring <robh@kernel.org> |
I2C: Explicitly include correct DT includes The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
ba733668 |
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22-Jul-2023 |
Paul Cercueil <paul@crapouillou.net> |
i2c: mt65xx: Remove #ifdef guards for PM related functions Use the new PM macros for the suspend and resume functions to be automatically dropped by the compiler when CONFIG_PM or CONFIG_PM_SLEEP are disabled, without having to use #ifdef guards. This has the advantage of always compiling these functions in, independently of any Kconfig option. Thanks to that, bugs and other regressions are subsequently easier to catch. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20230722115046.27323-13-paul@crapouillou.net Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
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#
e190a0c3 |
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08-May-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
i2c: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Alain Volmat <alain.volmat@foss.st.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Acked-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Jochen Friedrich <jochen@scram.de> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Vadim Pasternak <vadimp@nvidia.com> Reviewed-by: Asmaa Mnebhi <asnaa@nvidia.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Chris Pringle <chris.pringle@phabrix.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Tali Perry <tali.perry@nuvoton.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
f82fd184 |
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10-Apr-2023 |
Daniel Golle <daniel@makrotopia.org> |
i2c: mediatek: add support for MT7981 SoC Add support for the I2C units found in the MediaTek MT7981 and MT7988 SoCs. Just like other recent MediaTek I2C units that also uses v3 register offsets (which differ from v2 only by OFFSET_SLAVE_ADDR being 0x94 instead of 0x4). Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
ee4de636 |
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10-Mar-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
i2c: mt65xx: drop of_match_ptr for ID table The driver can match only via the DT table so the table should be always used and the of_match_ptr does not have any sense (this also allows ACPI matching via PRP0001, even though it might not be relevant here). drivers/i2c/busses/i2c-mt65xx.c:514:34: error: ‘mtk_i2c_of_match’ defined but not used [-Werror=unused-const-variable=] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Guenter Roeck <groeck@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
83a7f470 |
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19-Jan-2023 |
ye xingchen <ye.xingchen@zte.com.cn> |
i2c: mt65xx: Use devm_platform_get_and_ioremap_resource() Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: ye xingchen <ye.xingchen@zte.com.cn> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
e0b7afc0 |
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08-Oct-2022 |
Frank Wunderlich <frank-w@public-files.de> |
i2c: mediatek: add mt7986 support Add i2c support for MT7986 SoC. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
ea1558ce |
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11-Aug-2022 |
Wolfram Sang <wsa+renesas@sang-engineering.com> |
i2c: move drivers from strlcpy to strscpy Follow the advice of the below link and prefer 'strscpy'. Conversion is easy because no driver used the return value and has been done with a simple sed invocation. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
1b48006e |
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06-Aug-2022 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: add i2c compatible for MT8188 Add i2c compatible for MT8188 and added mt_i2c_regs_v3[], since MT8188 i2c OFFSET_SLAVE_ADDR register changed from 0x04 to 0x94. Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
de87b603 |
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22-May-2022 |
Christophe JAILLET <christophe.jaillet@wanadoo.fr> |
i2c: mediatek: Fix an error handling path in mtk_i2c_probe() The clsk are prepared, enabled, then disabled. So if an error occurs after the disable step, they are still prepared. Add an error handling path to unprepare the clks in such a case, as already done in the .remove function. Fixes: 8b4fc246c3ff ("i2c: mediatek: Optimize master_xfer() and avoid circular locking") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
8b4fc246 |
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11-Apr-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
i2c: mediatek: Optimize master_xfer() and avoid circular locking Especially (but not only) during probe, it may happen that multiple devices are communicating via i2c (or multiple i2c busses) and sometimes while others are probing asynchronously. For example, a Cr50 TPM may be filling entropy (or userspace may be reading random data) while the rt5682 (i2c) codec driver reads/sets some registers, like while getting/setting a clock's rate, which happens both during probe and during system operation. In this driver, the mtk_i2c_transfer() function (which is the i2c .master_xfer() callback) was granularly managing the clocks by performing a clk_bulk_prepare_enable() to start them and its inverse. This is not only creating possible circular locking dependencies in the some cases (like former explanation), but it's also suboptimal, as clk_core prepare/unprepare operations are using mutex locking, which creates a bit of unwanted overhead (for example, i2c trackpads will call master_xfer() every few milliseconds!). With this commit, we avoid both the circular locking and additional overhead by changing how we handle the clocks in this driver: - Prepare the clocks during probe (and PM resume) - Enable/disable clocks in mtk_i2c_transfer() - Unprepare the clocks only for driver removal (and PM suspend) For the sake of providing a full explanation: during probe, the clocks are not only prepared but also enabled, as this is needed for some hardware initialization but, after that, we are disabling but not unpreparing them, leaving an expected state for the aforementioned clock handling strategy. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
1bff55b5 |
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06-Mar-2022 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: Add i2c compatible for Mediatek MT8168 Add i2c compatible for MT8168. Compare to MT2712 i2c controller, MT8168 need to synchronize signal with dma. Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
0016a32f |
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03-Mar-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
i2c: mt65xx: Simplify with clk-bulk Since depending on the SoC or specific bus functionality some clocks may be optional, we cannot get the benefit of using devm_clk_bulk_get() but, by migrating to clk-bulk, we are able to remove the custom functions mtk_i2c_clock_enable() and mtk_i2c_clock_disable(), increasing common APIs usage, hence (lightly) decreasing kernel footprint. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
5b9df0ac |
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30-Sep-2020 |
Xu Wang <vulab@iscas.ac.cn> |
i2c: mediatek: remove redundant null check Because clk_disable_unprepare already checked NULL clock parameter, so the additional checks are unnecessary, just remove it Signed-off-by: Xu Wang <vulab@iscas.ac.cn> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
b5a796c6 |
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17-Feb-2022 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: modify bus speed calculation formula When clock-div is 0 or greater than 1, the bus speed calculated by the old speed calculation formula will be larger than the target speed. So we update the formula. Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
93470531 |
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25-Jan-2022 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: Add i2c compatible for Mediatek MT8186 Add i2c compatible for MT8186. Compare to MT8192 i2c controller, MT8186 doesn't need handshake signal witch apdma. Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
cc28e578 |
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10-Oct-2021 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: Dump i2c/dma register when a timeout occurs When a timeout error occurs in i2c transter, it is usually related to the i2c/dma IP hardware configuration. Therefore, the purpose of this patch is to dump the key register values of i2c/dma when a timeout occurs in i2c for debugging. Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
e3e4949e |
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10-Oct-2021 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: Reset the handshake signal between i2c and dma Due to changes in the hardware design of the handshaking signal between i2c and dma, it is necessary to reset the handshaking signal before each transfer to ensure that the multi-msgs can be transferred correctly. Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
b8228aea |
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17-Sep-2021 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: fixing the incorrect register offset The reason for the modification here is that the previous offset information is incorrect, OFFSET_DEBUGSTAT = 0xE4 is the correct value. Fixes: 25708278f810 ("i2c: mediatek: Add i2c support for MediaTek MT8183") Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
3bce7703 |
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17-Sep-2021 |
Kewei Xu <kewei.xu@mediatek.com> |
i2c: mediatek: Add OFFSET_EXT_CONF setting back In the commit be5ce0e97cc7 ("i2c: mediatek: Add i2c ac-timing adjust support"), we miss setting OFFSET_EXT_CONF register if i2c->dev_comp->timing_adjust is false, now add it back. Fixes: be5ce0e97cc7 ("i2c: mediatek: Add i2c ac-timing adjust support") Signed-off-by: Kewei Xu <kewei.xu@mediatek.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
58fb7c64 |
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04-Jul-2021 |
Sergey Shtylyov <s.shtylyov@omp.ru> |
i2c: mt65xx: fix IRQ check Iff platform_get_irq() returns 0, the driver's probe() method will return 0 early (as if the method's call was successful). Let's consider IRQ0 valid for simplicity -- devm_request_irq() can always override that decision... Fixes: ce38815d39ea ("I2C: mediatek: Add driver for MediaTek I2C controller") Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
9029b9b2 |
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27-May-2021 |
Hsin-Yi Wang <hsinyi@chromium.org> |
i2c: mediatek: mt65xx: add optional vbus-supply Add vbus-supply which provides power to SCL/SDA. Pass this regulator into core so it can be turned on/off for low power mode support. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
7fb9dc81 |
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27-May-2021 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Rename i2c irq name Rename i2c irq name with dev_name() which can provide unique naming in /proc/interrupts for each instance of the I2C IP core. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
fed1bd51 |
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27-May-2021 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Disable i2c start_en and clear intr_stat brfore reset The i2c controller driver do dma reset after transfer timeout, but sometimes dma reset will trigger an unexpected DMA_ERR irq. It will cause the i2c controller to continuously send interrupts to the system and cause soft lock-up. So we need to disable i2c start_en and clear intr_stat to stop i2c controller before dma reset when transfer timeout. Fixes: aafced673c06("i2c: mediatek: move dma reset before i2c reset") Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
a80f2494 |
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17-Apr-2021 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Use scl_int_delay_ns to compensate clock-stretching The parameters of tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device clock-stretch or circuit loss, we could get a suitable scl_int_delay_ns from i2c_timings to compensate these parameters to meet the spec via EXT_CONF register. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
3186b880 |
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17-Apr-2021 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Fix wrong dma sync flag The right flag is apdma_sync when apdma remove hand-shake signel. Fixes: 05f6f7271a38 ("i2c: mediatek: Fix apdma and i2c hand-shake timeout") Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
63ce8e3d |
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17-Apr-2021 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Fix send master code at more than 1MHz There are some omissions in the previous patch about replacing I2C_MAX_FAST_MODE__FREQ with I2C_MAX_FAST_MODE_PLUS_FREQ and need to fix it. Fixes: b44658e755b5("i2c: mediatek: Send i2c master code at more than 1MHz") Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
de96c394 |
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09-Jan-2021 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Move suspend and resume handling to NOIRQ phase Some i2c device driver indirectly uses I2C driver when it is now being suspended. The i2c devices driver is suspended during the NOIRQ phase and this cannot be changed due to other dependencies. Therefore, we also need to move the suspend handling for the I2C controller driver to the NOIRQ phase as well. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
05f6f727 |
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24-Dec-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Fix apdma and i2c hand-shake timeout With the apdma remove hand-shake signal, it requirs special operation timing to reset i2c manually, otherwise the interrupt will not be triggered, i2c transmission will be timeout. Fixes: 8426fe70cfa4("i2c: mediatek: Add apdma sync in i2c driver") Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
aafced67 |
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30-Oct-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: move dma reset before i2c reset The i2c driver default do dma reset after i2c reset, but sometimes i2c reset will trigger dma tx2rx, then apdma write data to dram which has been i2c_put_dma_safe_msg_buf(kfree). Move dma reset before i2c reset in mtk_i2c_init_hw to fix it. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
b44658e7 |
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17-Sep-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Send i2c master code at more than 1MHz The master code needs to being sent when the speed is more than I2C_MAX_FAST_MODE_PLUS_FREQ, not I2C_MAX_FAST_MODE_FREQ in the latest I2C-bus specification and user manual. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
ff6f3aff |
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17-Sep-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Fix generic definitions for bus frequency The max frequency of mediatek i2c controller driver is I2C_MAX_HIGH_SPEED_MODE_FREQ, not I2C_MAX_FAST_MODE_PLUS_FREQ. Fix it. Fixes: 90224e6468e1 ("i2c: drivers: Use generic definitions for bus frequencies") Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
b0102a89 |
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07-Aug-2020 |
Matthias Brugger <mbrugger@suse.com> |
i2c: mediatek: Fix i2c_spec_values description The struct i2c_spec_values have it's members documented but is missing the starting '@', which leads to warings like: drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member 'min_low_ns' not described in 'i2c_spec_values' We also delete min_high_ns member as it is not used in the code. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
789e67ba |
|
05-Aug-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add i2c compatible for MediaTek MT8192 Add i2c compatible for MT8192. Compare to MT8183 i2c controller, MT8192 support more then 8GB DMA mode. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
908d9843 |
|
05-Aug-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add access to more than 8GB dram in i2c driver Newer MTK chip support more than 8GB of dram. Replace support_33bits with more general dma_max_support and remove mtk_i2c_set_4g_mode. Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
8426fe70 |
|
05-Aug-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add apdma sync in i2c driver With the apdma remove hand-shake signal, it need to keep i2c and apdma in sync manually. Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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#
be5ce0e9 |
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14-May-2020 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add i2c ac-timing adjust support This patch adds a algorithm to calculate some ac-timing parameters which can fully meet I2C Spec. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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90224e64 |
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24-Mar-2020 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
i2c: drivers: Use generic definitions for bus frequencies Since we have generic definitions for bus frequencies, let's use them. Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Acked-by: Robert Richter <rrichter@marvell.com> Reviewed-by: Thor Thayer <thor.thayer@linux.intel.com> Acked-by: Elie Morisse <syniurge@gmail.com> Acked-by: Nehal Shah <nehal-bakulchandra.shah@amd.com> Reviewed-by: Brendan Higgins <brendanhiggins@google.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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62931ac2 |
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18-Oct-2019 |
Fabien Parent <fparent@baylibre.com> |
i2c: mt65xx: fix NULL ptr dereference Since commit abf4923e97c3 ("i2c: mediatek: disable zero-length transfers for mt8183"), there is a NULL pointer dereference for all the SoCs that don't have any quirk. mtk_i2c_functionality is not checking that the quirks pointer is not NULL before starting to use it. This commit add a call to i2c_check_quirks which will check whether the quirks pointer is set, and if so will check if the IP has the NO_ZERO_LEN quirk. Fixes: abf4923e97c3 ("i2c: mediatek: disable zero-length transfers for mt8183") Signed-off-by: Fabien Parent <fparent@baylibre.com> Reviewed-by: Cengiz Can <cengiz@kernel.wtf> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Tested-by: Ulrich Hecht <uli@fpond.eu> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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abf4923e |
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22-Aug-2019 |
Hsin-Yi Wang <hsinyi@chromium.org> |
i2c: mediatek: disable zero-length transfers for mt8183 Quoting from mt8183 datasheet, the number of transfers to be transferred in one transaction should be set to bigger than 1, so we should forbid zero-length transfer and update functionality. Reported-by: Alexandru M Stan <amstan@chromium.org> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Qii Wang <qii.wang@mediatek.com> [wsa: shortened commit message a little] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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1802d0be |
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27-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 655 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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25708278 |
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02-Apr-2019 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add i2c support for MediaTek MT8183 Add i2c compatible for MT8183. Compare to MT2712 i2c controller, MT8183 has different register offsets. Ltiming_reg is added to adjust low width of SCL. Arb clock and dma_sync are needed. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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a15c91ba |
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02-Apr-2019 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add i2c and apdma sync in i2c driver When i2c and apdma use different source clocks, we should enable synchronization between them. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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cad6dc5d |
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02-Apr-2019 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add arb clock in i2c driver When two i2c controllers are internally connected to the same GPIO pins, the arb clock is needed to ensure that the waveforms do not interfere with each other. And we also need to enable the interrupt to find arb lost, old i2c controllers also have the bit. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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bc6eaf17 |
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02-Apr-2019 |
Qii Wang <qii.wang@mediatek.com> |
i2c: mediatek: Add offsets array for new i2c registers New i2c registers would have different offsets, so we use different offsets array to distinguish different i2c registers version. Signed-off-by: Qii Wang <qii.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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bc1a7f75 |
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15-Feb-2019 |
Hsin-Yi Wang <hsinyi@chromium.org> |
i2c: mediatek: modify threshold passed to i2c_get_dma_safe_msg_buf() DMA with zero-length transfers doesn't make sense and this HW doesn't support them at all, so increase the threshold. Fixes: fc66b39fe36a ("i2c: mediatek: Use DMA safe buffers for i2c transactions") Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> [wsa: reworded commit message] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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0056a54b |
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21-Jan-2019 |
qii wang <qii.wang@mediatek.com> |
i2c: mediatek: remove completion_done() Completion_done() is useless when we don't use its return value, so we remove it. Signed-off-by: qii wang <qii.wang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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93caa0da |
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21-Jan-2019 |
qii wang <qii.wang@mediatek.com> |
i2c: mediatek: speeds is replaced by macros definitions Different speeds have been defined by macros, so we use macros definitions. Signed-off-by: qii wang <qii.wang@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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fc66b39f |
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06-Sep-2018 |
Jun Gao <jun.gao@mediatek.com> |
i2c: mediatek: Use DMA safe buffers for i2c transactions DMA mode will always be used in i2c transactions, try to allocate a DMA safe buffer if the buf of struct i2c_msg used is not DMA safe. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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6e29577f |
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15-Apr-2018 |
Ryder Lee <ryder.lee@mediatek.com> |
i2c: mediatek: use of_device_get_match_data() The usage of of_device_get_match_data() reduce the code size a bit. Also, the only way to call mtk_i2c_probe() is to match an entry in mtk_i2c_of_match[], so of_id cannot be NULL. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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f6762ced |
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18-Dec-2017 |
Jun Gao <jun.gao@mediatek.com> |
i2c: mediatek: Enable i2c module clock before i2c registers access. Make sure i2c module clock has been enabled before i2c registers access. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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5a10e7d7 |
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18-Dec-2017 |
Jun Gao <jun.gao@mediatek.com> |
i2c: mediatek: Add i2c compatible for MediaTek MT2712 Add i2c compatible for MT2712. Compare to MT8173 i2c controller, internal divider of i2c source clock need to be configured for MT2712 i2c speed calculation. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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1304fe091 |
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20-Aug-2017 |
Jun Gao <jun.gao@mediatek.com> |
i2c: mediatek: Add i2c compatible for MediaTek MT7622 Add i2c compatible for MT7622. Compare to MT8173 i2c controller, MT7622 limits message numbers to 255, and does not support 4GB DMA mode. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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f2326401 |
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17-Jul-2017 |
Jun Gao <jun.gao@mediatek.com> |
i2c: mediatek: send i2c master code at 400k The speed of sending i2c master code in high-speed mode depends on source clock, clock-div and TIMING register. The source clock and clock-div of different SoC are not all the same. In order to send i2c master code at 400k in high-speed mode, a appropriate value should be set to TIMING register for a certain source clock and clock-div. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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1945250d |
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27-Feb-2017 |
Wolfram Sang <wsa@kernel.org> |
i2c: m65xx: drop superfluous quirk structure All length fields in Linux I2C are u16, so a HW length limitation of 16 bit lengths is not a limitation. Remove the quirk structure. Tested-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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ea734404 |
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09-Aug-2016 |
Wolfram Sang <wsa-dev@sang-engineering.com> |
i2c: don't print error when adding adapter fails The core will do this for us now. Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Peter Korsgaard <peter@korsgaard.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Horman <nhorman@tuxdriver.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Ray Jui <ray.jui@broadcom.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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0d47ce21 |
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03-Apr-2016 |
Wolfram Sang <wsa@kernel.org> |
i2c: mt65xx: use new 8 bit address helper function Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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f4f4fed6 |
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01-Feb-2016 |
Liguo Zhang <liguo.zhang@mediatek.com> |
i2c: mt65xx: add 4GB DMA mode support in i2c driver If 4GB mode is enabled, we should add 4GB DMA mode support in i2c driver. Set 4GB mode register to support 4GB mode. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> [wsa: updated commit message] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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8378d01f |
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15-Dec-2015 |
Liguo Zhang <liguo.zhang@mediatek.com> |
i2c: mediatek: fix i2c multi transfer issue in high speed mode For mt8173 platform with auto restart support, when doing i2c multi transfer in high speed, we should ignore the first restart irq after the master code, otherwise the first transfer will be discarded. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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173b77e8 |
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08-Nov-2015 |
Liguo Zhang <liguo.zhang@mediatek.com> |
i2c: mediatek: add i2c first write then read optimization For platform with auto restart support, between every transfer, i2c controller will trigger an interrupt and SW need to handle it to start new transfer. When doing write-then-read transfer, instead of restart mechanism, using WRRD mode to have controller send both transfer in one request to reduce latency. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Reviewed-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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09027e08 |
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06-Oct-2015 |
Liguo Zhang <liguo.zhang@mediatek.com> |
i2c: mediatek: add i2c resume support mt65xx i2c controller initial setting will be cleared after system suspend, so we should init mt65xx i2c controller again when system resume. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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28c0a843 |
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06-Aug-2015 |
Eddie Huang <eddie.huang@mediatek.com> |
i2c: mediatek: Fixup i2c ack error interrupt handling When occur i2c ack error, i2c controller generate two interrupts, first is the ack error interrupt, then the complete interrupt. i2c interrupt handler should keep the two interrupt value, and only call complete() for the complete interrupt. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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ea89ef1f |
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06-Aug-2015 |
Eddie Huang <eddie.huang@mediatek.com> |
i2c: mediatek: Reset DMA engine in hardware init function Reset DMA in hardware init function to avoid unknown hardware state before do any I2C operation. Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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b2ed11e2 |
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21-May-2015 |
Eddie Huang <eddie.huang@mediatek.com> |
I2C: mediatek: Add driver for MediaTek MT8173 I2C controller Add mediatek MT8173 I2C controller driver. Compare to I2C controller of earlier mediatek SoC, MT8173 fix write-then-read limitation, and also increase message size to 64kb. Signed-off-by: Xudong Chen <xudong.chen@mediatek.com> Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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ce38815d |
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21-May-2015 |
Xudong Chen <xudong.chen@mediatek.com> |
I2C: mediatek: Add driver for MediaTek I2C controller The mediatek SoCs have I2C controller that handle I2C transfer. This patch include common I2C bus driver. This driver is compatible with I2C controller on mt65xx/mt81xx. Signed-off-by: Xudong Chen <xudong.chen@mediatek.com> Signed-off-by: Liguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: Eddie Huang <eddie.huang@mediatek.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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