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9d3ba0b6 |
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02-Jun-2023 |
Hao Zhang <quic_hazha@quicinc.com> |
Coresight: Add coresight dummy driver Some Coresight devices that kernel don't have permission to access or configure. For these devices, a dummy driver is needed to register them as Coresight devices. The module may also be used to define components that may not have any programming interfaces, so that paths can be created in the driver. It provides Coresight API for operations on dummy devices, such as enabling and disabling them. It also provides the Coresight dummy sink/source paths for debugging. Signed-off-by: Hao Zhang <quic_hazha@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230602084149.40031-2-quic_hazha@quicinc.com
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#
5b791662 |
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17-Jan-2023 |
Mao Jinlong <quic_jinlmao@quicinc.com> |
Coresight: Add TPDA link driver TPDA(Trace, Profiling and Diagnostics Aggregator) is to provide packetization, funneling and timestamping of TPDM data. Multiple monitors are connected to different input ports of TPDA.This change is to add tpda enable/disable/probe functions for coresight tpda driver. - - - - - - - - - - - - | TPDM 0| | TPDM 1 | | TPDM 2| - - - - - - - - - - - - | | | |_ _ _ _ _ _ | _ _ _ _ | | | | | | | ------------------ | TPDA | ------------------ Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230120095301.30792-2-quic_jinlmao@quicinc.com
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#
b3c71626 |
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17-Jan-2023 |
Mao Jinlong <quic_jinlmao@quicinc.com> |
Coresight: Add coresight TPDM source driver Add driver to support Coresight device TPDM (Trace, Profiling and Diagnostics Monitor). TPDM is a monitor to collect data from different datasets. This change is to add probe/enable/disable functions for tpdm source. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230120095301.30792-1-quic_jinlmao@quicinc.com
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#
06f5c292 |
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14-Jan-2023 |
Qi Liu <liuqi115@huawei.com> |
drivers/coresight: Add UltraSoc System Memory Buffer driver Add driver for UltraSoc SMB(System Memory Buffer) device. SMB provides a way to buffer messages from ETM, and store these "CPU instructions trace" in system memory. The SMB device is identifier as ACPI HID "HISI03A1". Device system memory address resources are allocated using the _CRS method and buffer modes is the circular buffer mode. SMB is developed by UltraSoc technology, which is acquired by Siemens, and we still use "UltraSoc" to name driver. Signed-off-by: Qi Liu <liuqi115@huawei.com> Signed-off-by: Junhao He <hejunhao3@huawei.com> Tested-by: JunHao He <hejunhao3@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20230114101302.62320-2-hejunhao3@huawei.com
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#
8c6989e5 |
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14-Jul-2022 |
Randy Dunlap <rdunlap@infradead.org> |
coresight: trbe: fix Kconfig "its" grammar Use the possessive "its" instead of the contraction "it's" where appropriate. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20220715015925.12569-1-rdunlap@infradead.org Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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#
204879e6 |
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03-Sep-2021 |
Brian Norris <briannorris@chromium.org> |
coresight: cpu-debug: Control default behavior via Kconfig Debugfs is nice and so are module parameters, but * debugfs doesn't take effect early (e.g., if drivers are locking up before user space gets anywhere) * module parameters either add a lot to the kernel command line, or else take effect late as well (if you build =m and configure in /etc/modprobe.d/) So in the same spirit as these CONFIG_PANIC_ON_OOPS (also available via cmdline or modparam) CONFIG_INTEL_IOMMU_DEFAULT_ON (also available via cmdline) add a new Kconfig option. Module parameters and debugfs can still override. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Leo Yan <leo.yan@linaro.org> [Fixed missing double quote in Kconfig title] Link: https://lore.kernel.org/r/20210903182839.1.I20856983f2841b78936134dcf9cdf6ecafe632b9@changeid Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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#
a13d5a24 |
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18-Aug-2021 |
Mike Leach <mike.leach@linaro.org> |
coresight: syscfg: Add initial configfs support Adds configfs subsystem and attributes to the configuration manager to enable the listing of loaded configurations and features. The default values of feature parameters can be accessed and altered from these attributes to affect all installed devices using the feature. Link: https://lore.kernel.org/r/20210723165444.1048-10-mike.leach@linaro.org Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210818194022.379573-10-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
3fbf7f01 |
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05-Apr-2021 |
Anshuman Khandual <anshuman.khandual@arm.com> |
coresight: sink: Add TRBE driver Trace Buffer Extension (TRBE) implements a trace buffer per CPU which is accessible via the system registers. The TRBE supports different addressing modes including CPU virtual address and buffer modes including the circular buffer mode. The TRBE buffer is addressed by a base pointer (TRBBASER_EL1), an write pointer (TRBPTR_EL1) and a limit pointer (TRBLIMITR_EL1). But the access to the trace buffer could be prohibited by a higher exception level (EL3 or EL2), indicated by TRBIDR_EL1.P. The TRBE can also generate a CPU private interrupt (PPI) on address translation errors and when the buffer is full. Overall implementation here is inspired from the Arm SPE driver. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> [ Mark the buffer truncated on WRAP event, error code cleanup ] Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20210405164307.1720226-18-suzuki.poulose@arm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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#
35e1c916 |
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05-Apr-2021 |
Suzuki K Poulose <suzuki.poulose@arm.com> |
coresight: ete: Add support for ETE tracing Add ETE as one of the supported device types we support with ETM4x driver. The devices are named following the existing convention as ete<N>. ETE mandates that the trace resource status register is programmed before the tracing is turned on. For the moment simply write to it indicating TraceActive. Cc: Mike Leach <mike.leach@linaro.org> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20210405164307.1720226-14-suzuki.poulose@arm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
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#
e7255092 |
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08-Dec-2020 |
Qi Liu <liuqi115@huawei.com> |
coresight: etm4x: Modify core-commit to avoid HiSilicon ETM overflow The ETM device can't keep up with the core pipeline when cpu core is at full speed. This may cause overflow within core and its ETM. This is a common phenomenon on ETM devices. On HiSilicon Hip08 platform, a specific feature is added to set core pipeline. So commit rate can be reduced manually to avoid ETM overflow. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Qi Liu <liuqi115@huawei.com> [Modified changelog title and Kconfig description] Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20201208182651.1597945-4-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
8e264c52 |
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28-Sep-2020 |
Tingwei Zhang <tingwei@codeaurora.org> |
coresight: core: Allow the coresight core driver to be built as a module Enhance coresight developer's efficiency to debug coresight drivers. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight by the Makefile - modules can have only one init/exit, so we add the etm_perf register/unregister function calls to the core init/exit functions. - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Tested-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-25-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
a114dbea |
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28-Sep-2020 |
Tingwei Zhang <tingwei@codeaurora.org> |
coresight: catu: Allow catu drivers to be built as modules Allow to build coresight-catu as modules, for ease of development. - Kconfig becomes a tristate, to allow =m - add catu_remove functions, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Reviewed-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-24-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
3c3fd1a1 |
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28-Sep-2020 |
Tingwei Zhang <tingwei@codeaurora.org> |
coresight: cti: Allow cti to be built as a module Allow to build coresight-cti as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-cti by the Makefile - add an cti_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot - move cti_remove_conn_xrefs to cti_remove since all sysfs links have gone when system calls device_release. Reviewed-by Mike Leach <mike.leach@linaro.org> Tested-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-22-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
ac879266 |
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28-Sep-2020 |
Kim Phillips <kim.phillips@arm.com> |
coresight: replicator: Allow replicator driver to be built as module Allow to build coresight-replicator as modules, for ease of development. - Kconfig becomes a tristate, to allow =m - combine static and dynamic replicator init into single module_init/exit call - add replicator_remove functions, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Co-developed-by: Mian Yousaf Kaukab <ykaukab@suse.de> Tested-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-16-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
ecfbf09b |
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28-Sep-2020 |
Kim Phillips <kim.phillips@arm.com> |
coresight: tmc: Allow tmc to be built as a module Allow to build coresight-tmc as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-tmc by the Makefile - add an tmc_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Tested-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-14-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
d9ed244e |
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28-Sep-2020 |
Kim Phillips <kim.phillips@arm.com> |
coresight: tpiu: Allow tpiu to be built as a module Allow to build coresight-tpiu as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - add a tpiu_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Reviewed-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-13-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
529c4451 |
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28-Sep-2020 |
Kim Phillips <kim.phillips@arm.com> |
coresight: etb: Allow etb to be built as a module Allow to build coresight-etb10 as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - add an etb_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Tested-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-12-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
22a550a3 |
|
28-Sep-2020 |
Kim Phillips <kim.phillips@arm.com> |
coresight: etm4x: Allow etm4x to be built as a module Allow to build coresight-etm4x as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-etm4x by the Makefile - add an etm4_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot - delay advertising the per-cpu etmdrvdata - protect etmdrvdata[] by modifying it on relevant CPU Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Tested-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-11-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
97fe626c |
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28-Sep-2020 |
Kim Phillips <kim.phillips@arm.com> |
coresight: etm3x: Allow etm3x to be built as a module Allow to build coresight-etm3x as a module, for ease of development. - Kconfig becomes a tristate, to allow =m - append -core to source file name to allow module to be called coresight-etm3x by the Makefile - add an etm_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot - delay advertising the per-cpu etmdrvdata - protect etmdrvdata[] by modifying it on relevant CPU Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-10-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
8b0cf826 |
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28-Sep-2020 |
Tingwei Zhang <tingwei@codeaurora.org> |
coresight: stm: Allow to build coresight-stm as a module - Kconfig becomes a tristate, to allow =m - add a stm_remove function, for module unload - add a MODULE_DEVICE_TABLE for autoloading on boot Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Russell King <linux@armlinux.org.uk> Tested-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Kim Phillips <kim.phillips@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-8-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
32a14ad5 |
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28-Sep-2020 |
Tingwei Zhang <tingwei@codeaurora.org> |
coresight: cpu_debug: Add module name in Kconfig Provide name of cpu_debug module in Kconfig help section. Tested-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200928163513.70169-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
72ef5e52 |
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14-Apr-2020 |
Mauro Carvalho Chehab <mchehab+huawei@kernel.org> |
docs: fix broken references to text files Several references got broken due to txt to ReST conversion. Several of them can be automatically fixed with: scripts/documentation-file-ref-check --fix Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # hwtracing/coresight/Kconfig Reviewed-by: Paul E. McKenney <paulmck@kernel.org> # memory-barrier.txt Acked-by: Alex Shi <alex.shi@linux.alibaba.com> # translations/zh_CN Acked-by: Federico Vaga <federico.vaga@vaga.pv.it> # translations/it_IT Acked-by: Marc Zyngier <maz@kernel.org> # kvm/arm64 Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Link: https://lore.kernel.org/r/6f919ddb83a33b5f2a63b6b5f0575737bb2b36aa.1586881715.git.mchehab+huawei@kernel.org Signed-off-by: Jonathan Corbet <corbet@lwn.net>
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#
b5213376 |
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20-Mar-2020 |
Mike Leach <mike.leach@linaro.org> |
coresight: cti: Add sysfs access to program function registers Adds in sysfs programming support for the CTI function register sets. Allows direct manipulation of channel / trigger association registers. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200320165303.13681-4-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
835d722b |
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20-Mar-2020 |
Mike Leach <mike.leach@linaro.org> |
coresight: cti: Initial CoreSight CTI Driver This introduces a baseline CTI driver and associated configuration files. Uses the platform agnostic naming standard for CoreSight devices, along with a generic platform probing method that currently supports device tree descriptions, but allows for the ACPI bindings to be added once these have been defined for the CTI devices. Driver will probe for the device on the AMBA bus, and load the CTI driver on CoreSight ID match to CTI IDs in tables. Initial sysfs support for enable / disable provided. Default CTI interconnection data is generated based on hardware register signal counts, with no additional connection information. Signed-off-by: Mike Leach <mike.leach@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20200320165303.13681-2-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
f08d6882 |
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04-Nov-2019 |
Mark Brown <broonie@kernel.org> |
coresight: Add explicit architecture dependency Coresight hardware is only likely to appear on Arm systems and currently the core code has Arm-specific barrier operations in it so can't be built anywhere else so add an explicit dependency saying so. This will make no practical difference currently due to the way subsystems are referenced, the subsystem is only pulled in on arm and arm64, so mainly serves as documentation in case someone wants to increase build coverage. Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20191104181251.26732-13-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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aa95b4a9 |
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31-Jul-2019 |
Mauro Carvalho Chehab <mchehab+samsung@kernel.org> |
docs: fix a couple of new broken references Those are due to recent changes. Most of the issues can be automatically fixed with: $ ./scripts/documentation-file-ref-check --fix The only exception was the sound binding with required manual work. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
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745cfc56 |
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19-Jun-2019 |
Arnd Bergmann <arnd@arndb.de> |
coresight: platform: add OF/APCI dependency When neither CONFIG_OF nor CONFIG_ACPI are set, we get a harmless build warning: drivers/hwtracing/coresight/coresight-platform.c:26:12: error: unused function 'coresight_alloc_conns' [-Werror,-Wunused-function] static int coresight_alloc_conns(struct device *dev, ^ drivers/hwtracing/coresight/coresight-platform.c:46:1: error: unused function 'coresight_find_device_by_fwnode' [-Werror,-Wunused-function] coresight_find_device_by_fwnode(struct fwnode_handle *fwnode) As the code is useless in that configuration anyway, just add a Kconfig dependency that only allows building when at least one of the two is set. This should not hinder compile-testing, as CONFIG_OF can be enabled on any architecture. Fixes: 20961aea982e ("coresight: platform: Use fwnode handle for device search") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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ec8f24b7 |
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19-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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82500a81 |
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25-Apr-2019 |
Mathieu Poirier <mathieu.poirier@linaro.org> |
coresight: etm4x: Add kernel configuration for CONTEXTID Set the proper bit in the configuration register when contextID tracing has been requested by user space. That way PE_CONTEXT elements are generated by the tracers when a process is installed on a CPU. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Tested-by: Leo Yan <leo.yan@linaro.org> Tested-by: Robert Walker <robert.walker@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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455328b1 |
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25-Apr-2019 |
Suzuki K Poulose <suzuki.poulose@arm.com> |
coresight: Merge the static and dynamic replicator drivers Merge the drivers for the two varieties of replicators into a singel one. The dynamic replicator has programming base which can be programmed to filter the trace data. The driver detects the type based on the "base" address value of the device, which is NULL for the static device. Also, while at it, remove the now obsolete DYNAMIC_REPLICATOR config entry. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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fcacb5c1 |
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11-Jul-2018 |
Suzuki K Poulose <suzuki.poulose@arm.com> |
coresight: Introduce support for Coresight Address Translation Unit Add the initial support for Coresight Address Translation Unit, which augments the TMC in Coresight SoC-600 by providing an improved Scatter Gather mechanism. CATU is always connected to a single TMC-ETR and converts the AXI address with a translated address (from a given SG table with specific format). The CATU should be programmed in pass through mode and enabled even if the ETR doesn't use the translation by CATU. This patch provides mechanism to enable/disable the CATU always in the pass through mode. We reuse the existing ports mechanism to link the TMC-ETR to the connected CATU. i.e, TMC-ETR:output_port0 -> CATU:input_port0 Reference manual for CATU component is avilable in version r2p0 of : "Arm Coresight System-on-Chip SoC-600 Technical Reference Manual". Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1c885984 |
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02-Aug-2017 |
Suzuki K Poulose <suzuki.poulose@arm.com> |
coresight replicator: Cleanup programmable replicator naming The Linux coresight drivers define the programmable ATB replicator as Qualcomm replicator, while this is designed by ARM. This can cause confusion to a user selecting the driver. Cleanup all references to make it explicitly clear. This patch : 1) Replace the compatible string for the replicator : qcom,coresight-replicator1x => arm,coresight-dynamic-replicator 2) Changes the Kconfig symbol (since this is not part of any defconfigs) CORESIGHT_QCOM_REPLICATOR => CORESIGHT_DYNAMIC_REPLICATOR 3) Improves the help message in the Kconfig. 4) Changes the name of the driver and the file : coresight-replicator-qcom => coresight-dynamic-replicator Cc: Pratik Patel <pratikp@codeaurora.org> Cc: Ivan T. Ivanov <ivan.ivanov@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: devicetree@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Acked-by: Rob Herring <robh+dt@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2227b7c7 |
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05-Jun-2017 |
Leo Yan <leo.yan@linaro.org> |
coresight: add support for CPU debug module Coresight includes debug module and usually the module connects with CPU debug logic. ARMv8 architecture reference manual (ARM DDI 0487A.k) has description for related info in "Part H: External Debug". Chapter H7 "The Sample-based Profiling Extension" introduces several sampling registers, e.g. we can check program counter value with combined CPU exception level, secure state, etc. So this is helpful for analysis CPU lockup scenarios, e.g. if one CPU has run into infinite loop with IRQ disabled. In this case the CPU cannot switch context and handle any interrupt (including IPIs), as the result it cannot handle SMP call for stack dump. This patch is to enable coresight debug module, so firstly this driver is to bind apb clock for debug module and this is to ensure the debug module can be accessed from program or external debugger. And the driver uses sample-based registers for debug purpose, e.g. when system triggers panic, the driver will dump program counter and combined context registers (EDCIDSR, EDVIDSR); by parsing context registers so can quickly get to know CPU secure state, exception level, etc. Some of the debug module registers are located in CPU power domain, so this requires the CPU power domain stays on when access related debug registers, but the power management for CPU power domain is quite dependent on SoC integration for power management. For the platforms which with sane power controller implementations, this driver follows the method to set EDPRCR to try to pull the CPU out of low power state and then set 'no power down request' bit so the CPU has no chance to lose power. If the SoC has not followed up this design well for power management controller, the user should use the command line parameter or sysfs to constrain all or partial idle states to ensure the CPU power domain is enabled and access coresight CPU debug component safely. Signed-off-by: Leo Yan <leo.yan@linaro.org> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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237483aa |
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03-May-2016 |
Pratik Patel <pratikp@codeaurora.org> |
coresight: stm: adding driver for CoreSight STM component This driver adds support for the STM CoreSight IP block, allowing any system compoment (HW or SW) to log and aggregate messages via a single entity. The CoreSight STM exposes an application defined number of channels called stimulus port. Configuration is done using entries in sysfs and channels made available to userspace via configfs. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Michael Williams <michael.williams@arm.com> Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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882d5e11 |
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17-Feb-2016 |
Mathieu Poirier <mathieu.poirier@linaro.org> |
coresight: etm3x: implementing perf_enable/disable() API That way traces can be enabled and disabled automatically from the Perf subystem using the PMU abstraction. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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b9884d3b |
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17-Dec-2015 |
Andrew F. Davis <afd@ti.com> |
coresight: Fix a typo in Kconfig Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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620cf787 |
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19-May-2015 |
Pratik Patel <pratikp@codeaurora.org> |
coresight: replicator: Add Qualcomm CoreSight Replicator driver This driver manages Qualcomm CoreSight Replicator device, which resides on the AMBA bus. Replicator has been made programmable to allow software to turn of the replicator branch to sink that is not being used. This avoids trace traffic to the unused/non-current sink from causing back pressure that results in overflows at the source. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2e1cdfe1 |
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13-May-2015 |
Pratik Patel <pratikp@codeaurora.org> |
coresight-etm4x: Adding CoreSight ETM4x driver This driver manages the CoreSight ETMv4 (Embedded Trace Macrocell) IP block to support HW assisted tracing on ARMv7 and ARMv8 architectures. Signed-off-by: Pratik Patel <pratikp@codeaurora.org> Signed-off-by: Kaixu Xia <xiakaixu@huawei.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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01081f5a |
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30-Mar-2015 |
Mathieu Poirier <mathieu.poirier@linaro.org> |
coresight: moving to new "hwtracing" directory Keeping drivers related to HW tracing on ARM, i.e coresight, under "drivers/coresight" doesn't make sense when other architectures start rolling out technologies of the same nature. As such creating a new "drivers/hwtracing" directory where all drivers of the same kind can reside, reducing namespace pollution under "drivers/". Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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