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3c881e05 |
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14-Mar-2021 |
Wilken Gottwalt <wilken.gottwalt@posteo.net> |
hwspinlock: add sun6i hardware spinlock support Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in most of the sun6i compatible SoCs. This unit provides at least 32 spinlocks in hardware. The implementation supports 32, 64, 128 or 256 32bit registers. A lock can be taken by reading a register and released by writing a 0 to it. This driver supports all 4 spinlock setups, but for now only the first setup (32 locks) seem to exist in available devices. This spinlock unit is shared between all ARM cores and the embedded companion core. All of them can take/release a lock with a single cycle operation. It can be used to sync access to devices shared by the ARM cores and the companion core. There are two ways to check if a lock is taken. The first way is to read a lock. If a 0 is returned, the lock was free and is taken now. If an 1 is returned, the caller has to try again. Which means the lock is taken. The second way is to read a 32bit wide status register where every bit represents one of the 32 first locks. According to the datasheets this status register supports only the 32 first locks. This is the reason the first way (lock read/write) approach is used to be able to cover all 256 locks in future devices. The driver also reports the amount of supported locks via debugfs. Reviewed-by: Samuel Holland <samuel@sholland.org> Acked-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Wilken Gottwalt <wilken.gottwalt@posteo.net> Link: https://lore.kernel.org/r/bfd2b97307c2321b15c09683f4bd5e1fcc792f13.1615713499.git.wilken.gottwalt@posteo.net Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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1cb8f3e2 |
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20-Jan-2021 |
Arnd Bergmann <arnd@arndb.de> |
hwspinlock: remove sirf driver The CSR SiRF prima2/atlas platforms are getting removed, so this driver is no longer needed. Cc: Barry Song <baohua@kernel.org> Link: https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210120132537.2285157-1-arnd@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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285e74ab |
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14-Apr-2020 |
Ezequiel Garcia <ezequiel@collabora.com> |
hwspinlock: Simplify Kconfig Every hwspinlock driver is expected to depend on the hwspinlock core, so it's possible to simplify the Kconfig, factoring out the HWSPINLOCK dependency. Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20200414220943.6203-1-ezequiel@collabora.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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ffd0bbfb |
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10-Feb-2020 |
Baolin Wang <baolin.wang7@gmail.com> |
hwspinlock: Allow drivers to be built with COMPILE_TEST Allow drivers to be built with COMPILE_TEST. Signed-off-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/5a95c3de07ef020a4e2f2776fa5adb00637ee387.1581324976.git.baolin.wang7@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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6fa154e2 |
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30-May-2019 |
Suman Anna <s-anna@ti.com> |
hwspinlock/omap: Add support for TI K3 SoCs A HwSpinlock IP is also present on the newer TI K3 AM65x and J721E family of SoCs within the Main NavSS sub-module. Reuse the existing OMAP Hwspinlock driver to extend the support for this IP on K3 AM65x SoCs as well. The IP has slightly different bit-fields in the SYSCONFIG and SYSSTATUS registers. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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f24fcff1 |
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14-Nov-2018 |
Benjamin Gaignard <benjamin.gaignard@st.com> |
hwspinlock: add STM32 hwspinlock device This patch adds support of hardware semaphores for stm32mp1 SoC. The hardware block provides 32 semaphores. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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eebba71e |
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10-May-2018 |
Suman Anna <s-anna@ti.com> |
hwspinlock/core: Switch to SPDX license identifier Use the appropriate SPDX license identifier in the Hwspinlock core driver source files and drop the previous boilerplate license text. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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d048236d |
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04-Nov-2017 |
Baolin Wang <baolin.wang@linaro.org> |
hwspinlock: Change hwspinlock to a bool Change hwspinlock to a bool in case some drivers will meet dependency issue when hwspinlock is built as a module. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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d8c8bbbb |
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16-May-2017 |
Baolin Wang <baolin.wang@spreadtrum.com> |
hwspinlock: sprd: Add hardware spinlock driver The Spreadtrum hardware spinlock device can provide hardware assistance for synchronization between the multiple subsystems. Signed-off-by: Baolin Wang <baolin.wang@spreadtrum.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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35fc8a07 |
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11-Apr-2017 |
Vincent Legoll <vincent.legoll@gmail.com> |
Make HWSPINLOCK a menuconfig to ease disabling So that there's no need to get into the submenu to disable all related config entries. Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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cc16d664 |
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26-May-2015 |
Wei Chen <wei.chen@csr.com> |
hwspinlock: add a CSR atlas7 driver Add hwspinlock support for the CSR atlas7 SoC. The Hardware Spinlock device on atlas7 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A7, CAN bus Cortex-M3 and audio DSP). Reviewed-by: Suman Anna <s-anna@ti.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Wei Chen <wei.chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
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19a0f612 |
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24-Mar-2015 |
Bjorn Andersson <bjorn.andersson@sonymobile.com> |
hwspinlock: qcom: Add support for Qualcomm HW Mutex block Add driver for Qualcomm Hardware Mutex block found in many Qualcomm SoCs. Based on initial effort by Kumar Gala <galak@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Reviewed-by: Andy Gross <agross@codeaurora.org> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
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ceca89e8 |
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02-Jul-2014 |
Suman Anna <s-anna@ti.com> |
hwspinlock: enable OMAP build for AM33xx, AM43xx & DRA7xx HwSpinlocks are supported on TI's AM33xx, AM43xx and DRA7xx SoC device families as well. The IPs are identical to that of OMAP4/OMAP5, except for the number of locks. Add a depends on to the above family of SoCs to enable the build support for OMAP hwspinlock driver for any of the above SoC configs. Signed-off-by: Suman Anna <s-anna@ti.com> [small commit log changes] Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
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8ae053d6 |
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27-Feb-2013 |
Vincent Stehlé <v-stehle@ti.com> |
hwspinlock/omap: support OMAP5 as well OMAP5 has spinlocks, too. Signed-off-by: Vincent Stehlé <v-stehle@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
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f84a8ecf |
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08-Sep-2011 |
Mathieu J. Poirier <mathieu.poirier@linaro.org> |
hwspinlock/u8500: add hwspinlock driver Add hwspinlock driver for U8500's Hsem hardware. At this point only HSem's protocol 1 is used (i.e. no interrupts). Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> [ohad@wizery.com: adopt recent hwspin_lock_{un}register API changes] [ohad@wizery.com: set the owner member of the driver] [ohad@wizery.com: mark ->remove() function as __devexit] [ohad@wizery.com: write commit log] [ohad@wizery.com: small cleanups] Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
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315d8f5c |
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04-Sep-2011 |
Ohad Ben-Cohen <ohad@wizery.com> |
hwspinlock/core: simplify Kconfig Simplify hwspinlock's Kconfig by making the global CONFIG_HWSPINLOCK entry invisible; users will just select it when needed. This also prepares the ground for adding hwspinlock support for other platforms (the 'depends on ARCH_OMAP4' was rather hideous, and while we're at it, a dedicated menu is added). Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
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4fa8eebb |
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18-Mar-2011 |
Ohad Ben-Cohen <ohad@wizery.com> |
hwspinlock: depend on OMAP4 Currently only OMAP4 supports hwspinlocks, so don't bother asking anyone else. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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70ba4cc2 |
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17-Feb-2011 |
Simon Que <sque@ti.com> |
drivers: hwspinlock: add OMAP implementation Add hwspinlock support for the OMAP4 Hardware Spinlock device. The Hardware Spinlock device on OMAP4 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP). [ohad@wizery.com: adapt to hwspinlock framework, tidy up] Signed-off-by: Simon Que <sque@ti.com> Signed-off-by: Hari Kanigeri <h-kanigeri2@ti.com> Signed-off-by: Krishnamoorthy, Balaji T <balajitk@ti.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
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bd9a4c7d |
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17-Feb-2011 |
Ohad Ben-Cohen <ohad@wizery.com> |
drivers: hwspinlock: add framework Add a platform-independent hwspinlock framework. Hardware spinlock devices are needed, e.g., in order to access data that is shared between remote processors, that otherwise have no alternative mechanism to accomplish synchronization and mutual exclusion operations. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Hari Kanigeri <h-kanigeri2@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Paul Walmsley <paul@pwsan.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Tony Lindgren <tony@atomide.com>
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